Commit 858a1311 authored by Raymond Knopp's avatar Raymond Knopp

sci1a RX testing

parent 5b16b584
......@@ -641,9 +641,8 @@ void processSlotTX(void *arg) {
sl_indication.phy_data = &phy_data;
sl_indication.slot_type = SIDELINK_SLOT_TYPE_TX;
LOG_I(NR_PHY,"Sending SL indication RX %d.%d TX %d.%d\n",proc->frame_rx,proc->nr_slot_rx,proc->frame_tx,proc->nr_slot_tx);
LOG_D(NR_PHY,"Sending SL indication RX %d.%d TX %d.%d\n",proc->frame_rx,proc->nr_slot_rx,proc->frame_tx,proc->nr_slot_tx);
UE->if_inst->sl_indication(&sl_indication);
if (phy_data.nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"processSlotRX 1: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data.nr_sl_pssch_pscch_pdu->startrb,phy_data.nr_sl_pssch_pscch_pdu->pscch_numrbs);
stop_meas(&UE->ue_ul_indication_stats);
}
......
......@@ -199,7 +199,6 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, PHY_VARS_NR_UE *ue,
k -= frame_parms->ofdm_symbol_size;
l = cset_start_symb + symbol_idx;
LOG_I(NR_PHY,"pdcch symbol_idx %d, reg %d l %d, cset_start_symb %d\n",symbol_idx,reg_count,l,cset_start_symb);
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (gNB && pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (reg_list[d][reg_count] + pdcch_pdu_rel15->BWPStart) * 3;
......
......@@ -1037,6 +1037,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int pscch_flag,
unsigned char symbol,
fapi_nr_coreset_t *coreset,
uint16_t first_carrier_offset,
......
......@@ -52,6 +52,7 @@ void peak_estimator(int32_t *buffer, int32_t buf_len, int32_t *peak_idx, int32_t
*/
void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int pscch_flag,
unsigned char symbol,
fapi_nr_coreset_t *coreset,
uint16_t first_carrier_offset,
......
......@@ -79,7 +79,8 @@ char nr_dci_format_string[8][30] = {
//static const int16_t conjugate[8]__attribute__((aligned(32))) = {-1,1,-1,1,-1,1,-1,1};
static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
static void nr_pdcch_demapping_deinterleaving(int pscch_flag,
uint32_t *llr,
uint32_t *e_rx,
uint8_t coreset_time_dur,
uint8_t start_symbol,
......@@ -181,23 +182,28 @@ static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
int data_sc = 9; // 9 sub-carriers with data per PRB
for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
for (int symbol_idx = start_symbol; symbol_idx < start_symbol+coreset_time_dur; symbol_idx++) {
for (int cce_count = 0; cce_count < L[c_id]; cce_count ++) {
for (int k=0; k<NR_NB_REG_PER_CCE/reg_bundle_size_L; k++) { // loop over REG bundles
int f = f_bundle_j_list_ord[c_id][k+NR_NB_REG_PER_CCE*cce_count/reg_bundle_size_L];
for(int rb=0; rb<B_rb; rb++) { // loop over the RBs of the bundle
index_z = data_sc * rb_count;
index_llr = (uint16_t) (f*B_rb + rb + symbol_idx * coreset_nbr_rb) * data_sc;
for (int i = 0; i < data_sc; i++) {
e_rx[index_z + i] = llr[index_llr + i];
if (pscch_flag == 0) {
for (int cce_count = 0; cce_count < L[c_id]; cce_count ++) {
for (int k=0; k<NR_NB_REG_PER_CCE/reg_bundle_size_L; k++) { // loop over REG bundles
int f = f_bundle_j_list_ord[c_id][k+NR_NB_REG_PER_CCE*cce_count/reg_bundle_size_L];
for(int rb=0; rb<B_rb; rb++) { // loop over the RBs of the bundle
index_z = data_sc * rb_count;
index_llr = (uint16_t) (f*B_rb + rb + symbol_idx * coreset_nbr_rb) * data_sc;
for (int i = 0; i < data_sc; i++) {
e_rx[index_z + i] = llr[index_llr + i];
#ifdef NR_PDCCH_DCI_DEBUG
LOG_I(PHY,"[candidate=%d,symbol_idx=%d,cce=%d,REG bundle=%d,PRB=%d] z[%d]=(%d,%d) <-> \t llr[%d]=(%d,%d) \n",
c_id,symbol_idx,cce_count,k,f*B_rb + rb,(index_z + i),*(int16_t *) &e_rx[index_z + i],*(1 + (int16_t *) &e_rx[index_z + i]),
(index_llr + i),*(int16_t *) &llr[index_llr + i], *(1 + (int16_t *) &llr[index_llr + i]));
LOG_I(PHY,"[candidate=%d,symbol_idx=%d,cce=%d,REG bundle=%d,PRB=%d] z[%d]=(%d,%d) <-> \t llr[%d]=(%d,%d) \n",
c_id,symbol_idx,cce_count,k,f*B_rb + rb,(index_z + i),*(int16_t *) &e_rx[index_z + i],*(1 + (int16_t *) &e_rx[index_z + i]),
(index_llr + i),*(int16_t *) &llr[index_llr + i], *(1 + (int16_t *) &llr[index_llr + i]));
#endif
}
rb_count++;
}
rb_count++;
}
}
} // pscch_flag == 0
else { //this will need to be changed a bit when we scan for multiple SCI
memcpy(e_rx,llr,coreset_nbr_rb*coreset_time_dur*data_sc*sizeof(uint32_t));
}
}
}
......@@ -665,6 +671,7 @@ void nr_pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int pscch_flag,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
......@@ -677,8 +684,11 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
int32_t avgs;
int32_t avgP[4];
int n_rb,rb_offset;
get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset);
if (pscch_flag == 0) get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset);
else {
rb_offset = rel15->coreset.frequency_domain_resource[0];
n_rb = rel15->coreset.frequency_domain_resource[1];
}
// Pointers to extracted PDCCH symbols in frequency-domain.
int32_t rx_size = ((4 * frame_parms->N_RB_DL * 12 + 31) >> 5) << 5;
__attribute__ ((aligned(32))) int32_t rxdataF_ext[frame_parms->nb_antennas_rx][rx_size];
......@@ -776,7 +786,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
}
LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving(), number of candidates %d\n",rel15->number_of_candidates);
nr_pdcch_demapping_deinterleaving((uint32_t *) llr,
nr_pdcch_demapping_deinterleaving(pscch_flag,
(uint32_t *) llr,
(uint32_t *) pdcch_e_rx,
rel15->coreset.duration,
rel15->coreset.StartSymbolIndex,
......@@ -860,6 +871,7 @@ static uint16_t nr_dci_false_detection(uint64_t *dci,
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int pscch_flag,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) {
......@@ -908,7 +920,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
uint16_t crc = polar_decoder_int16(tmp_e,
dci_estimation,
1,
NR_POLAR_DCI_MESSAGE_TYPE, dci_length, L);
pscch_flag == 0 ? NR_POLAR_DCI_MESSAGE_TYPE : NR_POLAR_SCI_MESSAGE_TYPE, dci_length, L);
n_rnti = rel15->rnti;
LOG_D(PHY, "(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %llx )\n",
......
......@@ -264,6 +264,7 @@ void nr_dlsch_unscrambling(int16_t* llr,
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int pscch_flag,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
......@@ -366,6 +367,7 @@ void nr_pdcch_unscrambling(int16_t *z,
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int pscch_flag,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
......
......@@ -680,11 +680,11 @@ typedef struct nr_phy_data_tx_s {
NR_UE_ULSCH_t ulsch;
NR_UE_PUCCH pucch_vars;
//Sidelink Rx action decided by MAC
//Sidelink Tx action decided by MAC
sl_nr_tx_config_type_enum_t sl_tx_action;
sl_nr_tx_config_psbch_pdu_t psbch_vars;
sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_pdu;
sl_nr_tx_config_psfch_pdu_t *nr_sl_psfch_pdu;
sl_nr_tx_config_pscch_pssch_pdu_t nr_sl_pssch_pscch_pdu;
sl_nr_tx_config_psfch_pdu_t nr_sl_psfch_pdu;
} nr_phy_data_tx_t;
typedef struct nr_phy_data_s {
......@@ -693,7 +693,8 @@ typedef struct nr_phy_data_s {
//Sidelink Rx action decided by MAC
sl_nr_rx_config_type_enum_t sl_rx_action;
sl_nr_rx_config_pscch_pdu_t nr_sl_pscch_pdu;
sl_nr_rx_config_pssch_sci_pdu_t nr_sl_pssch_sci_pdu;
} nr_phy_data_t;
/* this structure is used to pass both UE phy vars and
* proc to the function UE_thread_rxn_txnp4
......
......@@ -181,6 +181,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int pscch_flag,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
......
......@@ -391,19 +391,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
bool found = false;
if(scheduled_response != NULL){
LOG_I(NR_PHY,"In schedule_response %d.%d SL_RX %p SL_TX %p\n",scheduled_response->frame,scheduled_response->slot,scheduled_response->sl_rx_config,scheduled_response->sl_tx_config);
if (scheduled_response->sl_rx_config || scheduled_response->sl_tx_config) {
sl_handle_scheduled_response(scheduled_response);
nr_phy_data_tx_t *phy_data=(nr_phy_data_tx_t *)scheduled_response->phy_data;
if (phy_data->nr_sl_pssch_pscch_pdu) {
LOG_I(NR_PHY,"nr_ue_scheduled_response: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
LOG_I(NR_PHY,"format 1A length %d :%llx, format 2x length %d : %llx, PSSCH mcs %d, PSSCH tbslrm %d\n",phy_data->nr_sl_pssch_pscch_pdu->pscch_sci_payload_len,
(unsigned long long)*phy_data->nr_sl_pssch_pscch_pdu->pscch_sci_payload,
phy_data->nr_sl_pssch_pscch_pdu->sci2_payload_len,
(unsigned long long)*phy_data->nr_sl_pssch_pscch_pdu->sci2_payload,
phy_data->nr_sl_pssch_pscch_pdu->mcs,
phy_data->nr_sl_pssch_pscch_pdu->tbslbrm);
}
return 0;
}
......@@ -715,6 +704,16 @@ int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response)
phy_data->sl_rx_action = SL_NR_CONFIG_TYPE_RX_PSBCH;
LOG_D(PHY, "Recvd CONFIG_TYPE_RX_PSBCH\n");
break;
case SL_NR_CONFIG_TYPE_RX_PSCCH:
phy_data->sl_rx_action = SL_NR_CONFIG_TYPE_RX_PSCCH;
phy_data->nr_sl_pscch_pdu = sl_rx_config->sl_rx_config_list[0].rx_pscch_config_pdu;
LOG_D(PHY, "Recvd CONFIG_TYPE_RX_PSCCH\n");
break;
case SL_NR_CONFIG_TYPE_RX_PSSCH_SCI:
phy_data->sl_rx_action = SL_NR_CONFIG_TYPE_RX_PSSCH_SCI;
phy_data->nr_sl_pssch_sci_pdu = sl_rx_config->sl_rx_config_list[0].rx_sci2_config_pdu;
LOG_D(PHY, "Recvd CONFIG_TYPE_RX_PSCCH\n");
break;
default:
AssertFatal(0,"Incorrect sl_rx config req pdutype \n");
break;
......@@ -746,14 +745,14 @@ int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response)
break;
case SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH:
phy_data_tx->sl_tx_action = SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH;
phy_data_tx->nr_sl_pssch_pscch_pdu = &sl_tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu;
LOG_I(NR_PHY,"sl_handle_scheduled_response: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data_tx->nr_sl_pssch_pscch_pdu->startrb,phy_data_tx->nr_sl_pssch_pscch_pdu->pscch_numrbs);
LOG_I(NR_PHY,"format 1A length %d :%llx, format 2x length %d : %llx, PSSCH mcs %d, PSSCH tbslrm %d\n",phy_data_tx->nr_sl_pssch_pscch_pdu->pscch_sci_payload_len,
(unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_pdu->pscch_sci_payload,
phy_data_tx->nr_sl_pssch_pscch_pdu->sci2_payload_len,
(unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_pdu->sci2_payload,
phy_data_tx->nr_sl_pssch_pscch_pdu->mcs,
phy_data_tx->nr_sl_pssch_pscch_pdu->tbslbrm);
phy_data_tx->nr_sl_pssch_pscch_pdu = sl_tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu;
LOG_I(NR_PHY,"sl_handle_scheduled_response: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data_tx->nr_sl_pssch_pscch_pdu.startrb,phy_data_tx->nr_sl_pssch_pscch_pdu.pscch_numrbs);
LOG_I(NR_PHY,"format 1A length %d :%llx, format 2x length %d : %llx, PSSCH mcs %d, PSSCH tbslrm %d\n",phy_data_tx->nr_sl_pssch_pscch_pdu.pscch_sci_payload_len,
(unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_pdu.pscch_sci_payload,
phy_data_tx->nr_sl_pssch_pscch_pdu.sci2_payload_len,
(unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_pdu.sci2_payload,
phy_data_tx->nr_sl_pssch_pscch_pdu.mcs,
phy_data_tx->nr_sl_pssch_pscch_pdu.tbslbrm);
break;
default:
AssertFatal(0,"Incorrect sl_tx config req pdutype \n");
......
......@@ -422,6 +422,7 @@ unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int pscch_flag,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
......@@ -444,7 +445,7 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
int16_t pdcch_e_rx[pdcch_e_rx_size];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN);
nr_rx_pdcch(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, pdcch_e_rx, rel15, rxdataF);
nr_rx_pdcch(ue, proc, pscch_flag, pdcch_est_size, pdcch_dl_ch_estimates, pdcch_e_rx, rel15, rxdataF);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT);
......@@ -455,7 +456,7 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
n_ss);
#endif
dci_cnt = nr_dci_decoding_procedure(ue, proc, pdcch_e_rx, &dci_ind, rel15);
dci_cnt = nr_dci_decoding_procedure(ue, proc, pscch_flag, pdcch_e_rx, &dci_ind, rel15);
#ifdef NR_PDCCH_SCHED_DEBUG
LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt);
......@@ -1004,6 +1005,7 @@ void pbch_pdcch_processing(PHY_VARS_NR_UE *ue,
nr_pdcch_channel_estimation(ue,
proc,
0,
l,
&phy_pdcch_config->pdcch_config[n_ss].coreset,
fp->first_carrier_offset,
......@@ -1015,7 +1017,7 @@ void pbch_pdcch_processing(PHY_VARS_NR_UE *ue,
stop_meas(&ue->ofdm_demod_stats);
}
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, phy_data, n_ss, rxdataF);
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(ue, proc, 0, pdcch_est_size, pdcch_dl_ch_estimates, phy_data, n_ss, rxdataF);
}
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt);
phy_pdcch_config->nb_search_space = 0;
......
......@@ -260,6 +260,69 @@ void psbch_pscch_processing(PHY_VARS_NR_UE *ue,
LOG_I(NR_PHY,"============================================\n");
}
}
else if (phy_data->sl_rx_action == SL_NR_CONFIG_TYPE_RX_PSCCH){
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &phy_data->phy_pdcch_config.pdcch_config[0];
LOG_I(NR_PHY,"pscch_numsym = %d\n",phy_data->nr_sl_pscch_pdu.pscch_numsym);
LOG_I(NR_PHY,"pscch_startrb = %d\n",phy_data->nr_sl_pscch_pdu.pscch_startrb);
LOG_I(NR_PHY,"pscch_numrbs = %d\n",phy_data->nr_sl_pscch_pdu.pscch_numrbs);
LOG_I(NR_PHY,"pscch_dmrs_scrambling_id = %d\n",phy_data->nr_sl_pscch_pdu.pscch_dmrs_scrambling_id);
LOG_I(NR_PHY,"pscch_num_subch= %d\n",phy_data->nr_sl_pscch_pdu.num_subch);
LOG_I(NR_PHY,"pscch_subchannel_size = %d\n",phy_data->nr_sl_pscch_pdu.subchannel_size);
LOG_I(NR_PHY,"pscch_l_subch = %d\n",phy_data->nr_sl_pscch_pdu.l_subch);
LOG_I(NR_PHY,"pscch_pssch_numsym = %d\n",phy_data->nr_sl_pscch_pdu.pssch_numsym);
LOG_I(NR_PHY,"sense_pscch = %d\n",phy_data->nr_sl_pscch_pdu.sense_pscch);
rel15->rnti = 0;
rel15->BWPSize = phy_data->nr_sl_pscch_pdu.num_subch * phy_data->nr_sl_pscch_pdu.subchannel_size;
rel15->BWPStart = phy_data->nr_sl_pscch_pdu.pscch_startrb;
rel15->SubcarrierSpacing = fp->subcarrier_spacing;
rel15->coreset.frequency_domain_resource[0] = phy_data->nr_sl_pscch_pdu.pscch_startrb;
rel15->coreset.frequency_domain_resource[1] = phy_data->nr_sl_pscch_pdu.pscch_numrbs;
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
rel15->coreset.StartSymbolIndex = 1;
rel15->coreset.RegBundleSize = 0;
rel15->coreset.duration = phy_data->nr_sl_pscch_pdu.pscch_numsym;
rel15->coreset.pdcch_dmrs_scrambling_id = phy_data->nr_sl_pscch_pdu.pscch_dmrs_scrambling_id;
rel15->coreset.scrambling_rnti = 0;
rel15->coreset.tci_present_in_dci = 0;
rel15->number_of_candidates = phy_data->nr_sl_pscch_pdu.l_subch;
rel15->num_dci_options = 1;
rel15->dci_length_options[0] = phy_data->nr_sl_pscch_pdu.sci_1a_length;
// L now provides the number of PRBs used by PSCCH instead of the number of CCEs
rel15->L[0] = phy_data->nr_sl_pscch_pdu.pscch_numrbs * phy_data->nr_sl_pscch_pdu.pscch_numsym;
// This provides the offset of the candidate of PSCCH in RBs instead of CCEs
rel15->CCE[0] = 0;
// Hold the channel estimates in frequency domain.
int32_t pscch_est_size = ((((fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH))+15)/16)*16);
__attribute__ ((aligned(16))) int32_t pscch_dl_ch_estimates[4*fp->nb_antennas_rx][pscch_est_size];
//
for (int sym=0; sym<rel15->coreset.duration;sym++) {
nr_slot_fep(ue,
fp,
proc,
1+sym,
rxdataF,
link_type_ul);
nr_pdcch_channel_estimation(ue,
proc,
1,
1+sym,
&rel15->coreset,
fp->first_carrier_offset,
rel15->BWPStart,
pscch_est_size,
pscch_dl_ch_estimates,
rxdataF);
}
nr_ue_pdcch_procedures(ue, proc, 1, pscch_est_size, pscch_dl_ch_estimates, phy_data, 0, rxdataF);
exit(-1);
}
UEscopeCopy(ue, commonRxdataF, rxdataF, sizeof(int32_t), fp->nb_antennas_rx, rxdataF_sz, 0);
}
......@@ -278,20 +341,15 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_SL,VCD_FUNCTION_IN);
if (phy_data->nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"phy_procedures 1: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
const int samplesF_per_slot = NR_SYMBOLS_PER_SLOT * fp->ofdm_symbol_size;
c16_t txdataF_buf[fp->nb_antennas_tx * samplesF_per_slot] __attribute__((aligned(32)));
if (phy_data->nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"phy_procedures 0: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
printf("txdataF_buf size %d (nb_antennas_tx %d, samplesF_per_slot %d)\n",sizeof(txdataF_buf),fp->nb_antennas_tx,samplesF_per_slot);
memset(txdataF_buf, 0, sizeof(txdataF_buf));
if (phy_data->nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"phy_procedures 2: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
c16_t *txdataF[fp->nb_antennas_tx]; /* workaround to be compatible with current txdataF usage in all tx procedures. */
for(int i=0; i< fp->nb_antennas_tx; ++i)
txdataF[i] = &txdataF_buf[i * samplesF_per_slot];
LOG_I(PHY,"****** start Sidelink TX-Chain for AbsSubframe %d.%d ******\n",
LOG_D(PHY,"****** start Sidelink TX-Chain for AbsSubframe %d.%d ******\n",
frame_tx, slot_tx);
if (phy_data->nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"phy_procedures: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
start_meas(&sl_phy_params->phy_proc_sl_tx);
......@@ -316,14 +374,7 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
else if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH) {
LOG_I(NR_PHY,"Generating PSCCH (%d.%d)\n",frame_tx,slot_tx);
LOG_I(NR_PHY,"Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
LOG_I(NR_PHY,"format 1A length %d :%llx, format 2x length %d : %llx, PSSCH mcs %d, PSSCH tbslrm %d\n",phy_data->nr_sl_pssch_pscch_pdu->pscch_sci_payload_len,
(unsigned long long)*phy_data->nr_sl_pssch_pscch_pdu->pscch_sci_payload,
phy_data->nr_sl_pssch_pscch_pdu->sci2_payload_len,
(unsigned long long)*phy_data->nr_sl_pssch_pscch_pdu->sci2_payload,
phy_data->nr_sl_pssch_pscch_pdu->mcs,
phy_data->nr_sl_pssch_pscch_pdu->tbslbrm);
nr_generate_sci1(ue,txdataF[0],fp,AMP,slot_tx,phy_data->nr_sl_pssch_pscch_pdu);
nr_generate_sci1(ue,txdataF[0],fp,AMP,slot_tx,&phy_data->nr_sl_pssch_pscch_pdu);
}
else if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSFCH) {
LOG_I(NR_PHY,"Generating PSFCH ( )\n");
......
......@@ -33,6 +33,7 @@
#ifndef __LAYER2_MAC_UE_PROTO_H__
#define __LAYER2_MAC_UE_PROTO_H__
#include <stdbool.h>
#include "mac_defs.h"
#include "RRC/NR_UE/rrc_defs.h"
......@@ -480,6 +481,15 @@ void nr_mac_rrc_sl_mib_ind(const module_id_t module_id,
uint8_t* pduP,
const sdu_size_t pdu_len,
const uint16_t rx_slss_id);
bool nr_schedule_slsch(nr_sci_pdu_t *sci_pdu,
nr_sci_pdu_t *sci2_pdu,
uint8_t *slsch_pdu,
nr_sci_format_t format2,
uint16_t *slsch_pdu_length);
void config_pscch_pdu_rx(sl_nr_rx_config_pscch_pdu_t *nr_sl_pscch_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool);
void config_pssch_sci_pdu_rx(sl_nr_rx_config_pssch_sci_pdu_t *nr_sl_pssch_sci_pdu,
nr_sci_format_t sci2_format,
......@@ -494,7 +504,6 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu,
nr_sci_pdu_t *sci2_pdu,
uint8_t *slsch_pdu,
uint16_t slsch_pdu_length,
const nr_sci_format_t format1,
const nr_sci_format_t format2);
......
......@@ -84,7 +84,8 @@ bool nr_schedule_slsch(nr_sci_pdu_t *sci_pdu,nr_sci_pdu_t *sci2_pdu,uint8_t *sls
}
// Set SLSCH
*slsch_pdu_length = 1024;
return true;
}
......@@ -51,7 +51,7 @@
#include "utils.h"
#include <executables/softmodem-common.h>
#include <executables/nr-uesoftmodem.h>
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/RLC/rlc.h"
......@@ -3253,14 +3253,17 @@ bool nr_ue_sl_pssch_scheduler(nr_sidelink_indication_t *sl_ind,
if (sl_ind->slot_type != SIDELINK_SLOT_TYPE_TX) return false;
if (slot > 9 && get_nrUE_params()->sync_ref) return false;
if (slot < 10 && !get_nrUE_params()->sync_ref) return false;
LOG_I(NR_MAC,"[UE%d] SL-PSSCH SCHEDULER: Frame:SLOT %d:%d, slot_type:%d\n",
sl_ind->module_id, frame, slot,sl_ind->slot_type);
nr_sci_pdu_t sci_pdu;
nr_sci_pdu_t sci2_pdu;
uint8_t *slsch_pdu;
uint16_t slsch_pdu_length;
bool schedule_slsch = nr_schedule_slsch(&sci_pdu,&sci2_pdu,&slsch_pdu,&slsch_pdu_length);
bool schedule_slsch = nr_schedule_slsch(&sci_pdu,&sci2_pdu,tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu.slsch_payload,NR_SL_SCI_FORMAT_2A,&slsch_pdu_length);
if (!schedule_slsch) return false;
*config_type = SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH;
......@@ -3273,7 +3276,6 @@ bool nr_ue_sl_pssch_scheduler(nr_sidelink_indication_t *sl_ind,
sl_res_pool,
&sci_pdu,
&sci2_pdu,
slsch_pdu,
slsch_pdu_length,
NR_SL_SCI_FORMAT_1A,
NR_SL_SCI_FORMAT_2A);
......@@ -3287,6 +3289,25 @@ bool nr_ue_sl_pssch_scheduler(nr_sidelink_indication_t *sl_ind,
return ret_status;
}
void nr_ue_sl_pscch_rx_scheduler(nr_sidelink_indication_t *sl_ind,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_nr_rx_config_request_t *rx_config,
uint8_t *config_type) {
*config_type = SL_NR_CONFIG_TYPE_RX_PSCCH;
rx_config->number_pdus = 1;
rx_config->sfn = sl_ind->frame_rx;
rx_config->slot = sl_ind->slot_rx;
rx_config->sl_rx_config_list[0].pdu_type = *config_type;
config_pscch_pdu_rx(&rx_config->sl_rx_config_list[0].rx_pscch_config_pdu,
sl_bwp,
sl_res_pool);
LOG_I(NR_MAC, "[UE%d] TTI-%d:%d RX PSCCH REQ \n", sl_ind->module_id,sl_ind->frame_rx, sl_ind->slot_rx);
}
/*
* determine if sidelink slot is a PSBCH slot
* If PSBCH rx slot and sync_source == SYNC_REF_UE
......@@ -3449,9 +3470,14 @@ void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind) {
int sl_rx_period = 8*mac->sl_rx_res_pool->ext1->sl_TimeResource_r16->size - mac->sl_rx_res_pool->ext1->sl_TimeResource_r16->bits_unused;
int slot_mod_period = sl_ind->slot_rx%sl_rx_period;
uint8_t mask = mac->sl_rx_res_pool->ext1->sl_TimeResource_r16->buf[slot_mod_period>>3];
if (((1<<slot_mod_period) % mask) == 0) rx_allowed=0;
if (((1<<slot_mod_period) % mask) == 0) rx_allowed=false;
}
if (sl_ind->slot_type==SIDELINK_SLOT_TYPE_TX) rx_allowed=false;
if (((get_nrUE_params()->sync_ref && sl_ind->slot_rx > 9) ||
(!get_nrUE_params()->sync_ref && sl_ind->slot_rx < 10)) && rx_allowed) {
LOG_I(NR_MAC,"Scheduling PSCCH RX processing slot %d, sync_ref %d\n",slot,get_nrUE_params()->sync_ref);
nr_ue_sl_pscch_rx_scheduler(sl_ind, mac->sl_bwp, mac->sl_rx_res_pool,&rx_config, &tti_action);
}
if (!is_psbch_slot && tx_allowed) {
//Check if reserved slot or a sidelink resource configured in Rx/Tx resource pool timeresource bitmap
nr_ue_sl_pssch_scheduler(sl_ind, mac->sl_bwp, mac->sl_tx_res_pool,&tx_config, &tti_action);
......
......@@ -65,6 +65,10 @@ const int sl_dmrs_mask2[2][8] = { {34,34,34,264,264,1032,1032,1032},
{34,34,34,272,272,1040,1040,1040}};
const int sl_dmrs_mask3[5] = {146,146,546,546,2114};
const int sl_dmrs_mask4[3] = {1170,1170,1170};
const int pscch_rb_table[5] = {10,12,15,20,25};
const int pscch_tda[2] = {2,3};
const int subch_to_rb[8] = {10,12,15,20,25,50,75,100};
uint32_t nr_sci_size(const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu,
......@@ -94,7 +98,7 @@ uint32_t nr_sci_size(const NR_SL_ResourcePool_r16_t *sl_res_pool,
// resource reservation period
if (0 /*!sl_res_pool->sl_MultiReserveResource*/) // not defined in 17.4 RRC
if (1 /*!sl_res_pool->sl_MultiReserveResource*/) // not defined in 17.4 RRC
sci_pdu->resource_reservation_period.nbits = 0;
size += sci_pdu->resource_reservation_period.nbits;
......@@ -178,8 +182,6 @@ uint32_t nr_sci_size(const NR_SL_ResourcePool_r16_t *sl_res_pool,
return(size);
}
const int pscch_rb_table[5] = {10,12,15,20,25};
const int pscch_tda[2] = {2,3};
int get_nREDMRS(const NR_SL_ResourcePool_r16_t *sl_res_pool) {
......@@ -221,7 +223,6 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu,
nr_sci_pdu_t *sci2_pdu,
uint8_t *slsch_pdu,
uint16_t slsch_pdu_length,
const nr_sci_format_t format1,
const nr_sci_format_t format2) {
......@@ -245,7 +246,7 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
// num subchannels in a resource pool
nr_sl_pssch_pscch_pdu->num_subch = *sl_res_pool->sl_NumSubchannel_r16;
// Size of subchannels in RBs
nr_sl_pssch_pscch_pdu->subchannel_size = *sl_res_pool->sl_SubchannelSize_r16;
nr_sl_pssch_pscch_pdu->subchannel_size = subch_to_rb[*sl_res_pool->sl_SubchannelSize_r16];
//_PSCCH PSSCH TX: Size of subchannels in a PSSCH resource (l_subch)
AssertFatal(sci_pdu->time_resource_assignment.val == 0, "need to handle a non-zero time_resource_assignment (2 or 3 time hops, N=2,3)\n");
convNRFRIV(sci_pdu->frequency_resource_assignment.val,
......@@ -453,7 +454,6 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
AssertFatal(1==0,"Unknown format %d for sci2\n",format2);
break;
}
nr_sl_pssch_pscch_pdu->slsch_payload = slsch_pdu;
nr_sl_pssch_pscch_pdu->slsch_payload_length = slsch_pdu_length;
};
......@@ -477,7 +477,7 @@ void config_pscch_pdu_rx(sl_nr_rx_config_pscch_pdu_t *nr_sl_pscch_pdu,
// num subchannels in a resource pool
nr_sl_pscch_pdu->num_subch=*sl_res_pool->sl_NumSubchannel_r16;
// Size of subchannels in RBs
nr_sl_pscch_pdu->subchannel_size=*sl_res_pool->sl_SubchannelSize_r16;
nr_sl_pscch_pdu->subchannel_size=subch_to_rb[*sl_res_pool->sl_SubchannelSize_r16];
// PSCCH PSSCH RX: this is set to 1 - Blind decoding for SCI1A done on every subchannel
// PSCCH SENSING: this is equal to number of subchannels forming a resource.
......@@ -498,6 +498,7 @@ void config_pscch_pdu_rx(sl_nr_rx_config_pscch_pdu_t *nr_sl_pscch_pdu,
// as part of TX pool sensing procedure.
nr_sl_pscch_pdu->sense_pscch=0;
LOG_I(NR_MAC,"Programming PSCCH reception (sci_1a_length %d)\n",nr_sl_pscch_pdu->sci_1a_length);
}
......@@ -641,7 +642,7 @@ void config_pssch_sci_pdu_rx(sl_nr_rx_config_pssch_sci_pdu_t *nr_sl_pssch_sci_pd
// num subchannels in a resource pool
nr_sl_pssch_sci_pdu->num_subch = *sl_res_pool->sl_NumSubchannel_r16;
// Size of subchannels in RBs
nr_sl_pssch_sci_pdu->subchannel_size = *sl_res_pool->sl_SubchannelSize_r16;
nr_sl_pssch_sci_pdu->subchannel_size = subch_to_rb[*sl_res_pool->sl_SubchannelSize_r16];
// In case of PSCCH PSSCH RX: this is always 1. Blind decoding done for every channel
// In case of RESOURCE SENSING: this is equal to number of subchannels forming a resource.
nr_sl_pssch_sci_pdu->l_subch = 1;
......
......@@ -439,9 +439,9 @@ int configure_NR_SL_Preconfig(uint8_t id,int sync_source)
num_txpools = 1;
sl_preconfig = prepare_NR_SL_PRECONFIGURATION(num_txpools,num_rxpools,sync_source);
if (LOG_DEBUGFLAG(DEBUG_ASN1)) {
//if (LOG_DEBUGFLAG(DEBUG_ASN1)) {
xer_fprint(stdout, &asn_DEF_NR_SL_PreconfigurationNR_r16, sl_preconfig);
}
//}
} else {
//SL-Preconfiguration with 0 txpool, 1 rxpool if UE is not a syncsource
num_rxpools = 1;
......
......@@ -148,7 +148,7 @@
*/
#define SL_RESPOOLPARAMS_DESC(sl_res_pool) { \
{SL_CONFIG_STRING_RESPOOL_PSCCH_NUMSYM,NULL,0,.i64ptr=sl_res_pool->sl_PSCCH_Config_r16->choice.setup->sl_TimeResourcePSCCH_r16,.defint64val=1,TYPE_INT64,0}, \
{SL_CONFIG_STRING_RESPOOL_PSCCH_NUMRBS,NULL,0,.i64ptr=sl_res_pool->sl_PSCCH_Config_r16->choice.setup->sl_FreqResourcePSCCH_r16,.defint64val=4,TYPE_INT64,0}, \
{SL_CONFIG_STRING_RESPOOL_PSCCH_NUMRBS,NULL,0,.i64ptr=sl_res_pool->sl_PSCCH_Config_r16->choice.setup->sl_FreqResourcePSCCH_r16,.defint64val=1,TYPE_INT64,0}, \
{SL_CONFIG_STRING_RESPOOL_SUBCH_SIZE_IN_RBS,NULL,0,.i64ptr=sl_res_pool->sl_SubchannelSize_r16,.defint64val=0,TYPE_INT64,0},\
{SL_CONFIG_STRING_RESPOOL_SUBCH_START_RB,NULL,0,.i64ptr=sl_res_pool->sl_StartRB_Subchannel_r16,.defint64val=0,TYPE_INT64,0},\
{SL_CONFIG_STRING_RESPOOL_NUM_RBS,NULL,0,.i64ptr=sl_res_pool->sl_RB_Number_r16,.defint64val=106,TYPE_INT64,0},\
......
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