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Commit 8fdccc7b authored by Thomas Schlichter's avatar Thomas Schlichter
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remove max_ul_sched_frame

parent 072567e5
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Showing with 34 additions and 68 deletions
executables/nr-softmodem-common.h
View file @ 8fdccc7b
......@@ -190,7 +190,6 @@ extern uint64_t RFsim_PropDelay; //propagation delay in the RF simulator (expres
extern uint16_t NTN_UE_slot_Rx_to_Tx; //the additional Rx to Tx slot number at UE, original value is 6
extern uint16_t NTN_UE_k2; //the additional k2 value at UE
extern uint16_t NTN_gNB_k2; //the additional k2 value at gNB
extern uint16_t max_ul_sched_frame; //Set the maximum number of buffered UL scheduled frames at gNB, for UL_tti_req_ahead and vrb_map_UL
extern int fdoppler; // flag to simulate frequency offset at the RF-Simulator (default active = 1, 0 = de-activate)
extern int tshift; // flag to simulate timing offset at the RF-Simulator (default active = 1, 0 = de-activate)
extern int fdopplerComp; // flag to activate/deactivate continous frequency offset compensation
......
executables/nr-softmodem.c
View file @ 8fdccc7b
......@@ -579,7 +579,6 @@ void init_pdcp(void) {
uint64_t RFsim_PropDelay = 0;
uint16_t NTN_gNB_k2 = 0;
uint16_t max_ul_sched_frame = 1;
int fdoppler = 1; // flag to simulate frequency offset at the RF-Simulator (default active = 1, 0 = de-activate)
int tshift = 0; // flag to simulate timing offset at the RF-Simulator (default de-activate = 0, 0 = activate)
int fdopplerComp = 1;
......
executables/nr-softmodem.h
View file @ 8fdccc7b
......@@ -34,7 +34,6 @@
{"s" , CONFIG_HLP_SNR, 0, .dblptr=&snr_dB, .defdblval=25, TYPE_DOUBLE, 0}, \
{"P" , CONFIG_HLP_PROPD, 0, .u64ptr=&RFsim_PropDelay, .defintval=0, TYPE_UINT64, 0}, \
{"gnb_k2" , CONFIG_HLP_GNBK2, 0, .u16ptr=&NTN_gNB_k2, .defintval=0, TYPE_UINT16, 0}, \
{"ul_sched_f" , CONFIG_HLP_ULSCHEDF, 0, .u16ptr=&max_ul_sched_frame, .defintval=1, TYPE_UINT16, 0}, \
{"FD" , CONFIG_HLP_FDoppler, 0, .iptr=&fdoppler, .defintval=1, TYPE_INT, 0}, \
{"TS" , CONFIG_HLP_TShift, 0, .iptr=&tshift, .defintval=0, TYPE_INT, 0}, \
{"TD" , CONFIG_HLP_TDRIFT, 0, .iptr=&RFsim_DriftPerFrame, .defintval=0, TYPE_INT, 0}, \
......
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ 8fdccc7b
......@@ -84,7 +84,6 @@ const char *__asan_default_options()
uint16_t NTN_UE_k2 = 0;
uint16_t NTN_UE_slot_Rx_to_Tx = 0;
uint16_t NTN_gNB_k2 = 0;
uint16_t max_ul_sched_frame = 1;
int fdopplerComp = 1; // flag to activate continous frequency offset compensation (=0 deacticated, =1 activated (default case))
int tdriftComp = 1;
......
openair1/SIMULATION/NR_PHY/prachsim.c
View file @ 8fdccc7b
......@@ -65,7 +65,6 @@ char *uecap_file;
uint16_t NTN_UE_k2 = 0;
uint16_t NTN_UE_slot_Rx_to_Tx = 0;
uint16_t NTN_gNB_k2 = 0;
uint16_t max_ul_sched_frame = 1;
int fdopplerComp = 1;
int commonDoppler = 0; // common doppler to be compensated at UE
......
openair1/SIMULATION/NR_PHY/ulsim.c
View file @ 8fdccc7b
......@@ -78,7 +78,6 @@ const char *__asan_default_options()
uint16_t NTN_UE_k2 = 0;
uint16_t NTN_UE_slot_Rx_to_Tx = 0;
uint16_t NTN_gNB_k2 = 0;
uint16_t max_ul_sched_frame = 1;
int fdopplerComp = 1; // flag to activate continous frequency offset compensation (=0 deacticated, =1 activated (default case))
int tdriftComp = 1;
......
openair2/LAYER2/NR_MAC_gNB/config.c
View file @ 8fdccc7b
......@@ -475,17 +475,9 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac,
int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
if (*scc->ssbSubcarrierSpacing == 0)
n <<= 1; // to have enough room for feedback possibly beyond the frame we need a larger array at 15kHz SCS
//nrmac->common_channels[0].vrb_map_UL = calloc(n * MAX_BWP_SIZE, sizeof(uint16_t));
nrmac->common_channels[0].vrb_map_UL = calloc(n * MAX_BWP_SIZE, sizeof(uint16_t));
nrmac->vrb_map_UL_size = n;
nrmac->common_channels[0].vrb_map_UL = calloc(MAX_NUM_UL_SCHED_FRAME, sizeof(uint16_t **));
for (int i = 0; i < MAX_NUM_UL_SCHED_FRAME; ++i ) {
nrmac->common_channels[0].vrb_map_UL[i] = calloc(n, sizeof(uint16_t *));
for (int j = 0; j < n; ++j)
nrmac->common_channels[0].vrb_map_UL[i][j] = calloc(MAX_BWP_SIZE, sizeof(uint16_t));
}
AssertFatal(nrmac->common_channels[0].vrb_map_UL,
"could not allocate memory for RC.nrmac[]->common_channels[0].vrb_map_UL\n");
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ 8fdccc7b
......@@ -87,9 +87,8 @@ void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
/* advance last round's future UL_tti_req to be ahead of current frame/slot */
const int size = gNB->UL_tti_req_ahead_size;
const int prev_slot = frameP * num_slots + slotP + size - 1;
frame_t LastFrame = slotP==0 ? ((frameP + MAX_FRAME_NUMBER - 1) % MAX_FRAME_NUMBER) : frameP;
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][LastFrame%MAX_NUM_UL_SCHED_FRAME][prev_slot % size];
future_ul_tti_req->SFN = (LastFrame + MAX_NUM_UL_SCHED_FRAME) % MAX_FRAME_NUMBER;
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][prev_slot % size];
future_ul_tti_req->SFN = (prev_slot / num_slots) % MAX_FRAME_NUMBER;
LOG_D(NR_MAC, "%d.%d UL_tti_req_ahead SFN.slot = %d.%d for index %d \n", frameP, slotP, future_ul_tti_req->SFN, future_ul_tti_req->Slot, prev_slot % size);
/* future_ul_tti_req->Slot is fixed! */
future_ul_tti_req->n_pdus = 0;
......@@ -188,12 +187,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_
const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int size = gNB->vrb_map_UL_size;
const int prev_slot = frame * num_slots + slot + size - 1;
frame_t LastFrame = slot==0 ? ((frame + MAX_FRAME_NUMBER - 1) % MAX_FRAME_NUMBER) : frame;
uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL[LastFrame%MAX_NUM_UL_SCHED_FRAME][prev_slot % size];
memcpy(vrb_map_UL, &RC.nrmac[module_idP]->ulprbbl, sizeof(uint16_t) * MAX_BWP_SIZE);
//uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL;
//memcpy(&vrb_map_UL[prev_slot % size * MAX_BWP_SIZE], &gNB->ulprbbl, sizeof(uint16_t) * MAX_BWP_SIZE);
uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL;
memcpy(&vrb_map_UL[prev_slot % size * MAX_BWP_SIZE], &gNB->ulprbbl, sizeof(uint16_t) * MAX_BWP_SIZE);
clear_nr_nfapi_information(gNB, CC_id, frame, slot, &sched_info->DL_req, &sched_info->TX_req, &sched_info->UL_dci_req);
}
......@@ -260,7 +255,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_
*/
AssertFatal(MAX_NUM_CCs == 1, "only 1 CC supported\n");
const int current_index = ul_buffer_index(frame, slot, *scc->ssbSubcarrierSpacing, gNB->UL_tti_req_ahead_size);
copy_ul_tti_req(&sched_info->UL_tti_req, &gNB->UL_tti_req_ahead[0][frame%MAX_NUM_UL_SCHED_FRAME][current_index]);
copy_ul_tti_req(&sched_info->UL_tti_req, &gNB->UL_tti_req_ahead[0][current_index]);
stop_meas(&gNB->eNB_scheduler);
NR_SCHED_UNLOCK(&gNB->sched_lock);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @ 8fdccc7b
......@@ -271,7 +271,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
else
mu = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
int index = ul_buffer_index(frameP, slotP, mu, gNB->UL_tti_req_ahead_size);
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[0][frameP%MAX_NUM_UL_SCHED_FRAME][index];
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[0][index];
nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0];
if (is_nr_UL_slot(scc->tdd_UL_DL_ConfigurationCommon, slotP, cc->frame_type)) {
......@@ -413,7 +413,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
const int16_t N_RA_RB = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, mu_pusch);
index = ul_buffer_index(frameP, slotP, mu, gNB->vrb_map_UL_size);
uint16_t *vrb_map_UL = cc->vrb_map_UL[frameP % MAX_NUM_UL_SCHED_FRAME][index];
uint16_t *vrb_map_UL = &cc->vrb_map_UL[index * MAX_BWP_SIZE];
for (int i = 0; i < N_RA_RB * fdm; ++i)
vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] |= SL_to_bitmap(start_symbol, N_t_slot*N_dur);
}
......@@ -735,7 +735,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
int mappingtype = pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
int buffer_index = ul_buffer_index(sched_frame, sched_slot, mu, nr_mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = nr_mac->common_channels[CC_id].vrb_map_UL[sched_frame % MAX_NUM_UL_SCHED_FRAME][buffer_index];
uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[buffer_index * MAX_BWP_SIZE];
const int BWPSize = ul_bwp->initial_BWPSize;
const int BWPStart = ul_bwp->initial_BWPStart;
......@@ -756,7 +756,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
module_idP, frame, slot, CC_id, sched_frame, sched_slot);
buffer_index = ul_buffer_index(sched_frame, sched_slot, mu, nr_mac->UL_tti_req_ahead_size);
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nr_mac->UL_tti_req_ahead[CC_id][sched_frame%MAX_NUM_UL_SCHED_FRAME][buffer_index];
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nr_mac->UL_tti_req_ahead[CC_id][buffer_index];
AssertFatal(future_ul_tti_req->SFN == sched_frame
&& future_ul_tti_req->Slot == sched_slot,
"future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n",
......@@ -960,7 +960,7 @@ static void nr_get_Msg3alloc(module_id_t module_id,
LOG_I(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id);
const int buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, mu, mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = mac->common_channels[CC_id].vrb_map_UL[ra->Msg3_frame%MAX_NUM_UL_SCHED_FRAME][buffer_index];
uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[buffer_index * MAX_BWP_SIZE];
int bwpSize = ul_bwp->initial_BWPSize;
int bwpStart = ul_bwp->initial_BWPStart;
......@@ -1097,7 +1097,7 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_f
const int scs = ul_bwp->scs;
const uint16_t mask = SL_to_bitmap(ra->msg3_startsymb, ra->msg3_nrsymb);
int buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, scs, mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[ra->Msg3_frame%MAX_NUM_UL_SCHED_FRAME][buffer_index];
uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[buffer_index * MAX_BWP_SIZE];
for (int i = 0; i < ra->msg3_nb_rb; ++i) {
AssertFatal(!(vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start] & mask),
"RB %d in %4d.%2d is already taken, cannot allocate Msg3!\n",
......@@ -1109,7 +1109,7 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_f
LOG_D(NR_MAC, "[gNB %d][RAPROC] Frame %d, Slot %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot);
buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, scs, mac->UL_tti_req_ahead_size);
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[CC_id][ra->Msg3_frame%MAX_NUM_UL_SCHED_FRAME][buffer_index];
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[CC_id][buffer_index];
AssertFatal(future_ul_tti_req->SFN == ra->Msg3_frame
&& future_ul_tti_req->Slot == ra->Msg3_slot,
"future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n",
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @ 8fdccc7b
......@@ -249,8 +249,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_ctrl->sched_pusch.tda_info = tda_info;
const int buffer_index = ul_buffer_index(sched_frame, sched_slot, mu, nr_mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = nr_mac->common_channels[CC_id].vrb_map_UL[sched_frame%MAX_NUM_UL_SCHED_FRAME][buffer_index];
//uint16_t *vrb_map_UL = RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_frame%MAX_NUM_UL_SCHED_FRAME][sched_slot];
uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[buffer_index * MAX_BWP_SIZE];
const uint16_t symb = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
uint16_t rbStart = (bw - target_ul_bw) / 2;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ 8fdccc7b
......@@ -2911,33 +2911,22 @@ void UL_tti_req_ahead_initialization(gNB_MAC_INST * gNB, NR_ServingCellConfigCom
return;
int size = n;
//if (scs == 0)
//size <<= 1; // to have enough room for feedback possibly beyond the frame we need a larger array at 15kHz SCS
if (scs == 0)
size <<= 1; // to have enough room for feedback possibly beyond the frame we need a larger array at 15kHz SCS
gNB->UL_tti_req_ahead_size = size;
gNB->UL_tti_req_ahead[CCid] = calloc(MAX_NUM_UL_SCHED_FRAME, sizeof(nfapi_nr_ul_tti_request_t *));
gNB->UL_tti_req_ahead[CCid] = calloc(size, sizeof(nfapi_nr_ul_tti_request_t));
AssertFatal(gNB->UL_tti_req_ahead[CCid], "could not allocate memory for gNB->UL_tti_req_ahead[]\n");
for (int i = 0; i < MAX_NUM_UL_SCHED_FRAME; ++i) {
gNB->UL_tti_req_ahead[CCid][i] = calloc(size, sizeof(nfapi_nr_ul_tti_request_t));
AssertFatal(gNB->UL_tti_req_ahead[CCid][i], "could not allocate memory for gNB->UL_tti_req_ahead[][]\n");
}
/* fill in slot/frame numbers: slot is fixed, frame will be updated by scheduler
* consider that scheduler runs sl_ahead: the first sl_ahead slots are
* already "in the past" and thus we put frame 1 instead of 0! */
for (int i = 0; i < MAX_NUM_UL_SCHED_FRAME; ++i) {
for (int j = 0; j < size; ++j) {
nfapi_nr_ul_tti_request_t *req = &gNB->UL_tti_req_ahead[CCid][i][j];
if (i == 0)
req->SFN = j < (gNB->if_inst->sl_ahead-1) ? MAX_NUM_UL_SCHED_FRAME : 0;
else
req->SFN = i;
req->Slot = j;
LOG_D(MAC, "size:%d,n:%d,scs:%d,i:%d,j:%d\n", size,n,scs,i,j);
}
for (int i = 0; i < size; ++i) {
int abs_slot = frameP * n + slotP + i;
nfapi_nr_ul_tti_request_t *req = &gNB->UL_tti_req_ahead[CCid][abs_slot % size];
req->SFN = (abs_slot / n) % MAX_FRAME_NUMBER;
req->Slot = abs_slot % n;
}
}
void send_initial_ul_rrc_message(gNB_MAC_INST *mac, int rnti, const uint8_t *sdu, sdu_size_t sdu_len, void *rawUE)
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
View file @ 8fdccc7b
......@@ -202,7 +202,7 @@ static void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu,
srs_pdu->beamforming.prg_size = 1;
}
uint16_t *vrb_map_UL = RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[frame % MAX_NUM_UL_SCHED_FRAME][buffer_index];
uint16_t *vrb_map_UL = &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[buffer_index * MAX_BWP_SIZE];
uint64_t mask = SL_to_bitmap(13 - srs_pdu->time_start_position, srs_pdu->num_symbols);
for (int i = 0; i < srs_pdu->bwp_size; ++i)
vrb_map_UL[i + srs_pdu->bwp_start] |= mask;
......@@ -218,7 +218,7 @@ static void nr_fill_nfapi_srs(int module_id,
{
int index = ul_buffer_index(frame, slot, UE->current_UL_BWP.scs, RC.nrmac[module_id]->UL_tti_req_ahead_size);
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][frame%MAX_NUM_UL_SCHED_FRAME][index];
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][index];
AssertFatal(future_ul_tti_req->n_pdus <
sizeof(future_ul_tti_req->pdus_list) / sizeof(future_ul_tti_req->pdus_list[0]),
"Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
View file @ 8fdccc7b
......@@ -50,16 +50,16 @@ static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac,
const int index = ul_buffer_index(pucch->frame, pucch->ul_slot, UE->current_UL_BWP.scs, nrmac->UL_tti_req_ahead_size);
LOG_D(MAC, "index:%d, %d:%d,size:%d\n", index, pucch->frame, pucch->ul_slot,nrmac->UL_tti_req_ahead_size);
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nrmac->UL_tti_req_ahead[0][pucch->frame%MAX_NUM_UL_SCHED_FRAME][index];
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nrmac->UL_tti_req_ahead[0][index];
if (future_ul_tti_req->SFN != pucch->frame || future_ul_tti_req->Slot != pucch->ul_slot)
LOG_W(MAC,
"Current %d.%d : future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d, mod: %d, index: %d\n",
"Current %d.%d : future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d, index: %d\n",
frame,slot,
future_ul_tti_req->SFN,
future_ul_tti_req->Slot,
pucch->frame,
pucch->ul_slot,
pucch->frame%MAX_NUM_UL_SCHED_FRAME, index);
index);
// n_pdus is number of pdus, so, in the array, it is the index of the next free element
if (future_ul_tti_req->n_pdus >= sizeofArray(future_ul_tti_req->pdus_list) ) {
......@@ -289,7 +289,7 @@ void nr_csi_meas_reporting(int Mod_idP,
// going through the list of PUCCH resources to find the one indexed by resource_id
const int index = ul_buffer_index(sched_frame, sched_slot, ul_bwp->scs, nrmac->vrb_map_UL_size);
uint16_t *vrb_map_UL = nrmac->common_channels[0].vrb_map_UL[sched_frame%MAX_NUM_UL_SCHED_FRAME][index];
uint16_t *vrb_map_UL = &nrmac->common_channels[0].vrb_map_UL[index * MAX_BWP_SIZE];
const int m = pucch_Config->resourceToAddModList->list.count;
for (int j = 0; j < m; j++) {
NR_PUCCH_Resource_t *pucchres = pucch_Config->resourceToAddModList->list.array[j];
......@@ -1394,7 +1394,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
// checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
set_pucch_allocation(ul_bwp, r_pucch, bwp_size, curr_pucch);
const int index = ul_buffer_index(pucch_frame, pucch_slot, ul_bwp->scs, mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = mac->common_channels[CC_id].vrb_map_UL[pucch_frame%MAX_NUM_UL_SCHED_FRAME][index];
uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[index * MAX_BWP_SIZE];
bool ret = test_pucch0_vrb_occupation(curr_pucch,
vrb_map_UL,
bwp_start,
......@@ -1489,7 +1489,7 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
}
else {
const int index = ul_buffer_index(SFN, slot, ul_bwp->scs, nrmac->vrb_map_UL_size);
uint16_t *vrb_map_UL = nrmac->common_channels[CC_id].vrb_map_UL[SFN%MAX_NUM_UL_SCHED_FRAME][index];
uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[index * MAX_BWP_SIZE];
const int bwp_start = ul_bwp->BWPStart;
const int bwp_size = ul_bwp->BWPSize;
set_pucch_allocation(ul_bwp, -1, bwp_size, curr_pucch);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @ 8fdccc7b
......@@ -1977,7 +1977,7 @@ static bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_
* vrb_map_UL) overlap with the "default" tda and exclude those RBs.
* Calculate largest contiguous RBs */
const int index = ul_buffer_index(sched_frame, sched_slot, mu, nr_mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = nr_mac->common_channels[CC_id].vrb_map_UL[sched_frame%MAX_NUM_UL_SCHED_FRAME][index];
uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[index * MAX_BWP_SIZE];
const uint16_t bwpSize = current_BWP->BWPSize;
const uint16_t bwpStart = current_BWP->BWPStart;
......@@ -2204,7 +2204,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
/* PUSCH in a later slot, but corresponding DCI now! */
const int index = ul_buffer_index(sched_pusch->frame, sched_pusch->slot, current_BWP->scs, nr_mac->UL_tti_req_ahead_size);
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nr_mac->UL_tti_req_ahead[0][sched_pusch->frame%MAX_NUM_UL_SCHED_FRAME][index];
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nr_mac->UL_tti_req_ahead[0][index];
//if (future_ul_tti_req->SFN != sched_pusch->frame || future_ul_tti_req->Slot != sched_pusch->slot)
LOG_D(MAC,
"%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n",
......
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @ 8fdccc7b
......@@ -99,9 +99,6 @@
#define MAX_NUM_NR_PRACH_PREAMBLES 64
#define MIN_NUM_PRBS_TO_SCHEDULE 5
extern uint16_t max_ul_sched_frame; //Set the maximum number of buffered UL scheduled frames at gNB, for UL_tti_req_ahead and vrb_map_UL
#define MAX_NUM_UL_SCHED_FRAME max_ul_sched_frame //should be the exponent of 2
extern const uint8_t nr_rv_round_map[4];
/*! \brief NR_list_t is a "list" (of users, HARQ processes, slices, ...).
......@@ -244,7 +241,7 @@ typedef struct {
uint16_t vrb_map[275];
/// VRB map for common channels and PUSCH, dynamically allocated because
/// length depends on number of slots and RBs
uint16_t ***vrb_map_UL;
uint16_t *vrb_map_UL;
/// number of subframe allocation pattern available for MBSFN sync area
uint8_t num_sf_allocation_pattern;
///Number of active SSBs
......@@ -760,7 +757,7 @@ typedef struct gNB_MAC_INST_s {
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_idx[NFAPI_CC_MAX][MAX_NUM_CORESET];
/// NFAPI UL TTI Request Structure for future TTIs, dynamically allocated
/// because length depends on number of slots
nfapi_nr_ul_tti_request_t **UL_tti_req_ahead[NFAPI_CC_MAX];
nfapi_nr_ul_tti_request_t *UL_tti_req_ahead[NFAPI_CC_MAX];
int UL_tti_req_ahead_size;
int vrb_map_UL_size;
......
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