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Commit 98714f31 authored by Francesco Mani's avatar Francesco Mani
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using SCF fapi structure for PUSCH and initialization of pusch dmrs sequences at nr_init

parent e33dea5f
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nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h
View file @ 98714f31
......@@ -1116,10 +1116,10 @@ typedef struct
uint16_t data_scrambling_id;
uint8_t nrOfLayers;
//DMRS
uint8_t ul_dmrs_symb_pos;
uint16_t ul_dmrs_symb_pos;
uint8_t dmrs_config_type;
uint16_t ul_dmrs_scrambling_id;
uint8_t scid;//
uint8_t scid;
uint8_t num_dmrs_cdm_grps_no_data;
uint16_t dmrs_ports;//DMRS ports. [TS38.212 7.3.1.1.2] provides description between DCI 0-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
//Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2]
......
openair1/PHY/INIT/nr_init.c
View file @ 98714f31
......@@ -150,21 +150,30 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
//------------- config PUSCH DMRS parameters(to be updated from RRC)--------------
gNB->dmrs_UplinkConfig.pusch_dmrs_type = pusch_dmrs_type1;
gNB->dmrs_UplinkConfig.pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0;
gNB->dmrs_UplinkConfig.pusch_maxLength = pusch_len1;
//--------------------------------------------------------------------------------
nr_init_pdsch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
// default values until overwritten by RRCConnectionReconfiguration
//PUSCH DMRS init
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(2*sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
for(int nscid=0; nscid<2; nscid++) {
pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[nscid][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pusch_dmrs[nscid][slot]!=NULL, "NR init: pusch_dmrs for slot %d - malloc failed\n", slot);
for (i=0;i<MAX_NR_OF_UL_ALLOCATIONS;i++){
gNB->pusch_config.pusch_TimeDomainResourceAllocation[i] = (PUSCH_TimeDomainResourceAllocation_t *)malloc16(sizeof(PUSCH_TimeDomainResourceAllocation_t));
gNB->pusch_config.pusch_TimeDomainResourceAllocation[i]->mappingType = typeB;
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[nscid][slot][symb] = (uint32_t *)malloc16(NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(pusch_dmrs[nscid][slot][symb]!=NULL, "NR init: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
}
uint32_t Nid_pusch[2] = {cfg->cell_config.phy_cell_id.value,cfg->cell_config.phy_cell_id.value};
nr_gold_pusch(gNB, &Nid_pusch[0]);
//
/// Transport init necessary for NR synchro
init_nr_transport(gNB);
......
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
View file @ 98714f31
......@@ -31,22 +31,19 @@
int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
uint8_t gNB_offset,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pusch,
dmrs_UplinkConfig_t *dmrs_UplinkConfig)
{
nfapi_nr_pusch_pdu_t *pusch_pdu) {
int pilot[3280] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt,re_cnt;
int16_t ch[2],ch_r[2],ch_l[2],*pil,*rxF,*ul_ch;
int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
int ch_offset,symbol_offset, length_dmrs, UE_id = 0;
unsigned short n_idDMRS[2] = {0,1}; //to update from pusch config
int ch_offset,symbol_offset, UE_id = 0;
int32_t **ul_ch_estimates_time = gNB->pusch_vars[UE_id]->ul_ch_estimates_time;
__m128i *ul_ch_128;
......@@ -71,6 +68,8 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
k = bwp_start_subcarrier;
int re_offset = k;
uint16_t nb_rb_pusch = pusch_pdu->rb_size;
/*
#ifdef DEBUG_CH
printf("PUSCH Channel Estimation : gNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n", gNB_offset,ch_offset,symbol_offset,gNB->frame_parms.ofdm_symbol_size,
......@@ -117,21 +116,17 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
length_dmrs = gNB->dmrs_UplinkConfig.pusch_maxLength;
nr_gold_pusch(gNB, symbol, n_idDMRS, length_dmrs);
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch[gNB_offset][Ns][0], &pilot[0], 1000, 0, nb_rb_pusch, dmrs_UplinkConfig->pusch_dmrs_type);
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch, pusch_pdu->dmrs_config_type);
//------------------------------------------------//
for (aarx=0; aarx<gNB->frame_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
#ifdef DEBUG_PUSCH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[0], gNB->frame_parms.N_RB_UL);
......@@ -141,8 +136,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#endif
//if ((gNB->frame_parms.N_RB_UL&1)==0) {
if (dmrs_UplinkConfig->pusch_dmrs_type == pusch_dmrs_type1){
if (pusch_pdu->dmrs_config_type == pusch_dmrs_type1){
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
......@@ -237,10 +231,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
}
// Treat first 2 pilots specially (right edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
......@@ -281,70 +275,69 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
8);
// check if PRB crosses DC and improve estimates around DC
if ((bwp_start_subcarrier < gNB->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pusch*12 >= gNB->frame_parms.ofdm_symbol_size)) {
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
uint16_t idxDC = 2*(gNB->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
uint16_t idxPil = idxDC/2;
re_offset = k;
pil = (int16_t *)&pilot[0];
pil += (idxPil-2);
ul_ch += (idxDC-4);
ul_ch = memset(ul_ch, 0, sizeof(int16_t)*10);
re_offset = (re_offset+idxDC/2-2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
// for proper allignment of SIMD vectors
if((gNB->frame_parms.N_RB_UL&1)==0) {
multadd_real_vector_complex_scalar(fdcl,
ch,
ul_ch-4,
8);
pil += 4;
re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
// check if PRB crosses DC and improve estimates around DC
if ((bwp_start_subcarrier < gNB->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pusch*12 >= gNB->frame_parms.ofdm_symbol_size)) {
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
uint16_t idxDC = 2*(gNB->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
uint16_t idxPil = idxDC/2;
re_offset = k;
pil = (int16_t *)&pilot[0];
pil += (idxPil-2);
ul_ch += (idxDC-4);
ul_ch = memset(ul_ch, 0, sizeof(int16_t)*10);
re_offset = (re_offset+idxDC/2-2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
// for proper allignment of SIMD vectors
if((gNB->frame_parms.N_RB_UL&1)==0) {
multadd_real_vector_complex_scalar(fdcl,
ch,
ul_ch-4,
8);
multadd_real_vector_complex_scalar(fdcr,
ch,
ul_ch-4,
8);
} else {
pil += 4;
re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
multadd_real_vector_complex_scalar(fdclh,
ch,
ul_ch,
8);
multadd_real_vector_complex_scalar(fdcr,
ch,
ul_ch-4,
8);
}
else {
multadd_real_vector_complex_scalar(fdclh,
ch,
ul_ch,
8);
pil += 4;
re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
pil += 4;
re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
multadd_real_vector_complex_scalar(fdcrh,
ch,
ul_ch,
8);
multadd_real_vector_complex_scalar(fdcrh,
ch,
ul_ch,
8);
}
}
}
#ifdef DEBUG_PDSCH
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
for(uint16_t idxP=0; idxP<ceil((float)nb_rb_pusch*12/8); idxP++) {
for(uint8_t idxI=0; idxI<16; idxI+=2) {
printf("%d\t%d\t",ul_ch[idxP*16+idxI],ul_ch[idxP*16+idxI+1]);
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
for(uint16_t idxP=0; idxP<ceil((float)nb_rb_pusch*12/8); idxP++) {
for(uint8_t idxI=0; idxI<16; idxI+=2) {
printf("%d\t%d\t",ul_ch[idxP*16+idxI],ul_ch[idxP*16+idxI+1]);
}
printf("%d\n",idxP);
}
printf("%d\n",idxP);
}
#endif
} else { //pusch_dmrs_type2 |p_r,p_l,d,d,d,d,p_r,p_l,d,d,d,d|
}
else { //pusch_dmrs_type2 |p_r,p_l,d,d,d,d,p_r,p_l,d,d,d,d|
// Treat first DMRS specially (left edge)
......@@ -428,13 +421,12 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch_128 = (__m128i *)&ul_ch_estimates[aarx][ch_offset];
ul_ch_128[0] = _mm_slli_epi16 (ul_ch_128[0], 2);
}
}
// Convert to time domain
switch (gNB->frame_parms.ofdm_symbol_size) {
switch (gNB->frame_parms.ofdm_symbol_size) {
case 128:
idft128((int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
......
openair1/PHY/NR_ESTIMATION/nr_ul_estimation.h
View file @ 98714f31
......@@ -39,14 +39,12 @@
\param nb_rb_pusch, number of allocated RBs for this UE
*/
int32_t nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
uint8_t gNB_offset,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pusch,
dmrs_UplinkConfig_t *dmrs_UplinkConfig);
int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
nfapi_nr_pusch_pdu_t *pusch_pdu);
int nr_est_timing_advance_pusch(PHY_VARS_gNB* phy_vars_gNB, int UE_id);
......
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
View file @ 98714f31
......@@ -82,13 +82,13 @@ int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
mod_table = (w==1) ? nr_rx_mod_table : nr_rx_nmod_table;
idx = ((((nr_gold_pusch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pusch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
((int16_t*)output)[i<<1] = mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(i<<1)+1] = mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
((int16_t*)output)[i<<1] = mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(i<<1)+1] = mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PUSCH
printf("nr_pusch_dmrs_rx dmrs config type %d port %d nb_pusch_rb %d\n", dmrs_type, p, nb_pusch_rb);
printf("wf[%d] = %d wt[%d]= %d\n", i&1, wf[p-1000][i&1], lp, wt[p-1000][lp]);
printf("i %d idx %d pusch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pusch[(i<<1)>>5], (((nr_gold_pusch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pusch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1]);
printf("nr_pusch_dmrs_rx dmrs config type %d port %d nb_pusch_rb %d\n", dmrs_type, p, nb_pusch_rb);
printf("wf[%d] = %d wt[%d]= %d\n", i&1, wf[p-1000][i&1], lp, wt[p-1000][lp]);
printf("i %d idx %d pusch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pusch[(i<<1)>>5], (((nr_gold_pusch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pusch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1]);
#endif
}
} else {
......
openair1/PHY/NR_REFSIG/nr_gold.c
View file @ 98714f31
......@@ -88,6 +88,7 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
uint16_t N_n_scid[NR_MAX_NB_CODEWORDS]={Nid, Nid}; // Not correct, appropriate scrambling IDs have to be updated to support DCI 1_1
uint8_t n_scid=0; // again works only for 1_0
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
......@@ -104,56 +105,27 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
}
void nr_gold_pusch(PHY_VARS_gNB* gNB, unsigned short lbar,unsigned short *n_idDMRS, unsigned short length_dmrs)
{
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
unsigned char ns,l;
unsigned int n,x1,x2,x2tmp0;
int nscid;
unsigned char ns;
unsigned int n,x1,x2;
int nscid, reset;
unsigned int nid;
/// to be updated from higher layer
//unsigned short lbar = 0;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
unsigned short l;
for (nscid=0; nscid<2; nscid++) {
if (n_idDMRS)
nid = n_idDMRS[nscid];
else
nid = gNB->frame_parms.Nid_cell;
//printf("gold pdsch nid %d lbar %d\n",nid,lbar);
for (ns=0; ns<20; ns++) {
for (l=0; l<length_dmrs; l++) {
x2tmp0 = ((14*ns+(lbar+l)+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit
//printf("ns %d gold pdsch x2 %d\n",ns,x2);
x1 = 1+ (1<<31);
x2=x2 ^ ((x2 ^ (x2>>1) ^ (x2>>2) ^ (x2>>3))<<31);
// skip first 50 double words (1600 bits)
for (n=1; n<50; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
nid = Nid[nscid];
for (ns=0; ns<fp->slots_per_frame; ns++) {
for (l=0; l<fp->symbols_per_slot; l++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
for (n=0; n<NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
gNB->nr_gold_pusch[nscid][ns][l][n] = x1^x2;
// if ((ns==2)&&(l==0))
//printf("n=%d : c %x\n",n,x1^x2);
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
......
openair1/PHY/NR_REFSIG/nr_refsig.h
View file @ 98714f31
......@@ -39,7 +39,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, unsigned short lbar,unsigned short *n_idDMRS, unsigned short length_dmrs);
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid);
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
......
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
View file @ 98714f31
......@@ -70,15 +70,10 @@ void nr_ulsch_extract_rbs_single(int **rxdataF,
int **rxdataF_ext,
int **ul_ch_estimates_ext,
uint32_t rxdataF_ext_offset,
// unsigned int *rb_alloc, [hna] Resource Allocation Type 1 is assumed only for the moment
unsigned char symbol,
unsigned short start_rb,
unsigned short nb_rb_pusch,
nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t dmrs_symbol,
uint16_t number_symbols,
uint8_t mapping_type,
dmrs_UplinkConfig_t *dmrs_UplinkConfig);
uint8_t dmrs_symbol);
void nr_ulsch_scale_channel(int32_t **ul_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
......
openair1/PHY/NR_TRANSPORT/nr_ulsch.c
View file @ 98714f31
......@@ -76,23 +76,9 @@ void nr_fill_ulsch(PHY_VARS_gNB *gNB,
ulsch->harq_processes[harq_pid]->slot=slot;
ulsch->harq_processes[harq_pid]->handled= 0;
ulsch->harq_processes[harq_pid]->status= NR_ACTIVE;
nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch->harq_processes[harq_pid]->ulsch_pdu;
memcpy((void*)&ulsch->harq_processes[harq_pid]->ulsch_pdu, (void*)ulsch_pdu, sizeof(nfapi_nr_pusch_pdu_t));
LOG_D(PHY,"Initializing nFAPI for ULSCH, UE %d, harq_pid %d\n",ulsch_id,harq_pid);
//FK this is still a bad hack. We need to replace the L1 FAPI structures with the new scf ones as well.
rel15_ul->rnti = ulsch_pdu->rnti;
rel15_ul->ulsch_pdu_rel15.start_rb = ulsch_pdu->rb_start;
rel15_ul->ulsch_pdu_rel15.number_rbs = ulsch_pdu->rb_size;
rel15_ul->ulsch_pdu_rel15.start_symbol = ulsch_pdu->start_symbol_index;
rel15_ul->ulsch_pdu_rel15.number_symbols = ulsch_pdu->nr_of_symbols;
rel15_ul->ulsch_pdu_rel15.length_dmrs = gNB->dmrs_UplinkConfig.pusch_maxLength;
rel15_ul->ulsch_pdu_rel15.Qm = ulsch_pdu->qam_mod_order;
rel15_ul->ulsch_pdu_rel15.mcs = ulsch_pdu->mcs_index;
rel15_ul->ulsch_pdu_rel15.rv = ulsch_pdu->pusch_data.rv_index;
rel15_ul->ulsch_pdu_rel15.n_layers = ulsch_pdu->nrOfLayers;
rel15_ul->ulsch_pdu_rel15.R = ulsch_pdu->target_code_rate;
}
......
openair1/PHY/NR_TRANSPORT/nr_ulsch.h
View file @ 98714f31
......@@ -53,12 +53,11 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
uint8_t UE_id,
short *ulsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_pusch_pdu_t *pusch_pdu,
uint32_t frame,
uint16_t nb_symb_sch,
uint16_t nb_re_dmrs,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti);
uint32_t G);
/*! \brief Perform PUSCH unscrambling. TS 38.211 V15.4.0 subclause 6.3.1.1
......
openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
View file @ 98714f31
......@@ -296,15 +296,13 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
uint8_t UE_id,
short *ulsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_pusch_pdu_t *pusch_pdu,
uint32_t frame,
uint16_t nb_symb_sch,
uint16_t nb_re_dmrs,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti)
uint32_t G)
{
uint32_t A,E;
uint32_t G;
uint32_t ret, offset;
int32_t no_iteration_ldpc, length_dec;
uint32_t r,r_offset=0,Kr=8424,Kr_bytes,K_bytes_F,err_flag=0;
......@@ -318,7 +316,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
NR_gNB_ULSCH_t *ulsch = phy_vars_gNB->ulsch[UE_id][0];
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_processes[harq_pid];
nfapi_nr_ul_config_ulsch_pdu_rel15_t *nfapi_ulsch_pdu_rel15 = &harq_process->ulsch_pdu.ulsch_pdu_rel15;
t_nrLDPC_dec_params decParams;
t_nrLDPC_dec_params* p_decParams = &decParams;
......@@ -338,13 +335,11 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
double Coderate = 0.0;
// ------------------------------------------------------------------
uint16_t nb_rb = nfapi_ulsch_pdu_rel15->number_rbs;
uint16_t number_symbols = nfapi_ulsch_pdu_rel15->number_symbols;
uint8_t Qm = nfapi_ulsch_pdu_rel15->Qm;
uint16_t R = nfapi_ulsch_pdu_rel15->R;
uint8_t mcs = nfapi_ulsch_pdu_rel15->mcs;
uint8_t n_layers = nfapi_ulsch_pdu_rel15->n_layers;
uint8_t length_dmrs = nfapi_ulsch_pdu_rel15->length_dmrs;
uint16_t nb_rb = pusch_pdu->rb_size;
uint8_t Qm = pusch_pdu->qam_mod_order;
uint16_t R = pusch_pdu->target_code_rate;
uint8_t mcs = pusch_pdu->mcs_index;
uint8_t n_layers = pusch_pdu->nrOfLayers;
// ------------------------------------------------------------------
uint32_t i,j;
......@@ -364,14 +359,12 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
}
// harq_process->trials[nfapi_ulsch_pdu_rel15->round]++;
harq_process->TBS = nr_compute_tbs(Qm, R, nb_rb, number_symbols, nb_re_dmrs*length_dmrs, 0, 0, n_layers);
harq_process->TBS = pusch_pdu->pusch_data.tb_size;
A = harq_process->TBS;
ret = ulsch->max_ldpc_iterations + 1;
G = nr_get_G(nb_rb, number_symbols, nb_re_dmrs, length_dmrs, Qm, n_layers);
LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d, nb_re_dmrs %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_symb_sch,nb_rb, nb_re_dmrs, Qm, n_layers);
LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers);
if (harq_process->round == 0) {
......@@ -461,7 +454,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
K_bytes_F = Kr_bytes-(harq_process->F>>3);
for (r=0; r<harq_process->C; r++) {
E = nr_get_E(G, harq_process->C, nfapi_ulsch_pdu_rel15->Qm, nfapi_ulsch_pdu_rel15->n_layers, r);
E = nr_get_E(G, harq_process->C, Qm, n_layers, r);
#if gNB_TIMING_TRACE
start_meas(ulsch_deinterleaving_stats);
......@@ -474,7 +467,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
//////////////////////////// ulsch_llr =====> harq_process->e //////////////////////////////
nr_deinterleaving_ldpc(E,
nfapi_ulsch_pdu_rel15->Qm,
Qm,
harq_process->e[r],
ulsch_llr+r_offset);
......@@ -494,10 +487,10 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
harq_pid,r, G,
Kr*3,
harq_process->TBS,
nfapi_ulsch_pdu_rel15->Qm,
nfapi_ulsch_pdu_rel15->number_rbs,
nfapi_ulsch_pdu_rel15->n_layers,
nfapi_ulsch_pdu_rel15->rv,
Qm,
nb_rb,
n_layers,
pusch_pdu->pusch_data.rv_index,
harq_process->round);
#endif
//////////////////////////////////////////////////////////////////////////////////////////
......@@ -509,7 +502,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
///////////////////////// harq_process->e =====> harq_process->d /////////////////////////
Tbslbrm = nr_compute_tbslbrm(0,nb_rb,nfapi_ulsch_pdu_rel15->n_layers,harq_process->C);
Tbslbrm = nr_compute_tbslbrm(0,nb_rb,n_layers,harq_process->C);
if (nr_rate_matching_ldpc_rx(Ilbrm,
Tbslbrm,
......@@ -518,7 +511,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
harq_process->d[r],
harq_process->e[r],
harq_process->C,
nfapi_ulsch_pdu_rel15->rv,
pusch_pdu->pusch_data.rv_index,
(harq_process->round==0)?1:0,
E,
harq_process->F,
......@@ -654,7 +647,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
int32_t tti_rx_prev = nr_tti_rx - 1;
if (tti_rx_prev < 0) {
frame_rx_prev--;
tti_rx_prev += 10*frame_parms->ttis_per_subframe;
tti_rx_prev += frame_parms->slots_per_frame;
}
frame_rx_prev = frame_rx_prev%1024;
......@@ -678,10 +671,8 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
ulsch->harq_mask &= ~(1 << harq_pid);
}
if(is_crnti) {
LOG_D(PHY,"[gNB %d] ULSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,ulsch->Mlimit,harq_process->TBS);
}
// LOG_D(PHY,"[gNB %d] ULSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
// phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,ulsch->Mlimit,harq_process->TBS);
harq_process->handled = 1;
ret = ulsch->max_ldpc_iterations + 1;
......@@ -701,10 +692,9 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
// harq_process->harq_ack.harq_id = harq_pid;
// harq_process->harq_ack.send_harq_status = 1;
if(is_crnti)
{
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
}
// LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
// Reassembly of Transport block here
offset = 0;
......
openair1/PHY/defs_gNB.h
View file @ 98714f31
......@@ -174,7 +174,7 @@ typedef struct {
typedef struct {
/// Nfapi ULSCH PDU
nfapi_nr_ul_config_ulsch_pdu ulsch_pdu;
nfapi_nr_pusch_pdu_t ulsch_pdu;
/// Frame where current HARQ round was sent
uint32_t frame;
/// Slot where current HARQ round was sent
......@@ -414,8 +414,10 @@ typedef struct {
/// \brief llr values.
/// - first index: ? [0..1179743] (hard coded)
int16_t *llr;
// DMRS symbol index, to be updated every DMRS symbol within a slot.
/// DMRS symbol index, to be updated every DMRS symbol within a slot.
uint8_t dmrs_symbol;
/// flag to verify if channel level computation is done
uint8_t cl_done;
} NR_gNB_PUSCH;
......@@ -676,7 +678,7 @@ typedef struct PHY_VARS_gNB_s {
uint32_t ****nr_gold_pdsch_dmrs;
/// PUSCH DMRS
uint32_t nr_gold_pusch[2][20][2][NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD];
uint32_t ****nr_gold_pusch_dmrs;
/// Indicator set to 0 after first SR
uint8_t first_sr[NUMBER_OF_NR_SR_MAX];
......@@ -710,12 +712,6 @@ typedef struct PHY_VARS_gNB_s {
/// counter to average prach energh over first 100 prach opportunities
int prach_energy_counter;
PUSCH_Config_t pusch_config;
dmrs_UplinkConfig_t dmrs_UplinkConfig;
dmrs_DownlinkConfig_t dmrs_DownlinkConfig;
/*
time_stats_t phy_proc;
*/
......
openair1/PHY/impl_defs_nr.h
View file @ 98714f31
......@@ -503,8 +503,8 @@ typedef enum {
pdsch_dmrs_type2 = 2
} pdsch_dmrs_type_t;
typedef enum {
pusch_dmrs_type1 = 1,
pusch_dmrs_type2 = 2
pusch_dmrs_type1 = 0,
pusch_dmrs_type2 = 1
} pusch_dmrs_type_t;
typedef enum {
pdsch_dmrs_pos0 = 0,
......
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @ 98714f31
......@@ -212,42 +212,28 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH_id, uint8_t harq_pid)
{
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->ulsch_pdu;
nfapi_nr_ul_config_ulsch_pdu_rel15_t *nfapi_ulsch_pdu_rel15 = &rel15_ul->ulsch_pdu_rel15;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *pusch_pdu = &gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->ulsch_pdu;
uint8_t ret;
uint8_t l, number_dmrs_symbols = 0;
uint8_t mapping_type;
uint32_t G;
int Nid_cell = 0; // [hna] shouldn't be a local variable (should be signaled)
uint16_t start_symbol, number_symbols, nb_re_dmrs;
mapping_type = gNB->pusch_config.pusch_TimeDomainResourceAllocation[0]->mappingType;
start_symbol = nfapi_ulsch_pdu_rel15->start_symbol;
number_symbols = nfapi_ulsch_pdu_rel15->number_symbols;
start_symbol = pusch_pdu->start_symbol_index;
number_symbols = pusch_pdu->nr_of_symbols;
for (l = start_symbol; l < start_symbol + number_symbols; l++)
number_dmrs_symbols += is_dmrs_symbol(l,
0,
0,
0,
0,
0,
number_symbols,
&gNB->dmrs_UplinkConfig,
mapping_type,
frame_parms->ofdm_symbol_size);
nb_re_dmrs = ((gNB->dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)?6:4)*number_dmrs_symbols;
G = nr_get_G(nfapi_ulsch_pdu_rel15->number_rbs,
number_dmrs_symbols += ((pusch_pdu->ul_dmrs_symb_pos)>>l)&0x01;;
nb_re_dmrs = ((pusch_pdu->dmrs_config_type == pusch_dmrs_type1)?6:4)*number_dmrs_symbols;
G = nr_get_G(pusch_pdu->rb_size,
number_symbols,
nb_re_dmrs,
nfapi_ulsch_pdu_rel15->length_dmrs,
nfapi_ulsch_pdu_rel15->Qm,
nfapi_ulsch_pdu_rel15->n_layers);
1, // FIXME only single dmrs is implemented
pusch_pdu->qam_mod_order,
pusch_pdu->nrOfLayers);
//----------------------------------------------------------
......@@ -257,23 +243,22 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
nr_ulsch_unscrambling(gNB->pusch_vars[ULSCH_id]->llr,
G,
0,
Nid_cell,
rel15_ul->rnti);
pusch_pdu->data_scrambling_id,
pusch_pdu->rnti);
//----------------------------------------------------------
//--------------------- ULSCH decoding ---------------------
//----------------------------------------------------------
ret = nr_ulsch_decoding(gNB,
ULSCH_id,
gNB->pusch_vars[ULSCH_id]->llr,
frame_parms,
frame_rx,
number_symbols,
nb_re_dmrs,
slot_rx,
harq_pid,
0);
ULSCH_id,
gNB->pusch_vars[ULSCH_id]->llr,
frame_parms,
pusch_pdu,
frame_rx,
slot_rx,
harq_pid,
G);
if (ret > gNB->ulsch[ULSCH_id][0]->max_ldpc_iterations)
LOG_I(PHY, "ULSCH %d in error\n",ULSCH_id);
......@@ -407,9 +392,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
(ulsch_harq->slot == slot_rx) &&
(ulsch_harq->handled == 0)){
uint8_t symbol_start = ulsch_harq->ulsch_pdu.ulsch_pdu_rel15.start_symbol;
uint8_t symbol_end = symbol_start + ulsch_harq->ulsch_pdu.ulsch_pdu_rel15.number_symbols;
uint8_t symbol_start = ulsch_harq->ulsch_pdu.start_symbol_index;
uint8_t symbol_end = symbol_start + ulsch_harq->ulsch_pdu.nr_of_symbols;
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
}
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ 98714f31
......@@ -387,8 +387,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (is_nr_UL_slot(cc->ServingCellConfigCommon,slot_rxP)) {
schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @ 98714f31
......@@ -469,7 +469,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
pusch_pdu->transform_precoding = 0;
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->ul_dmrs_symb_pos = 1; // ok for now but use fill dmrs mask later
pusch_pdu->ul_dmrs_symb_pos = 1<<start_symbol_index; // ok for now but use fill dmrs mask later
pusch_pdu->dmrs_config_type = 0;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ 98714f31
......@@ -942,28 +942,6 @@ int extract_length(int startSymbolAndLength) {
if (tmp > 0 && tmp < (14-tmp2)) return(tmp);
else return(15-tmp2);
}
void fill_initialBWPDLtimeDomainAllocaion(nfapi_nr_config_request_t *cfg,int time_domain_assignment,int *k0,int *mappingType,int *start_symbol,int *length) {
AssertFatal(time_domain_assignment < cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations.value,"DL time_domain_assignment %d >= %d\n",
time_domain_assignment,cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations.value);
*k0 = cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_k0[time_domain_assignment].value;
*mappingType = cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_mappingType[time_domain_assignment].value;
*start_symbol = extract_startSymbol(cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_startSymbolAndLength[time_domain_assignment].value);
*length = extract_length(cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_startSymbolAndLength[time_domain_assignment].value);
}
void fill_initialBWPULtimeDomainAllocaion(nfapi_nr_config_request_t *cfg,int time_domain_assignment,int *k2, int *mappingType, int *start_symbol,int *length) {
AssertFatal(time_domain_assignment < cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value,"UL time_domain_assignment %d >= %d\n",
time_domain_assignment,cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value);
*k2 = cfg->pusch_config.PUSCHTimeDomainResourceAllocation_k2[time_domain_assignment].value;
*mappingType = cfg->pusch_config.PUSCHTimeDomainResourceAllocation_mappingType[time_domain_assignment].value;
*start_symbol = extract_startSymbol(cfg->pusch_config.PUSCHTimeDomainResourceAllocation_startSymbolAndLength[time_domain_assignment].value);
*length = extract_length(cfg->pusch_config.PUSCHTimeDomainResourceAllocation_startSymbolAndLength[time_domain_assignment].value);
}
/*
* Dump the UL or DL UE_list into LOG_T(MAC)
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
View file @ 98714f31
......@@ -46,7 +46,7 @@ gNBs =
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13475;
initialDLBWPlocationAndBandwidth = 6366;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
......@@ -89,7 +89,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 13475;
initialULBWPlocationAndBandwidth = 6366;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
......
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