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lizhongxiao
OpenXG-RAN
Commits
a0f809f9
Commit
a0f809f9
authored
Feb 17, 2024
by
Robert Schmidt
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nr_schedule_response: separate UL_dci_req
parent
01256ad8
Changes
1
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1 changed file
with
13 additions
and
8 deletions
+13
-8
openair1/SCHED_NR/fapi_nr_l1.c
openair1/SCHED_NR/fapi_nr_l1.c
+13
-8
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openair1/SCHED_NR/fapi_nr_l1.c
View file @
a0f809f9
...
@@ -197,11 +197,21 @@ void nr_schedule_tx_req(PHY_VARS_gNB *gNB, nfapi_nr_tx_data_request_t *TX_req)
...
@@ -197,11 +197,21 @@ void nr_schedule_tx_req(PHY_VARS_gNB *gNB, nfapi_nr_tx_data_request_t *TX_req)
}
}
}
}
void
nr_schedule_ul_dci_req
(
PHY_VARS_gNB
*
gNB
,
nfapi_nr_ul_dci_request_t
*
UL_dci_req
)
{
DevAssert
(
gNB
!=
NULL
);
DevAssert
(
UL_dci_req
!=
NULL
);
processingData_L1tx_t
*
msgTx
=
gNB
->
msgDataTx
;
msgTx
->
num_ul_pdcch
=
UL_dci_req
->
numPdus
;
for
(
int
i
=
0
;
i
<
UL_dci_req
->
numPdus
;
i
++
)
msgTx
->
ul_pdcch_pdu
[
i
]
=
UL_dci_req
->
ul_dci_pdu_list
[
i
];
}
void
nr_schedule_response
(
NR_Sched_Rsp_t
*
Sched_INFO
)
void
nr_schedule_response
(
NR_Sched_Rsp_t
*
Sched_INFO
)
{
{
// copy data from L2 interface into L1 structures
// copy data from L2 interface into L1 structures
module_id_t
Mod_id
=
Sched_INFO
->
module_id
;
module_id_t
Mod_id
=
Sched_INFO
->
module_id
;
nfapi_nr_ul_dci_request_t
*
UL_dci_req
=
&
Sched_INFO
->
UL_dci_req
;
frame_t
frame
=
Sched_INFO
->
frame
;
frame_t
frame
=
Sched_INFO
->
frame
;
sub_frame_t
slot
=
Sched_INFO
->
slot
;
sub_frame_t
slot
=
Sched_INFO
->
slot
;
...
@@ -215,15 +225,11 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
...
@@ -215,15 +225,11 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
int
slot_type
=
nr_slot_select
(
cfg
,
frame
,
slot
);
int
slot_type
=
nr_slot_select
(
cfg
,
frame
,
slot
);
uint8_t
number_ul_dci_pdu
=
(
UL_dci_req
==
NULL
)
?
0
:
UL_dci_req
->
numPdus
;
DevAssert
(
NFAPI_MODE
==
NFAPI_MONOLITHIC
);
DevAssert
(
NFAPI_MODE
==
NFAPI_MONOLITHIC
);
bool
is_dl
=
slot_type
==
NR_DOWNLINK_SLOT
||
slot_type
==
NR_MIXED_SLOT
;
bool
is_dl
=
slot_type
==
NR_DOWNLINK_SLOT
||
slot_type
==
NR_MIXED_SLOT
;
bool
is_ul
=
slot_type
==
NR_UPLINK_SLOT
||
slot_type
==
NR_MIXED_SLOT
;
bool
is_ul
=
slot_type
==
NR_UPLINK_SLOT
||
slot_type
==
NR_MIXED_SLOT
;
processingData_L1tx_t
*
msgTx
=
NULL
;
processingData_L1tx_t
*
msgTx
=
gNB
->
msgDataTx
;
msgTx
=
gNB
->
msgDataTx
;
msgTx
->
num_ul_pdcch
=
number_ul_dci_pdu
;
/* store the sched_response_id for the TX thread to release it when done */
/* store the sched_response_id for the TX thread to release it when done */
msgTx
->
sched_response_id
=
Sched_INFO
->
sched_response_id
;
msgTx
->
sched_response_id
=
Sched_INFO
->
sched_response_id
;
...
@@ -240,8 +246,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
...
@@ -240,8 +246,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
if
(
is_dl
)
{
if
(
is_dl
)
{
nr_schedule_tx_req
(
gNB
,
&
Sched_INFO
->
TX_req
);
nr_schedule_tx_req
(
gNB
,
&
Sched_INFO
->
TX_req
);
for
(
int
i
=
0
;
i
<
number_ul_dci_pdu
;
i
++
)
nr_schedule_ul_dci_req
(
gNB
,
&
Sched_INFO
->
UL_dci_req
);
msgTx
->
ul_pdcch_pdu
[
i
]
=
UL_dci_req
->
ul_dci_pdu_list
[
i
];
/* Both the current thread and the TX thread will access the sched_info
/* Both the current thread and the TX thread will access the sched_info
* at the same time, so increase its reference counter, so that it is
* at the same time, so increase its reference counter, so that it is
* released only when both threads are done with it.
* released only when both threads are done with it.
...
...
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