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lizhongxiao
OpenXG-RAN
Commits
ad4da1b0
Commit
ad4da1b0
authored
Sep 18, 2020
by
Robert Schmidt
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PreProc IF: save PUCCH info per UE
parent
02040568
Changes
2
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2 changed files
with
9 additions
and
5 deletions
+9
-5
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+7
-5
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+2
-0
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
ad4da1b0
...
...
@@ -472,6 +472,12 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
LOG_E
(
MAC
,
"%s(): could not find CCE for UE %d
\n
"
,
__func__
,
UE_id
);
return
;
}
/* Find PUCCH occasion */
nr_update_pucch_scheduling
(
module_id
,
UE_id
,
frame
,
slot
,
num_slots_per_tdd
,
&
sched_ctrl
->
pucch_sched_idx
);
AssertFatal
(
sched_ctrl
->
pucch_sched_idx
>=
0
,
"no uplink slot for PUCCH found!
\n
"
);
}
void
nr_schedule_ue_spec
(
module_id_t
module_id
,
...
...
@@ -497,11 +503,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
//if (sched_ctrl->rbSize < 0 && !get_softmodem_params()->phy_test)
// return;
/* Find PUCCH occasion */
int
pucch_sched
;
nr_update_pucch_scheduling
(
module_id
,
UE_id
,
frame
,
slot
,
num_slots_per_tdd
,
&
pucch_sched
);
NR_sched_pucch
*
pucch
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
pucch_sched
];
const
uint16_t
bwpSize
=
NRRIV2BW
(
sched_ctrl
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
const
uint8_t
mcs
=
9
;
...
...
@@ -644,6 +645,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
const
int
current_harq_pid
=
sched_ctrl
->
current_harq_pid
;
NR_UE_harq_t
*
harq
=
&
sched_ctrl
->
harq_processes
[
current_harq_pid
];
NR_sched_pucch
*
pucch
=
&
sched_ctrl
->
sched_pucch
[
sched_ctrl
->
pucch_sched_idx
];
harq
->
feedback_slot
=
pucch
->
ul_slot
;
harq
->
is_waiting
=
1
;
UE_list
->
mac_stats
[
UE_id
].
dlsch_rounds
[
harq
->
round
]
++
;
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
ad4da1b0
...
...
@@ -291,6 +291,8 @@ typedef struct {
/// the currently active BWP in DL
NR_BWP_Downlink_t
*
active_bwp
;
NR_sched_pucch
*
sched_pucch
;
/// selected PUCCH index, if scheduled
int
pucch_sched_idx
;
NR_sched_pusch
*
sched_pusch
;
/// CCE index and aggregation, should be coherent with cce_list
...
...
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