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OpenXG-RAN
Commit ba6a8554 authored by Raymond Knopp's avatar Raymond Knopp
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minor changes

parent ffda9c75
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Showing with 199 additions and 44 deletions
openair1/PHY/INIT/nr_init_ue.c
View file @ ba6a8554
......@@ -1012,6 +1012,7 @@ void sl_ue_phy_init(PHY_VARS_NR_UE *UE) {
int nb_re_pusch = N_RB_UL * NR_NB_SC_PER_RB;
int nb_re_pusch2 = nb_re_pusch + (nb_re_pusch&7);
UE->pssch_thres = 10;
UE->pssch_vars = (NR_gNB_PUSCH *)malloc16_clear(UE->max_nb_slsch * sizeof(NR_gNB_PUSCH));
for (int SLSCH_id = 0; SLSCH_id < NR_SLSCH_RX_MAX; SLSCH_id++) {
NR_gNB_PUSCH *pssch = &UE->pssch_vars[SLSCH_id];
......
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
View file @ ba6a8554
......@@ -2060,6 +2060,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
for(uint8_t symbol = start_symbol_index; symbol < (start_symbol_index + nr_of_symbols); symbol++) {
uint8_t dmrs_symbol_flag = (ul_dmrs_symb_pos >> symbol) & 0x01;
int sci2_cnt_thissymb=0;
if (dmrs_symbol_flag == 1) {
if ((ul_dmrs_symb_pos >> ((symbol + 1) % frame_parms->symbols_per_slot)) & 0x01)
AssertFatal(1==0,"Double DMRS configuration is not yet supported\n");
......@@ -2213,11 +2214,11 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
/*-------------------- LLRs computation -------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------------------------*/
if (gNB) start_meas(&gNB->ulsch_llr_stats);
if (ml_rx == false || nrOfLayers == 1) {
int sci1_offset=0;
if (ml_rx == false || nrOfLayers == 1) {
if (pssch_pdu && sci2_left>0){
LOG_I(NR_PHY,"valid_re_per_slot[%d] %d\n",symbol,pusch_vars->ul_valid_re_per_slot[symbol]);
int available_sci2_res_in_symb = pusch_vars->ul_valid_re_per_slot[symbol];
int sci1_offset=0;
int slsch_res_in_symbol;
if (symbol <= pssch_pdu->pscch_numsym) {
available_sci2_res_in_symb = pusch_vars->ul_valid_re_per_slot[symbol] - sci1_re_per_symb;
......@@ -2231,12 +2232,16 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
available_sci2_res_in_symb*sizeof(int32_t));
sci2_left-= available_sci2_res_in_symb;
LOG_I(NR_PHY,"SCI2 taking all available REs. sci2_left %d\n",sci2_left);
pusch_vars->ul_valid_re_per_slot[symbol] = 0;
sci2_cnt_thissymb=available_sci2_res_in_symb;
}
else { // we finish SCI2 off here
memcpy(&sci2_llrs[2*sci2_cnt_prev],&pusch_vars->rxdataF_comp[0][(symbol * (off + rb_size * NR_NB_SC_PER_RB))+sci1_re_per_symb],
sci2_left*sizeof(int32_t));
slsch_res_in_symbol=available_sci2_res_in_symb-sci2_left;
LOG_I(NR_PHY,"SCI2 taking %d REs, SLSCH taking %d\n",sci2_left,slsch_res_in_symbol);
pusch_vars->ul_valid_re_per_slot[symbol]=slsch_res_in_symbol;
sci2_cnt_thissymb=sci2_left;
sci2_left=0;
//for (int i=0;i<sci2_re;i++) LOG_I(NR_PHY,"sci2_llrs [%d] %d,%d\n",i,sci2_llrs[i<<1],sci2_llrs[1+(i<<1)]);
//unscramble the SCI2 payload
......@@ -2273,21 +2278,20 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
LOG_I(NR_PHY,"Returning from SCI2 SL indication\n");
//
}
} // (not ML || nrOfLayers==1 ) AND pssch and sci2 REs to handle
if (pssch_pdu) LOG_D(NR_PHY,"symbol %d: PSSCH REs %d (sci1 %d,sci2 %d)\n",symbol,pusch_vars->ul_valid_re_per_slot[symbol],sci1_offset,sci2_cnt_thissymb);
for (aatx=0; aatx < nrOfLayers; aatx++) {
nr_ulsch_compute_llr(&pusch_vars->rxdataF_comp[aatx * frame_parms->nb_antennas_rx][symbol * (off + rb_size * NR_NB_SC_PER_RB)+sci1_offset+sci2_cnt_thissymb],
pusch_vars->ul_ch_mag0[aatx * frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magb0[aatx * frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magc0[aatx * frame_parms->nb_antennas_rx],
&pusch_vars->llr_layers[aatx][rxdataF_ext_offset * qam_mod_order],
rb_size,
pusch_vars->ul_valid_re_per_slot[symbol],
symbol,
qam_mod_order);
}
else {
for (aatx=0; aatx < nrOfLayers; aatx++) {
nr_ulsch_compute_llr(&pusch_vars->rxdataF_comp[aatx * frame_parms->nb_antennas_rx][symbol * (off + rb_size * NR_NB_SC_PER_RB)],
pusch_vars->ul_ch_mag0[aatx * frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magb0[aatx * frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magc0[aatx * frame_parms->nb_antennas_rx],
&pusch_vars->llr_layers[aatx][rxdataF_ext_offset * qam_mod_order],
rb_size,
pusch_vars->ul_valid_re_per_slot[symbol],
symbol,
qam_mod_order);
}
}
} else {
} else { // this is MIMO case with ML
if (pssch_pdu) AssertFatal(1==0,"We need to handle the MIMO case for SCI2\n");
nr_ulsch_compute_ML_llr(pusch_vars->rxdataF_comp,
pusch_vars->ul_ch_mag0,
......
openair1/PHY/defs_nr_UE.h
View file @ ba6a8554
......@@ -668,6 +668,8 @@ typedef struct PHY_VARS_NR_UE_s {
uint32_t ***nr_gold_pscch_dmrs;
/// PSCCH DMRS for RX
uint32_t ***nr_gold_pscch;
/// PSSCH signal detection threshold
int pssch_thres;
} PHY_VARS_NR_UE;
typedef struct {
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue_sl.c
View file @ ba6a8554
......@@ -113,6 +113,103 @@ void nr_fill_sl_rx_indication(sl_nr_rx_indication_t *rx_ind,
}
extern int dmrs_pscch_mask[2];
int nr_slsch_procedures(PHY_VARS_NR_UE *ue, int frame_rx, int slot_rx, int SLSCH_id, uint8_t harq_pid,UE_nr_rxtx_proc_t *proc,nr_phy_data_t *phy_data) {
sl_nr_ue_phy_params_t *sl_phy_params = &ue->SL_UE_PHY_PARAMS;
NR_DL_FRAME_PARMS *fp = &sl_phy_params->sl_frame_params;
sl_nr_rx_config_pssch_pdu_t *slsch_pdu = ue->slsch[SLSCH_id].harq_process->slsch_pdu;
sl_nr_rx_config_pssch_sci_pdu_t *pssch_pdu = ue->slsch[SLSCH_id].harq_process->pssch_pdu;
uint16_t nb_re_dmrs;
uint16_t start_symbol = 1;
uint16_t number_symbols = pssch_pdu->pssch_numsym;
uint8_t number_dmrs_symbols = 0;
for (int l = start_symbol; l < start_symbol + number_symbols; l++)
number_dmrs_symbols += ((pssch_pdu->dmrs_symbol_position)>>l)&0x01;
nb_re_dmrs = 6;
uint32_t rb_size = pssch_pdu->num_subch*pssch_pdu->subchannel_size;
int sci1_dmrs_overlap = pssch_pdu->dmrs_symbol_position & dmrs_pscch_mask[pssch_pdu->pscch_numsym-2];
int sci2_re = get_NREsci2(pssch_pdu->sci2_alpha_times_100,
pssch_pdu->sci2_payload_len,
pssch_pdu->sci2_beta_offset,
pssch_pdu->pssch_numsym,
pssch_pdu->pscch_numsym,
pssch_pdu->pscch_numrbs,
pssch_pdu->l_subch,
pssch_pdu->subchannel_size,
pssch_pdu->mcs,
pssch_pdu->mcs_table);
uint32_t G = nr_get_G_SL(rb_size,
number_symbols,
nb_re_dmrs,
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
sci1_dmrs_overlap,
pssch_pdu->pscch_numsym,
pssch_pdu->pscch_numrbs,
sci2_re,
pssch_pdu->qam_mod_order,
pusch_pdu->nrOfLayers);
AssertFatal(G>0,"G is 0 : rb_size %u, number_symbols %d, nb_re_dmrs %d, number_dmrs_symbols %d, qam_mod_order %u, nrOfLayer %u\n",
rb_size,
number_symbols,
nb_re_dmrs,
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
pssch_pdu->qam_mod_order,
pssch_pdu->num_layers);
LOG_I(NR_PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, dmrs symbol positions %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n",
rb_size,
number_symbols,
nb_re_dmrs,
pssch_pdu->dmrs_symbol_position,
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
pssch_pdu->qam_mod_order,
pssch_pdu->num_layers);
nr_ulsch_layer_demapping(ue->pssch_vars[SLSCH_id].llr,
pssch_pdu->num_layers,
pssch_pdu->qam_mod_order,
G,
ue->pssch_vars[SLSCH_id].llr_layers);
//----------------------------------------------------------
//------------------- ULSCH unscrambling -------------------
//----------------------------------------------------------
nr_ulsch_unscrambling(ue->pssch_vars[SLSCH_id].llr, G, phy_data->Nid, 1010);
//----------------------------------------------------------
//--------------------- ULSCH decoding ---------------------
//----------------------------------------------------------
nfapi_nr_pusch_pdu_t pusch_pdu;
pusch_pdu.rb_size = rb_size;
pusch_pdu.qam_mod_order = qam_mod_order;
pusch_pdu.mcs_index = pssch_pdu->mcs;
pusch_pdu.nrOfLayers = pssch_pdu->num_layers;
pusch_pdu.pusch_data.tb_size=pssch_pdu->tb_size;
uint32_t A = pssch_pdu->tb_size<<3;
pusch_pdu.target_code_rate=pssch_pdu->target_coderate;
float Coderate = (float) (pssch_pdu->target_coderate) / 10240.0f;
pusch_pdu.pusch_data.rv_index=pssch_pdu->rv_index;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25){
pusch_pdu.maintenance_parms_v3.ldpcBaseGraph=2;
}
else{
pusch_pdu.maintenance_parms_v3.ldpcBaseGraph=1;
}
pusch_pdu.maintenance_parms_v3.tbSizeLbrmBytes=nr_sl_pssch_pdu->tbslbrm>>3;
int nbDecode =
nr_ulsch_decoding(gNB, NULL, SLSCH_id, ue->pssch_vars[SLSCH_id].llr, frame_parms, &pusch_pdu, frame_rx, slot_rx, harq_pid, G,proc,phy_data);
return nbDecode;
}
void nr_postDecode_slsch(PHY_VARS_NR_UE *UE, notifiedFIFO_elt_t *req,UE_nr_rxtx_proc_t *proc,nr_phy_data_t *phy_data)
{
ldpcDecode_t *rdata = (ldpcDecode_t*) NotifiedFifoData(req);
......@@ -122,7 +219,7 @@ void nr_postDecode_slsch(PHY_VARS_NR_UE *UE, notifiedFIFO_elt_t *req,UE_nr_rxtx_
sl_nr_rx_config_pssch_pdu_t *slsch_pdu = UE->slsch[rdata->ulsch_id].harq_process->slsch_pdu;
bool decodeSuccess = (rdata->decodeIterations <= rdata->decoderParms.numMaxIter);
slsch_harq->processedSegments++;
LOG_D(PHY,
LOG_D(NR_PHY,
"processing result of segment: %d, processed %d/%d\n",
rdata->segment_r,
slsch_harq->processedSegments,
......@@ -131,7 +228,7 @@ void nr_postDecode_slsch(PHY_VARS_NR_UE *UE, notifiedFIFO_elt_t *req,UE_nr_rxtx_
memcpy(slsch_harq->b + rdata->offset, slsch_harq->c[r], rdata->Kr_bytes - (slsch_harq->F >> 3) - ((slsch_harq->C > 1) ? 3 : 0));
} else {
LOG_D(PHY, "ULSCH %d in error\n", rdata->ulsch_id);
LOG_D(NR_PHY, "ULSCH %d in error\n", rdata->ulsch_id);
}
//int dumpsig=0;
......@@ -140,7 +237,7 @@ void nr_postDecode_slsch(PHY_VARS_NR_UE *UE, notifiedFIFO_elt_t *req,UE_nr_rxtx_
sl_nr_rx_indication_t sl_rx_indication;
nr_sidelink_indication_t sl_indication;
if (!check_abort(&slsch_harq->abort_decode) && !UE->pssch_vars[rdata->ulsch_id].DTX) {
LOG_D(PHY,
LOG_D(NR_PHY,
"[UE] SLSCH: Setting ACK for SFN/SF %d.%d (pid %d, ndi %d, status %d, round %d, TBS %d, Max interation "
"(all seg) %d)\n",
slsch->frame,
......@@ -161,7 +258,7 @@ void nr_postDecode_slsch(PHY_VARS_NR_UE *UE, notifiedFIFO_elt_t *req,UE_nr_rxtx_
nr_fill_sl_indication(&sl_indication,&sl_rx_indication,NULL,proc,UE,phy_data);
//dumpsig=1;
} else {
LOG_D(PHY,
LOG_D(NR_PHY,
"[UE] SLSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, "
"TBS %d) r %d\n",
slsch->frame,
......@@ -453,6 +550,10 @@ void psbch_pscch_pssch_processing(PHY_VARS_NR_UE *ue,
LOG_D(NR_PHY,"pssch_targetCodeRate = %d\n",phy_data->nr_sl_pssch_sci_pdu.targetCodeRate);
LOG_D(NR_PHY,"pssch_num_layers = %d\n",phy_data->nr_sl_pssch_sci_pdu.num_layers);
LOG_D(NR_PHY,"dmrs_symbol_position = %d\n",phy_data->nr_sl_pssch_sci_pdu.dmrs_symbol_position);
int num_dmrs = 0;
for (int s = 0; s < NR_NUMBER_OF_SYMBOLS_PER_SLOT; s++)
num_dmrs += (phy_data->nr_sl_pssch_sci_pdu.dmrs_symbol_position >> s) & 1;
LOG_D(NR_PHY,"num_dmrs = %d\n",num_dmrs);
LOG_D(NR_PHY,"Nid = %x\n",phy_data->nr_sl_pssch_sci_pdu.Nid);
LOG_D(NR_PHY,"startrb = %d\n",phy_data->nr_sl_pssch_sci_pdu.startrb);
......@@ -495,6 +596,53 @@ void psbch_pscch_pssch_processing(PHY_VARS_NR_UE *ue,
frame_rx,
nr_slot_rx,
0);
NR_gNB_PUSCH *pssch_vars = &ue->pssch_vars[0];
pssch_vars->ulsch_power_tot = 0;
pssch_vars->ulsch_noise_power_tot = 0;
for (int aarx = 0; aarx < fp->nb_antennas_rx; aarx++) {
pssch_vars->ulsch_power[aarx] /= num_dmrs;
pssch_vars->ulsch_power_tot += pssch_vars->ulsch_power[aarx];
pssch_vars->ulsch_noise_power[aarx] /= num_dmrs;
pssch_vars->ulsch_noise_power_tot += pssch_vars->ulsch_noise_power[aarx];
}
if (dB_fixed_x10(pssch_vars->ulsch_power_tot) < dB_fixed_x10(pssch_vars->ulsch_noise_power_tot) + ue->pssch_thres) {
LOG_I(NR_PHY,
"PSSCH not detected in %d.%d (%d,%d,%d)\n",
frame_rx,
nr_slot_rx,
dB_fixed_x10(pssch_vars->ulsch_power_tot),
dB_fixed_x10(pssch_vars->ulsch_noise_power_tot),
ue->pssch_thres);
pssch_vars->ulsch_power_tot = pssch_vars->ulsch_noise_power_tot;
pssch_vars->DTX = 1;
//if (stats)
// stats->ulsch_stats.DTX++;
// nr_fill_indication(gNB, frame_rx, slot_rx, ULSCH_id, ulsch->harq_pid, 1, 1);
//pssch_DTX++;
// continue;
} else {
LOG_I(NR_PHY,
"PSSCH detected in %d.%d (%d,%d,%d)\n",
frame_rx,
nr_slot_rx,
dB_fixed_x10(pssch_vars->ulsch_power_tot),
dB_fixed_x10(pssch_vars->ulsch_noise_power_tot),
ue->pssch_thres);
pssch_vars->DTX = 0;
notifiedFIFO_t nf;
initNotifiedFIFO(&nf);
int totalDecode = nr_slsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, ulsch->harq_pid,proc,phy_data);
while (totalDecode > 0) {
notifiedFIFO_elt_t *req = pullTpool(&gNB->respDecode, &get_nrUE_params()->Tpool);
if (req == NULL)
break; // Tpool has been stopped
nr_postDecode_slsch(ue, proc, req);
delNotifiedFIFO_elt(req);
totalDecode--;
}
}
}
LOG_D(PHY,"****** end Sidelink RX-Chain for AbsSubframe %d.%d ******\n",
......
openair2/LAYER2/NR_MAC_UE/mac_defs.h
View file @ ba6a8554
......@@ -616,6 +616,8 @@ typedef struct {
// current SCI pdu build from SCI1 and SCI2
nr_sci_pdu_t sci_pdu_rx;
nr_sci_pdu_t sci1_pdu;
nr_sci_pdu_t sci2_pdu;
} NR_UE_MAC_INST_t;
/*@}*/
......
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @ ba6a8554
......@@ -3240,7 +3240,8 @@ uint8_t sl_determine_if_SSB_slot(uint16_t frame, uint16_t slot, uint16_t slots_p
frame, slot, sl_bch->ssb_slot,sl_bch->num_ssb);
return 0;
}
bool nr_ue_sl_pssch_scheduler(nr_sidelink_indication_t *sl_ind,
bool nr_ue_sl_pssch_scheduler(NR_UE_MAC_INST_t *mac,
nr_sidelink_indication_t *sl_ind,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_nr_tx_config_request_t *tx_config,
......@@ -3264,10 +3265,8 @@ bool nr_ue_sl_pssch_scheduler(nr_sidelink_indication_t *sl_ind,
LOG_D(NR_MAC,"[UE%d] SL-PSSCH SCHEDULER: Frame:SLOT %d:%d, slot_type:%d\n",
sl_ind->module_id, frame, slot,sl_ind->slot_type);
nr_sci_pdu_t sci_pdu;
nr_sci_pdu_t sci2_pdu;
uint16_t slsch_pdu_length;
bool schedule_slsch = nr_schedule_slsch(&sci_pdu,&sci2_pdu,tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu.slsch_payload,NR_SL_SCI_FORMAT_2A,&slsch_pdu_length);
bool schedule_slsch = nr_schedule_slsch(&mac->sci1_pdu,&mac->sci2_pdu,tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu.slsch_payload,NR_SL_SCI_FORMAT_2A,&slsch_pdu_length);
if (!schedule_slsch) return false;
*config_type = SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH;
......@@ -3278,8 +3277,8 @@ bool nr_ue_sl_pssch_scheduler(nr_sidelink_indication_t *sl_ind,
fill_pssch_pscch_pdu(&tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu,
sl_bwp,
sl_res_pool,
&sci_pdu,
&sci2_pdu,
&mac->sci1_pdu,
&mac->sci2_pdu,
slsch_pdu_length,
NR_SL_SCI_FORMAT_1A,
NR_SL_SCI_FORMAT_2A);
......@@ -3484,7 +3483,7 @@ void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind) {
}
if (!is_psbch_slot && tx_allowed) {
//Check if reserved slot or a sidelink resource configured in Rx/Tx resource pool timeresource bitmap
nr_ue_sl_pssch_scheduler(sl_ind, mac->sl_bwp, mac->sl_tx_res_pool,&tx_config, &tti_action);
nr_ue_sl_pssch_scheduler(mac,sl_ind, mac->sl_bwp, mac->sl_tx_res_pool,&tx_config, &tti_action);
}
if (tti_action == SL_NR_CONFIG_TYPE_RX_PSBCH || tti_action == SL_NR_CONFIG_TYPE_RX_PSCCH || tti_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SCI || tti_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH) {
......
openair2/LAYER2/NR_MAC_UE/nr_ue_sci_slsch.c
View file @ ba6a8554
......@@ -380,74 +380,74 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
//harq_pid; // 4 bits
fsize = 4;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->harq_pid >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->harq_pid >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
//ndi; // 1 bit
*sci2_payload |= ((uint64_t)sci2_pdu->ndi & 1) << (sci2_size - pos++);
*sci2_payload |= ((uint64_t)sci2_pdu->ndi & 1) << (sci2_size - pos++ -1);
//rv_index; // 2 bits
fsize = 2;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->rv_index >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->rv_index >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
//source_id; // 8 bits
fsize = 8;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->source_id >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->source_id >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
//dest_id; // 16 bits
fsize = 16;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->dest_id >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->dest_id >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
//harq_feedback; //1 bit
*sci2_payload |= ((uint64_t)sci2_pdu->harq_feedback & 1) << (sci2_size - pos++);
*sci2_payload |= ((uint64_t)sci2_pdu->harq_feedback & 1) << (sci2_size - pos++ -1);
if (format2==NR_SL_SCI_FORMAT_2A) {
//cast_type // 2 bits formac 2A
fsize = 2;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->cast_type >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->cast_type >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
}
if (format2==NR_SL_SCI_FORMAT_2C || format2==NR_SL_SCI_FORMAT_2A)
// csi_req // 1 bit format 2A, format 2C
*sci2_payload |= ((uint64_t)sci2_pdu->csi_req & 1) << (sci2_size - pos++);
*sci2_payload |= ((uint64_t)sci2_pdu->csi_req & 1) << (sci2_size - pos++ -1);
if (format2==NR_SL_SCI_FORMAT_2B) {
// zone_id // 12 bits format 2B
fsize = 12;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->zone_id >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->zone_id >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
// communication_range; // 4 bits depending on sl-ZoneConfigMCR-Index, format 2B
// note fill in for R17
if (0) {
fsize = 4;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->communication_range.val >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->communication_range.val >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
}
}
else if (format2==NR_SL_SCI_FORMAT_2C) {
// providing_req_ind; // 1 bit, format 2C
*sci2_payload |= ((uint64_t)sci2_pdu->providing_req_ind & 1) << (sci2_size - pos++);
*sci2_payload |= ((uint64_t)sci2_pdu->providing_req_ind & 1) << (sci2_size - pos++ -1);
// resource_combinations; // depending on n_subChannel^SL (sl-NumSubchennel), N_rsv_period (sl-ResourceReservePeriodList) and sl-MultiReservedResource, format 2C
if (0) {
fsize = 0;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->resource_combinations.val >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->resource_combinations.val >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
}
// first_resource_location; // 8 bits, format 2C
fsize = 8;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->first_resource_location >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->first_resource_location >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
// reference_slot_location; // depending on mu, format 2C
if (0) {
fsize = 0;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->reference_slot_location.val >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->reference_slot_location.val >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
}
// resource_set_type; // 1 bit, format 2C
*sci2_payload |= ((uint64_t)sci2_pdu->resource_set_type & 1) << (sci2_size - pos++);
*sci2_payload |= ((uint64_t)sci2_pdu->resource_set_type & 1) << (sci2_size - pos++ -1);
// lowest_subchannel_indices; // depending on n_subChannel^SL, format 2C
if (0) {
fsize = 0;
for (int i = 0; i < fsize; i++)
*sci2_payload |= (((uint64_t)sci2_pdu->lowest_subchannel_indices.val >> (fsize - i - 1)) & 1) << (sci2_size - pos++);
*sci2_payload |= (((uint64_t)sci2_pdu->lowest_subchannel_indices.val >> (fsize - i - 1)) & 1) << (sci2_size - pos++ -1);
}
//
}
......@@ -769,7 +769,6 @@ extract_pssch_sci_pdu(uint64_t *sci2_payload, int len,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu) {
int pos=0,fsize;
static ndi=1;
int sci2_size = nr_sci_size(sl_res_pool,sci_pdu,NR_SL_SCI_FORMAT_2A);
AssertFatal(sci2_size == len,"sci2a size %d is not the same sci_indication %d\n",sci2_size,len);
......
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