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Commit bd0c5f60 authored by Abhijith's avatar Abhijith
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Reverted no. of BWPs to 4

parent 94808d43
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Showing with 228 additions and 227 deletions
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ bd0c5f60
......@@ -1178,23 +1178,23 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
const double N_TA_max = Ta_max * bw_scaling * tc_factor;
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_BWP_Id_t ul_bwp = mac->UL_BWP_Id;
NR_BWP_Id_t dl_bwp = mac->DL_BWP_Id;
NR_BWP_Id_t dl_bwp = (mac->DL_BWP_Id == 0)? 1 : mac->DL_BWP_Id ;
NR_BWP_Id_t ul_bwp= (mac->UL_BWP_Id == 0)? 1 : mac->UL_BWP_Id ;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (mac->ULbwp[ul_bwp] &&
mac->ULbwp[ul_bwp]->bwp_Dedicated &&
mac->ULbwp[ul_bwp]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[ul_bwp]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[ul_bwp]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
if (mac->ULbwp[ul_bwp-1] &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac->ULbwp[ul_bwp] &&
mac->ULbwp[ul_bwp]->bwp_Common &&
mac->ULbwp[ul_bwp]->bwp_Common->pusch_ConfigCommon &&
mac->ULbwp[ul_bwp]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[ul_bwp]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
else if (mac->ULbwp[ul_bwp-1] &&
mac->ULbwp[ul_bwp-1]->bwp_Common &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
else if (mac->scc_SIB &&
mac->scc_SIB->uplinkConfigCommon &&
......@@ -1205,12 +1205,12 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}
long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_PDSCH_Config_t *pdsch_Config = (mac->DLbwp[dl_bwp] && mac->DLbwp[dl_bwp]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[dl_bwp]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
NR_PDSCH_Config_t *pdsch_Config = (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[dl_bwp] && mac->DLbwp[dl_bwp]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[dl_bwp] && mac->DLbwp[dl_bwp]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
else if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
......
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
View file @ bd0c5f60
This diff is collapsed.
openair2/LAYER2/NR_MAC_UE/config_ue.c
View file @ bd0c5f60
......@@ -639,14 +639,14 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
// check pdcch_Config, pdcch_ConfigCommon and DL BWP
// Check dedicated UL BWP and pass to MAC
for (int num_BWP = 1; num_BWP < MAX_NUM_BWP ;num_BWP++)
for (int num_BWP = 0; num_BWP < MAX_NUM_BWP ;num_BWP++)
{
mac->DLbwp[num_BWP] = scd->downlinkBWP_ToAddModList->list.array[num_BWP-1];
mac->ULbwp[num_BWP] = uplinkBWP_ToAddModList->list.array[num_BWP-1];
mac->DLbwp[num_BWP] = scd->downlinkBWP_ToAddModList->list.array[num_BWP];
mac->ULbwp[num_BWP] = uplinkBWP_ToAddModList->list.array[num_BWP];
}
mac->coreset[dl_bwp_id][coreset_id - 1] = controlResourceSetToAddModList->list.array[0];
mac->coreset[dl_bwp_id-1][coreset_id - 1] = controlResourceSetToAddModList->list.array[0];
AssertFatal(mac->ULbwp[ul_bwp_id]->bwp_Dedicated != NULL, "UL bwp_Dedicated is null\n");
AssertFatal(mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated != NULL, "UL bwp_Dedicated is null\n");
// check available Search Spaces in the searchSpacesToAddModList and pass to MAC
// note: the network configures at most 10 Search Spaces per BWP per cell (including UE-specific and common Search Spaces).
......@@ -654,10 +654,10 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
NR_SearchSpace_t *ss = searchSpacesToAddModList->list.array[ss_id];
AssertFatal(ss->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(ss->searchSpaceType != NULL, "ss->searchSpaceType is null\n");
AssertFatal(*ss->controlResourceSetId == mac->coreset[dl_bwp_id][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(*ss->controlResourceSetId == mac->coreset[dl_bwp_id-1][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(ss->monitoringSymbolsWithinSlot != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot is null\n");
AssertFatal(ss->monitoringSymbolsWithinSlot->buf != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[dl_bwp_id][0][ss_id] = ss;
mac->SSpace[dl_bwp_id-1][0][ss_id] = ss;
}
// Check available CSSs in the commonSearchSpaceList (list of additional common search spaces)
......@@ -665,11 +665,11 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
for (int css_id = 0; css_id < commonSearchSpaceList->list.count; css_id++) {
NR_SearchSpace_t *css = commonSearchSpaceList->list.array[css_id];
AssertFatal(css->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(*css->controlResourceSetId == mac->coreset[dl_bwp_id][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(*css->controlResourceSetId == mac->coreset[dl_bwp_id-1][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(css->searchSpaceType != NULL, "css->searchSpaceType is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[dl_bwp_id][coreset_id -1][ss_id] = css;
mac->SSpace[dl_bwp_id-1][coreset_id -1][ss_id] = css;
ss_id++;
}
......
openair2/LAYER2/NR_MAC_UE/mac_defs.h
View file @ bd0c5f60
......@@ -74,7 +74,7 @@
// ==========
#define NB_NR_UE_MAC_INST 1
#define MAX_NUM_BWP 5
#define MAX_NUM_BWP 4
#define NUM_SLOT_FRAME 10
/*!\brief value for indicating BSR Timer is not running */
......
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @ bd0c5f60
......@@ -84,14 +84,14 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
initialDownlinkBWP = scc!=NULL ? scc->downlinkConfigCommon->initialDownlinkBWP : &scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
initialUplinkBWP = scc!=NULL ? scc->uplinkConfigCommon->initialUplinkBWP : &scc_SIB->uplinkConfigCommon->initialUplinkBWP;
bwp_Common = dl_bwp_id>0 ? mac->DLbwp[dl_bwp_id]->bwp_Common : NULL;
bwp_Common = dl_bwp_id>0 ? mac->DLbwp[dl_bwp_id-1]->bwp_Common : NULL;
}
NR_SearchSpace_t *ss;
NR_ControlResourceSet_t *coreset;
if(ss_id>=0) {
ss = mac->SSpace[dl_bwp_id][coreset_id - 1][ss_id];
coreset = mac->coreset[dl_bwp_id][coreset_id - 1];
ss = mac->SSpace[dl_bwp_id-1][coreset_id - 1][ss_id];
coreset = mac->coreset[dl_bwp_id-1][coreset_id - 1];
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
} else {
ss = mac->search_space_zero;
......@@ -244,19 +244,19 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
RA_config_t *ra = &mac->ra;
int ss_id;
NR_BWP_Id_t bwp_id = (mac->cg) ? mac->DL_BWP_Id : 0;
NR_BWP_Id_t bwp_id = (mac->cg) ? ((mac->DL_BWP_Id == 0 ) ? 1: mac->DL_BWP_Id ): 0;
uint8_t coreset_id = (mac->cg) ? 1 : 0;
//NR_ServingCellConfig_t *scd = mac->scg->spCellConfig->spCellConfigDedicated;
NR_BWP_Downlink_t *bwp = (mac->cg) ? mac->DLbwp[bwp_id] : NULL;
NR_BWP_Downlink_t *bwp = (mac->cg) ? mac->DLbwp[bwp_id-1] : NULL;
LOG_D(MAC, "[DCI_CONFIG] ra_rnti %p (%x) crnti %p (%x) t_crnti %p (%x)\n", &ra->ra_rnti, ra->ra_rnti, &mac->crnti, mac->crnti, &ra->t_crnti, ra->t_crnti);
if (mac->cg) { // do this only after we have a Master or Secondary Cell group
// loop over all available SS for BWP ID 1, CORESET ID 1
if (bwp) {
for (ss_id = 0; ss_id < FAPI_NR_MAX_SS_PER_CORESET && mac->SSpace[bwp_id][coreset_id - 1][ss_id] != NULL; ss_id++){
for (ss_id = 0; ss_id < FAPI_NR_MAX_SS_PER_CORESET && mac->SSpace[bwp_id-1][coreset_id - 1][ss_id] != NULL; ss_id++){
LOG_D(MAC, "[DCI_CONFIG] ss_id %d\n",ss_id);
NR_SearchSpace_t *ss = mac->SSpace[bwp_id][coreset_id - 1][ss_id];
NR_SearchSpace_t *ss = mac->SSpace[bwp_id-1][coreset_id - 1][ss_id];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
NR_BWP_DownlinkCommon_t *bwp_Common = bwp->bwp_Common;
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
......
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @ bd0c5f60
This diff is collapsed.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ bd0c5f60
......@@ -380,7 +380,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
}
memset(RC.nrmac[module_idP]->cce_list[0][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
for(int i_bwp = 1; i_bwp < MAX_NUM_BWP; i_bwp++)
for(int i_bwp = 0; i_bwp < MAX_NUM_BWP; i_bwp++)
memset(RC.nrmac[module_idP]->cce_list[i_bwp][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid i
NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @ bd0c5f60
......@@ -988,7 +988,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
const int bwpid = bwp ? bwp->bwp_Id : 0;
const int coresetid = coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid-1][coresetid];
if (!pdcch_pdu_rel15) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
......@@ -997,7 +997,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
dl_req->nPDUs += 1;
pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, bwp);
nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15;
nr_mac->pdcch_pdu_idx[CC_id][bwpid-1][coresetid] = pdcch_pdu_rel15;
}
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
......@@ -1335,9 +1335,9 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
const int bwpid = bwp ? bwp->bwp_Id : 0;
const int bwpid = bwp ? bwp->bwp_Id : 1;
const int coresetid = coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][bwpid-1][coresetid];
if (!pdcch_pdu_rel15) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
......@@ -1346,7 +1346,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
dl_req->nPDUs += 1;
pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, bwp);
nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15;
nr_mac->pdcch_pdu_idx[CC_id][bwpid-1][coresetid] = pdcch_pdu_rel15;
}
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
......@@ -1459,7 +1459,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_DL_DCI_FORMAT_1_0,
NR_RNTI_TC,
pdsch_pdu_rel15->BWPSize,
bwpid);
(bwpid-1));
// Add padding header and zero rest out if there is space left
if (mac_pdu_length < harq->tb_size) {
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @ bd0c5f60
......@@ -60,8 +60,8 @@ static int loop_dcch_dtch = DL_SCH_LCID_DTCH;
void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *bwp)
{
gNB_MAC_INST *nrmac = RC.nrmac[module_id];
const int bwp_id = bwp ? bwp->bwp_Id : 0;
if (nrmac->preferred_dl_tda[bwp_id])
const int bwp_id = bwp ? bwp->bwp_Id : 1;
if (nrmac->preferred_dl_tda[bwp_id-1])
return;
/* there is a mixed slot only when in TDD */
......@@ -120,17 +120,17 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const int n = slots_per_frame[*scc->ssbSubcarrierSpacing];
nrmac->preferred_dl_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_dl_tda[bwp_id]));
nrmac->preferred_dl_tda[bwp_id-1] = malloc(n * sizeof(*nrmac->preferred_dl_tda[bwp_id-1]));
const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n;
for (int i = 0; i < n; ++i) {
nrmac->preferred_dl_tda[bwp_id][i] = -1;
nrmac->preferred_dl_tda[bwp_id-1][i] = -1;
if (!tdd || i % nr_slots_period < tdd->nrofDownlinkSlots)
nrmac->preferred_dl_tda[bwp_id][i] = 0;
nrmac->preferred_dl_tda[bwp_id-1][i] = 0;
else if (tdd && nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots)
nrmac->preferred_dl_tda[bwp_id][i] = tdaMi;
LOG_I(MAC, "slot %d preferred_dl_tda %d\n", i, nrmac->preferred_dl_tda[bwp_id][i]);
nrmac->preferred_dl_tda[bwp_id-1][i] = tdaMi;
LOG_I(MAC, "slot %d preferred_dl_tda %d\n", i, nrmac->preferred_dl_tda[bwp_id-1][i]);
}
}
......@@ -458,7 +458,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
const uint8_t num_dmrs_cdm_grps_no_data = sched_ctrl->active_bwp ? (f ? 1 : (ps->nrOfSymbols == 2 ? 1 : 2)) : (ps->nrOfSymbols == 2 ? 1 : 2);
int rbSize = 0;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id-1][slot] : 1;
if (tda == retInfo->time_domain_allocation) {
/* Check that there are enough resources for retransmission */
while (rbSize < retInfo->rbSize) {
......@@ -531,7 +531,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
slot);
int cid = sched_ctrl->coreset->controlResourceSetId;
UE_info->num_pdcch_cand[UE_id][cid]--;
int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id][cid];
int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id-1][cid];
for (int i = 0; i < sched_ctrl->aggregation_level; i++)
cce_list[sched_ctrl->cce_index + i] = 0;
return false;
......@@ -634,7 +634,7 @@ void pf_dl(module_id_t module_id,
*p = -1;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
int bwp_Id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
int bwp_Id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 1;
const uint16_t rnti = UE_info->rnti[UE_id];
NR_BWP_t *genericParameters = sched_ctrl->active_bwp ?
&sched_ctrl->active_bwp->bwp_Common->genericParameters:
......@@ -666,7 +666,7 @@ void pf_dl(module_id_t module_id,
slot);
int cid = sched_ctrl->coreset->controlResourceSetId;
UE_info->num_pdcch_cand[UE_id][cid]--;
int *cce_list = mac->cce_list[bwp_Id][cid];
int *cce_list = mac->cce_list[bwp_Id-1][cid];
for (int i = 0; i < sched_ctrl->aggregation_level; i++)
cce_list[sched_ctrl->cce_index + i] = 0;
return;
......@@ -679,7 +679,7 @@ void pf_dl(module_id_t module_id,
max_rbSize++;
/* MCS has been set above */
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id-1][slot] : 1;
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
......@@ -877,9 +877,9 @@ void nr_schedule_ue_spec(module_id_t module_id,
/* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not
* exist, create it */
const int bwpid = bwp ? bwp->bwp_Id : 0;
const int bwpid = bwp ? bwp->bwp_Id : 1;
const int coresetid = bwp ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][bwpid-1][coresetid];
if (!pdcch_pdu) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
......@@ -891,7 +891,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
NR_SearchSpace_t *ss = bwp ? sched_ctrl->search_space:gNB_mac->sched_ctrlCommon->search_space;
NR_ControlResourceSet_t *coreset = bwp? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset;
nr_configure_pdcch(pdcch_pdu, ss, coreset, scc, bwp);
gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu;
gNB_mac->pdcch_pdu_idx[CC_id][bwpid-1][coresetid] = pdcch_pdu;
}
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @ bd0c5f60
......@@ -354,7 +354,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
frame,
slot);
UE_info->num_pdcch_cand[UE_id][cid]--;
int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id][cid];
int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id-1][cid];
for (int i = 0; i < sched_ctrl->aggregation_level; i++)
cce_list[sched_ctrl->cce_index + i] = 0;
return;
......@@ -369,7 +369,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_pdsch->pucch_allocation = alloc;
sched_pdsch->rbStart = rbStart;
sched_pdsch->rbSize = rbSize;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id-1][slot] : 1;
const uint8_t num_dmrs_cdm_grps_no_data = 1;
if (ps->time_domain_allocation != tda || ps->numDmrsCdmGrpsNoData != num_dmrs_cdm_grps_no_data)
nr_set_pdsch_semi_static(
......@@ -422,7 +422,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
const int tda = sched_ctrl->active_ubwp ? RC.nrmac[module_id]->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 1;
const int tda = sched_ctrl->active_ubwp ? RC.nrmac[module_id]->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id-1][slot] : 1;
if (tda < 0)
return false;
const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList =
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ bd0c5f60
......@@ -188,7 +188,7 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
if(bwp == NULL || bwp->bwp_Id == 0) {
cce_list = nr_mac->cce_list[0][0];
} else {
cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id];
cce_list = nr_mac->cce_list[bwp->bwp_Id-1][coreset_id];
}
int n_rb=0;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @ bd0c5f60
......@@ -67,7 +67,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
{
gNB_MAC_INST *nrmac = RC.nrmac[module_id];
const int bwp_id = ubwp->bwp_Id;
if (nrmac->preferred_ul_tda[bwp_id])
if (nrmac->preferred_ul_tda[bwp_id-1])
return;
/* there is a mixed slot only when in TDD */
......@@ -153,18 +153,18 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const int n = slots_per_frame[*scc->ssbSubcarrierSpacing];
nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id]));
nrmac->preferred_ul_tda[bwp_id-1] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id-1]));
const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n;
for (int slot = 0; slot < n; ++slot) {
const int sched_slot = (slot + k2) % n;
nrmac->preferred_ul_tda[bwp_id][slot] = -1;
nrmac->preferred_ul_tda[bwp_id-1][slot] = -1;
if (!tdd || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots)
nrmac->preferred_ul_tda[bwp_id][slot] = 0;
nrmac->preferred_ul_tda[bwp_id-1][slot] = 0;
else if (tdd && nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots)
nrmac->preferred_ul_tda[bwp_id][slot] = tdaMi;
LOG_I(MAC, "DL slot %d UL slot %d preferred_ul_tda %d\n", slot, sched_slot, nrmac->preferred_ul_tda[bwp_id][slot]);
nrmac->preferred_ul_tda[bwp_id-1][slot] = tdaMi;
LOG_I(MAC, "DL slot %d UL slot %d preferred_ul_tda %d\n", slot, sched_slot, nrmac->preferred_ul_tda[bwp_id-1][slot]);
}
if (k2 < tdd->nrofUplinkSlots)
......@@ -853,7 +853,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
const uint8_t num_dmrs_cdm_grps_no_data = sched_ctrl->active_bwp ? 1 : 2;
const int tda = sched_ctrl->active_ubwp ? RC.nrmac[module_id]->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
const int tda = sched_ctrl->active_ubwp ? RC.nrmac[module_id]->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id-1][slot] : 0;
LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);
if (tda == retInfo->time_domain_allocation) {
/* Check the resource is enough for retransmission */
......@@ -1046,7 +1046,7 @@ void pf_ul(module_id_t module_id,
const uint8_t num_dmrs_cdm_grps_no_data = sched_ctrl->active_ubwp ? 1 : 2;
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
const int dci_format = sched_ctrl->active_ubwp ? (f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0) : NR_UL_DCI_FORMAT_0_0;
const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id-1][slot] : 0;
if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
......@@ -1142,7 +1142,7 @@ void pf_ul(module_id_t module_id,
const uint8_t num_dmrs_cdm_grps_no_data = sched_ctrl->active_ubwp ? 1 : 2;
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
const int dci_format = sched_ctrl->active_ubwp ? (f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0) : NR_UL_DCI_FORMAT_0_0;
const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id-1][slot] : 0;
if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
......@@ -1192,7 +1192,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
* schedule now (slot + k2 is not UL slot) */
int UE_id = UE_info->list.head;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
const int tda = sched_ctrl->active_ubwp ? nr_mac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
const int tda = sched_ctrl->active_ubwp ? nr_mac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id-1][slot] : 0;
if (tda < 0)
return false;
int K2 = get_K2(scc, sched_ctrl->active_ubwp, tda, mu);
......@@ -1543,11 +1543,11 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
/* look up the PDCCH PDU for this BWP and CORESET. If it does not exist,
* create it */
const int bwpid = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
const int bwpid = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 1;
NR_SearchSpace_t *ss = sched_ctrl->active_bwp ? sched_ctrl->search_space: RC.nrmac[module_id]->sched_ctrlCommon->search_space;
NR_ControlResourceSet_t *coreset = sched_ctrl->active_bwp? sched_ctrl->coreset: RC.nrmac[module_id]->sched_ctrlCommon->coreset;
const int coresetid = coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = pdcch_pdu_bwp_coreset[bwpid][coresetid];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = pdcch_pdu_bwp_coreset[bwpid-1][coresetid];
if (!pdcch_pdu) {
nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus];
memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t));
......@@ -1556,7 +1556,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
ul_dci_req->numPdus += 1;
nr_configure_pdcch(pdcch_pdu, ss, coreset, scc, sched_ctrl->active_bwp);
pdcch_pdu_bwp_coreset[bwpid][coresetid] = pdcch_pdu;
pdcch_pdu_bwp_coreset[bwpid-1][coresetid] = pdcch_pdu;
}
LOG_D(NR_MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot);
......@@ -1603,7 +1603,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ps->dci_format,
rnti_types[0],
pusch_pdu->bwp_size,
bwpid);
sched_ctrl->active_bwp? bwpid: 0);
memset(sched_pusch, 0, sizeof(*sched_pusch));
}
......
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @ bd0c5f60
......@@ -72,7 +72,7 @@
/* Defs */
#define MAX_NUM_BWP 5
#define MAX_NUM_BWP 4
#define MAX_NUM_CORESET 2
#define MAX_NUM_CCE 90
#define MAX_HARQ_ROUNDS 4
......
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