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OpenXG-RAN
Commit c4e86a3d authored by lfq's avatar lfq
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Merge branch '23w43b-dpdkrf' of http://git.opensource5g.org/openxg/ran into 23w43b-dpdkrf

parents 7ea52a11 a8f52dc2
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Showing with 471 additions and 128 deletions
openair1/PHY/MODULATION/nr_modulation.h
View file @ c4e86a3d
......@@ -81,6 +81,7 @@ void nr_ue_layer_mapping(int16_t *mod_symbs,
\param Ns Slot number (0..19)
\param sample_offset offset within rxdata (points to beginning of subframe)
*/
unsigned int cal_amp(int16_t *dataIn, int len);
int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
int32_t *rxdata,
......
openair1/PHY/MODULATION/slot_fep_nr.c
View file @ c4e86a3d
......@@ -34,6 +34,18 @@
#define LOG_I(A,B...) printf(A)
#endif*/
unsigned int cal_amp(int16_t *dataIn, int len)
{
int i;
unsigned int sumA = 0;
for(i=0;i<len;i++)
{
sumA += abs(dataIn[i]);
}
sumA = sumA/len;
return sumA;
}
int nr_slot_fep(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
......
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
View file @ c4e86a3d
......@@ -1386,6 +1386,21 @@ static void inner_rx (PHY_VARS_gNB *gNB,
pusch_vars->ul_valid_re_per_slot[symbol],
symbol,
rel15_ul->qam_mod_order);
unsigned int pusch_amp;
if (symbol == (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols - 1)) {
static int cnt = 0;
if (((cnt & 0x7F) == 0) || (cnt < 0x80))
//if ( (cnt < 0x100))
{
pusch_amp = cal_amp(&(rxFext[0][0]), rel15_ul->rb_size * NR_NB_SC_PER_RB);
//LOG_I(PHY, "UL AMP frame %d %d, symbol %d, rbs %d, res %d, time %d, freq %d \n", frame, slot, symbol, nb_re_pusch/12, nb_re_pusch, g_ul_time_amp[symbol], g_ul_freq_amp[symbol], pusch_amp);
LOG_I(PHY, "UL AMP frame %d %d, symbol %d, rbs %d, res %d, pusch amp %u \n", 0, slot, symbol, rel15_ul->rb_size, rel15_ul->rb_size * 12, pusch_amp);
}
cnt++;
}
}
static void nr_pusch_symbol_processing(void *arg)
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ c4e86a3d
......@@ -235,6 +235,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_
// This schedule RA procedure if not in phy_test mode
// Otherwise consider 5G already connected
if (get_softmodem_params()->phy_test == 0) {
if (slot != 10)
nr_schedule_RA(module_idP, frame, slot, &sched_info->UL_dci_req, &sched_info->DL_req, &sched_info->TX_req);
}
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @ c4e86a3d
......@@ -1865,7 +1865,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
}
ra->state = WAIT_Msg4_ACK;
LOG_I(NR_MAC,"UE %04x Generate msg4: feedback at %4d.%2d, payload %d bytes, next state WAIT_Msg4_ACK\n", ra->rnti, pucch->frame, pucch->ul_slot, harq->tb_size);
LOG_I(NR_MAC,"frameP %d %d UE %04x Generate msg4: feedback at %4d.%2d, payload %d bytes, next state WAIT_Msg4_ACK\n", frameP, slotP, ra->rnti, pucch->frame, pucch->ul_slot, harq->tb_size);
}
}
......
radio/DPDKRF/dpdkrf_lib.h
View file @ c4e86a3d
......@@ -8,7 +8,84 @@
#define TX_DATA_BUF_SLOTS 10
#define RX_DATA_BUF_SLOTS 10
#define PACKAGE_PER_SLOT 64
#define PACKAGE_2_FRAME 2560
#define SAMPLE_PER_SLOT (SAMPLE_PER_PACKAGE * PACKAGE_PER_SLOT)
#define SLOT_PER_FRAME 20
#define FRAME_SAMPLE_NUM (SAMPLE_PER_SLOT * SLOT_PER_FRAME)
/**
* init dpdk parameter, start dpdk thread.
* @param dpdkLoopCoreId
* core ID at which dpdk thread run.
* @param oaiLoopCoreId
* core ID at which OAI thread run,if < 0, disable OAI thread.
* @param antNum
* antenna number, only support 2 or 4.
* @param startDelay_us
* dpdk thread start delay, unit is us.
* @param logEnable
* a pointer to store the timestamp.
* @return
* -
*/
void Dpdk_device_init(int dpdkLoopCoreId,int oaiLoopCoreId, int antTxNum, int antRxNum, int startDelay, int logEnable);
/**
* receive 1 package data from port. the package may DATA or CTRL frame.
* this function is blocked until receive 1 package.
* @param sockId
* sock ID, can only be 0 or 1.
* @param buf
* 2 level buffer pointer. buf[0] will store antenna 0 data, and buf[1] will store antenna 1 data.
* these 2 buffer should be malloc before call this function.
* @param timestamp
* a pointer to store the timestamp.
* @return
* - the received data sample num.
*/
int dpdkrf_recvDataPack(int sockfd, uint8_t **buf, uint64_t *timestamp);
/**
* send 1 package data. the package may DATA or CTRL frame.
* for data frame, 1 package hold 2 antenna data, each antenna has half.
* @param sockId
* sock ID, can only be 0 or 1.
* @param buf
* 2 level buffer pointer. buf[0] store antenna 0 data, and buf[1] store antenna 1 data.
* @param nsamps
* package sample Number.
* @param ctrlFlag
* - 0 data frame, else control frame.
* @param timestamp
* package sequence Number, at which the data will appear at air.
* @return
* - 0: Success;
* - others: send failed.
*/
int dpdkrf_sendDataPack(int sockfd, uint8_t **buf, int nsamps, int flags, int sn);
//////////////////////////////////////////////////////////////////////////////////////////////
int32_t Dpdk_trx_rw(uint8_t **rx_buff, uint8_t **tx_buff, uint32_t nsamps, uint64_t *timestamp, int antTxNum, int antRxNum);
int32_t trx_dpdkrf_read(uint8_t **buff, uint32_t nsamps, uint64_t *timestamp, int cc);
int32_t trx_dpdkrf_write(uint8_t **buff, int nsamps, uint64_t timestamp, int cc);
void trx_dpdkrf_gainRx(int g1, int g2, int g3, int g4);
void trx_dpdkrf_gainTx(int g1, int g2, int g3, int g4);
void trx_dpdkrf_setFreq(int64_t freqTx, int64_t freqRx);
void radar_setTrig(int32_t *para);
void radar_setSerial(int8_t *data, int len);
void radar_gap_data(int32_t *data, int startPos, int len, int antIdx);
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
#define CTRL_CMD_HEADER 0x12345678
#define CTRL_CMD_TAIL 0xA5A5A5A5
#define CTRL_CMD_ID_CFG 0x1111
#define CTRL_CMD_ID_ROUT 0x8888
typedef struct
{
uint32_t header; // 0x12345678
......@@ -26,6 +103,14 @@ typedef struct
uint64_t rxFreq; // unit is Hz; <1000 will disable this para.
uint64_t txFreq; // unit is Hz; <1000 will disable this para.
int32_t trigEnable;
int32_t trig[24]; // 4 trig, each occupy 5 int, last 4 int reserved; base frame number, period, offset, width, inverse;
int32_t rfSerialFlag;
uint8_t rfSerialData[128];
int32_t freqOffsetIdxBB;
uint32_t crc;
uint32_t tail; // 0xA5A5A5A5
} STRUCT_CTRL_CMD_CFG_REQ;
......@@ -47,54 +132,34 @@ typedef struct
uint64_t rxFreq; // unit is Hz; <1000 will disable this para.
uint64_t txFreq; // unit is Hz; <1000 will disable this para.
int32_t trigEnable;
int32_t trig[24];
int32_t rfSerialFlag;
uint8_t rfSerialData[128];
int32_t freqOffsetIdxBB;
uint32_t crc;
uint32_t tail; // 0x5A5A5A5A
} STRUCT_CTRL_CMD_CFG_ACK;
int32_t Dpdk_trx_rw(uint8_t **rx_buff, uint8_t **tx_buff,uint32_t nsamps,uint64_t *timestamp);
void Dpdk_device_init(int lcore_id, int antNum, int startDelay, int logEnable);
typedef struct
{
uint32_t header; // 0x12345678
/**
* receive 1 package data from port. the package may DATA or CTRL frame.
* this function is blocked until receive 1 package.
* @param sockId
* sock ID, can only be 0 or 1.
* @param buf
* 2 level buffer pointer. buf[0] will store antenna 0 data, and buf[1] will store antenna 1 data.
* these 2 buffer should be malloc before call this function.
* @param timestamp
* a pointer to store the timestamp.
* @return
* - the received data sample num.
*/
int dpdkrf_recvDataPack(int sockfd, uint8_t **buf, int *timestamp);
uint16_t cmdType;
uint16_t enable;
/**
* send 1 package data. the package may DATA or CTRL frame.
* for data frame, 1 package hold 2 antenna data, each antenna has half.
* @param sockId
* sock ID, can only be 0 or 1.
* @param buf
* 2 level buffer pointer. buf[0] store antenna 0 data, and buf[1] store antenna 1 data.
* @param nsamps
* package sample Number.
* @param ctrlFlag
* - 0 data frame, else control frame.
* @param timestamp
* package sequence Number, at which the data will appear at air.
* @return
* - 0: Success;
* - others: send failed.
*/
int dpdkrf_sendDataPack(int sockfd, uint8_t **buf, int nsamps, int flags, int sn);
uint32_t antIdx;
uint32_t startPos;
uint32_t dataNumber;
int32_t trx_dpdkrf_read(uint8_t **buff, uint32_t nsamps, uint64_t *timestamp);
int32_t trx_dpdkrf_write(uint8_t **buff, int nsamps, uint64_t timestamp);
uint32_t data[1536];
int32_t trx_dpdkrf_write_ctrl(uint8_t **buff);
uint32_t crc;
uint32_t tail; // 0xA5A5A5A5
} STRUCT_GAP_DATA_REQ;
void *trx_dpdkrf_read_ctrl();
void plot(int type, void *data, int len);
#endif // HELLO_HELLO_H
\ No newline at end of file
#endif // DPDKRF_H
\ No newline at end of file
radio/DPDKRF/dpdkrf_oai.c
View file @ c4e86a3d
#include <rte_eal.h>
#include <rte_ethdev.h>
#include <rte_mbuf.h>
......@@ -33,7 +34,6 @@
#include "common/utils/LOG/log.h"
#define SAMPLE_PER_PACKAGE 960
#define ANT_PORT_NUM 2
int num_devices = 0;
......@@ -48,83 +48,21 @@ int gRxCtrlIdx = 0;
int gRxCtrlIdxRead = 0;
void trx_setMsgGainRx(void*buf, int g1, int g2, int g3, int g4)
{
STRUCT_CTRL_CMD_CFG_REQ *msg = buf;
memset(msg, 0, sizeof(STRUCT_CTRL_CMD_CFG_REQ));
msg->header = 0x12345678;
msg->cmdType = CTRL_CMD_ID_CFG;
msg->enable = 1;
msg->rfState = 1; // NO effect;
msg->digLoopMode = 3; // NO effect;
msg->rxGain[0] = g1;
msg->rxGain[1] = g2;
msg->rxGain[2] = g3;
msg->rxGain[3] = g4;
msg->txGain[0] = 100;
msg->txGain[1] = 100;
msg->txGain[2] = 100;
msg->txGain[3] = 100;
msg->txFreq = 0;
msg->rxFreq = 0;
return;
}
void trx_setMsgGainTx(void*buf, int g1, int g2, int g3, int g4)
{
STRUCT_CTRL_CMD_CFG_REQ *msg = buf;
memset(msg, 0, sizeof(STRUCT_CTRL_CMD_CFG_REQ));
msg->header = 0x12345678;
msg->cmdType = CTRL_CMD_ID_CFG;
msg->enable = 1;
msg->rfState = 1; // NO effect;
msg->digLoopMode = 3; // NO effect;
msg->rxGain[0] = 30;
msg->rxGain[1] = 30;
msg->rxGain[2] = 30;
msg->rxGain[3] = 30;
msg->txGain[0] = g1;
msg->txGain[1] = g2;
msg->txGain[2] = g3;
msg->txGain[3] = g4;
msg->txFreq = 0;
msg->rxFreq = 0;
return;
}
void* trx_dpdkrf_read_ctrl()
{
int t = (gRxCtrlIdx - gRxCtrlIdxRead + CTRL_BUF_NUM) % CTRL_BUF_NUM;
if (t != 0)
{
void*buff = &gRxCtrlBuf[gRxCtrlIdxRead * SAMPLE_PER_PACKAGE * 2];
gRxCtrlIdxRead++;
if (gRxCtrlIdxRead >= CTRL_BUF_NUM)
gRxCtrlIdxRead = 0;
return buff;
}
return 0;
}
int32_t trx_dpdkrf_write_ctrl(uint8_t **buff)
{
dpdkrf_sendDataPack(0, &buff[0], SAMPLE_PER_PACKAGE, 1, 0);
return 0;
}
int32_t test_dpdkrf_read (openair0_device *device, openair0_timestamp *ptimestamp, void **buff1, int nsamps, int cc){
void *buff[4];
for (int i = 0; i < ANT_PORT_NUM; i++)
for (int i = 0; i < cc; i++)
{
buff[i] = buff1[i];
}
if (ANT_PORT_NUM == 1)
for (int i = cc; i < 4; i++)
{
buff[1] = cache_rx[1];
buff[i] = cache_rx[1];
}
int32_t rr = trx_dpdkrf_read(buff, nsamps, ptimestamp);
int32_t rr = trx_dpdkrf_read(buff, nsamps, (uint64_t *)ptimestamp,cc);
return nsamps;
......@@ -133,40 +71,45 @@ int32_t test_dpdkrf_read (openair0_device *device, openair0_timestamp *ptimestam
int32_t test_dpdkrf_write (openair0_device *device,openair0_timestamp timestamp, void **buff1, int nsamps, int cc, int flags){
void *buff[4];
for (int i = 0; i < ANT_PORT_NUM; i++)
for (int i = 0; i < cc; i++)
{
buff[i] = buff1[i];
}
if (ANT_PORT_NUM == 1)
for (int i = cc; i < 4; i++)
{
buff[1] = cache_tx[1];
buff[i] = cache_tx[1];;
}
int32_t rr = trx_dpdkrf_write(buff,nsamps, timestamp);
int32_t rr = trx_dpdkrf_write(buff,nsamps, timestamp, cc);
return nsamps;
}
int trx_dpdkrf_start(openair0_device *device) {
openair0_config_t *openair0_cfg;
uint8_t **txpCtrlgain = rte_malloc(NULL, 4 * sizeof(uint8_t), 0);
uint8_t **rxpCtrlgain = rte_malloc(NULL, 4 * sizeof(uint8_t), 0);
for (int i = 0; i < 4; i++)
{
txpCtrlgain[i] = (uint8_t *)gTxCtrlBuf;
rxpCtrlgain[i] = (uint8_t *)gRxCtrlBuf;
}
LOG_I(HW, "[dpdkrf] Start dpdkrf ...\n");
Dpdk_device_init(15, 2, 5000000 * 5, 1);
trx_setMsgGainTx(gTxCtrlBuf, 0, 0, 0, 0);
txpCtrlgain[0] = (uint8_t *)gTxCtrlBuf;
trx_dpdkrf_write_ctrl(txpCtrlgain);
trx_setMsgGainRx(gRxCtrlBuf, 30, 30, 30, 30);
rxpCtrlgain[0] = (uint8_t *)gRxCtrlBuf;
trx_dpdkrf_write_ctrl(rxpCtrlgain);
openair0_cfg = device->openair0_cfg;
#if 1
Dpdk_device_init(14, 15, 2, 2 , 50000, 1);
sleep(1);
sleep(1);
trx_dpdkrf_setFreq((int64_t)openair0_cfg->rx_freq[0], (int64_t)openair0_cfg->tx_freq[0]);
printf("1freq = %ld %ld\n\n",(int64_t)(openair0_cfg->rx_freq[0]), (int64_t)(openair0_cfg->tx_freq[0]));
//trx_dpdkrf_setFreq(3747840000, 3747840000);
sleep(1);
trx_dpdkrf_gainTx(openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0]);
sleep(1);
trx_dpdkrf_gainRx(openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0]);
printf("txgains (0-30) %d, rxgains(30-0) %d\n", (int)(openair0_cfg->tx_gain[0]), (int)(openair0_cfg->rx_gain[0]));
#endif
return 0;
}
......@@ -183,17 +126,19 @@ int trx_dpdkrf_stop(openair0_device* device) {
}
int trx_dpdkrf_set_freq(openair0_device* device, openair0_config_t *openair0_cfg1) {
// printf("1freq = %ld %ld\n\n",openair0_cfg->rx_freq[0],openair0_cfg->tx_freq[0]);
printf("1freq = %d %d\n\n",(int)(openair0_cfg->rx_freq[0]), (int)(openair0_cfg->tx_freq[0]));
// uint8_t **txpCtrl = rte_malloc(NULL, 4 * sizeof(uint8_t), 0);
// trx_setMsgFreq(gTxCtrlBuf, (uint64_t)(openair0_cfg->rx_freq[0]),(uint64_t)(openair0_cfg->tx_freq[0]));
// txpCtrl[0] = (uint8_t *)gTxCtrlBuf;
// trx_dpdkrf_write_ctrl(txpCtrl);
trx_dpdkrf_setFreq(openair0_cfg->rx_freq[0], openair0_cfg->tx_freq[0]);
return(0);
}
int trx_dpdkrf_set_gains(openair0_device* device, openair0_config_t *openair0_cfg) {
if (openair0_cfg->rx_gain[0] > 65+openair0_cfg->rx_gain_offset[0]) {
LOG_E(HW, "[dpdkrf] Reduce RX Gain 0 by %f dB\n", openair0_cfg->rx_gain[0] - openair0_cfg->rx_gain_offset[0] - 65);
#if 0
if (openair0_cfg->rx_gain[0] > 65+openair0_cfg->rx_gain_offset[0]) {
LOG_E(HW, "[oxgrf] Reduce RX Gain 0 by %f dB\n", openair0_cfg->rx_gain[0] - openair0_cfg->rx_gain_offset[0] - 65);
return -1;
}
......@@ -204,6 +149,11 @@ int trx_dpdkrf_set_gains(openair0_device* device, openair0_config_t *openair0_cf
trx_setMsgGainTx(gTxCtrlBuf, (90 - tx_gain1) * 1000,(90 - tx_gain2) * 1000,100,100);
txpCtrl[0] = (uint8_t *)gTxCtrlBuf;
trx_dpdkrf_write_ctrl(txpCtrl);
#endif
trx_dpdkrf_gainTx(openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0]);
sleep(1);
trx_dpdkrf_gainTx(openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0]);
printf("txgains (0-30) %d, rxgains(30-0) %d\n", (int)(openair0_cfg->tx_gain[0]), (int)(openair0_cfg->rx_gain[0]));
return(0);
}
......@@ -293,6 +243,18 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
device->openair0_cfg = openair0_cfg;
device->priv = (void *)dpdkrf;
#if 0
Dpdk_device_init(14, 15, 2, 2 , 50000, 1);
sleep(1);
trx_dpdkrf_setFreq(openair0_cfg->rx_freq[0], openair0_cfg->tx_freq[0]);
//trx_dpdkrf_setFreq(3349380000, 3349380000);
sleep(1);
trx_dpdkrf_gainTx(openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0], openair0_cfg->tx_gain[0]);
sleep(1);
trx_dpdkrf_gainTx(openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0], openair0_cfg->rx_gain[0]);
printf("txgains (0-30) %d, rxgains(30-0) %d\n", (int)(openair0_cfg->tx_gain[0]), (int)(openair0_cfg->rx_gain[0]));
#endif
// rte_timer_setup();
return 0;
}
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