Commit cb17a253 authored by Ejaz Ahmed's avatar Ejaz Ahmed

Added Pre-configurations, created psfch pdu, scheduled psfch for transmission

parent 907130d9
......@@ -306,6 +306,7 @@ typedef struct {
union {
sl_nr_tx_config_psbch_pdu_t tx_psbch_config_pdu;
sl_nr_tx_config_pscch_pssch_pdu_t tx_pscch_pssch_config_pdu;
sl_nr_tx_config_psfch_pdu_t tx_psfch_config_pdu;
};
} sl_nr_tx_config_request_pdu_t;
......
......@@ -31,6 +31,7 @@
*/
#include "nr_dci.h"
# include "executables/softmodem-common.h"
void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id,
......@@ -63,7 +64,11 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
uint8_t f_ss=0,f_gh=0;
*u=0;
*v=0;
uint32_t c_init = 0;
uint32_t c_init = 0;
if (get_softmodem_params()->sl_mode) {
*u = n_id % 30;
return;
}
uint32_t x1,s; // TS 38.211 Subclause 5.2.1
int l = 32, minShift = ((2*nr_slot_tx+n_hop)<<3);
int tmpShift =0;
......@@ -135,12 +140,14 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
* - lprime: lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213]
*/
// alpha_init initialized to 2*PI/12=0.5235987756
uint8_t is_sidelink = get_softmodem_params()->sl_mode ? 1 : 0;
double alpha = 0.5235987756;
uint32_t c_init = n_id; // we initialize c_init again to calculate n_cs
uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint8_t n_cs=0;
int l = 32, minShift = (14*8*nr_slot_tx )+ 8*(lnormal+lprime);
int l = is_sidelink ? 0 : 32;
int minShift = (14*8*nr_slot_tx) + 8*(lnormal+lprime);
int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init);
......
......@@ -40,6 +40,7 @@
#include <openair1/PHY/CODING/nrSmallBlock/nr_small_block_defs.h>
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
# include "executables/softmodem-common.h"
#include "T.h"
//#define NR_UNIT_TEST 1
......
......@@ -759,6 +759,11 @@ int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response)
phy_data_tx->nr_sl_pssch_pscch_pdu.mcs,
phy_data_tx->nr_sl_pssch_pscch_pdu.tbslbrm);
break;
case SL_NR_CONFIG_TYPE_TX_PSFCH:
LOG_I(PHY, "Recvd CONFIG_TYPE_TX_PSFCH\n");
phy_data_tx->sl_tx_action = SL_NR_CONFIG_TYPE_TX_PSFCH;
phy_data_tx->nr_sl_psfch_pdu = sl_tx_config->tx_config_list[0].tx_psfch_config_pdu;
break;
default:
AssertFatal(0,"Incorrect sl_tx config req pdutype \n");
break;
......
......@@ -91,7 +91,7 @@ void nr_fill_sl_rx_indication(sl_nr_rx_indication_t *rx_ind,
rx_slsch_pdu->pdu = slsch_status->rdata->ulsch_harq->b;
rx_slsch_pdu->pdu_length = slsch_status->rdata->ulsch_harq->TBS;
rx_slsch_pdu->harq_pid = slsch_status->rdata->harq_pid;
rx_slsch_pdu->ack_nack = (slsch_status->rxok==true) ? 1 : 0;
rx_slsch_pdu->ack_nack = (slsch_status->rxok==true) ? 1 : 1; // Revert it, for testing only
if (slsch_status->rxok==true) ue->SL_UE_PHY_PARAMS.pssch.rx_ok++;
else ue->SL_UE_PHY_PARAMS.pssch.rx_errors[0]++;
......@@ -718,7 +718,19 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
tx_action = 1;
}
else if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSFCH) {
LOG_I(NR_PHY,"Generating PSFCH ( )\n");
LOG_I(NR_PHY,"Generating PSFCH ( )\n");
// phy_data->nr_sl_psfch_pdu.start_symbol_index = 0;
// phy_data->nr_sl_psfch_pdu.hopping_id = 1;
// phy_data->nr_sl_psfch_pdu.prb = 2;
// phy_data->nr_sl_psfch_pdu.initial_cyclic_shift = 0;
// phy_data->nr_sl_psfch_pdu.mcs = 1;
nr_generate_psfch0(ue,
txdataF,
fp,
AMP,
slot_tx,
&phy_data->nr_sl_psfch_pdu);
}
if (tx_action) {
LOG_D(PHY, "Sending SL data \n");
......
......@@ -575,7 +575,7 @@ typedef struct {
//// FAPI-like interface message
fapi_nr_ul_config_request_t *ul_config_request;
fapi_nr_dl_config_request_t *dl_config_request;
sl_nr_tx_config_psfch_pdu_t *sl_tx_config_psfch_pdu;
/// Interface module instances
nr_ue_if_module_t *if_module;
nr_phy_config_t phy_config;
......
......@@ -40,6 +40,13 @@
#define NR_DL_MAX_DAI (4) /* TS 38.213 table 9.1.3-1 Value of counter DAI for DCI format 1_0 and 1_1 */
#define NR_DL_MAX_NB_CW (2) /* number of downlink code word */
// 38.213 Table 16.3-1 set of cyclic shift pairs
static const int16_t table_16_3_1[4][6] = {
{0},
{0, 3},
{0, 2, 4},
{0, 1, 2, 3, 4, 5}
};
/**\brief initialize the field in nr_mac instance
\param module_id module id */
void nr_ue_init_mac(module_id_t module_idP);
......@@ -441,6 +448,8 @@ int nr_rrc_mac_config_req_sl_preconfig(module_id_t module_id,
uint8_t sync_source,
int srcid);
uint8_t count_PSFCH_PRBs_bits(uint8_t* buf, size_t size);
void nr_rrc_mac_transmit_slss_req(module_id_t module_id,
uint8_t *sl_mib_payload,
uint16_t tx_slss_id,
......
......@@ -70,7 +70,7 @@ bool nr_schedule_slsch(NR_UE_MAC_INST_t *mac, int frameP,int slotP, nr_sci_pdu_t
sci2_pdu->source_id=0x12;
sci2_pdu->dest_id=0xabcd;
sci2_pdu->harq_feedback=1;
sci2_pdu->cast_type=0;
sci2_pdu->cast_type=2;
if (format2==NR_SL_SCI_FORMAT_2C || format2==NR_SL_SCI_FORMAT_2A)
sci2_pdu->csi_req=1;
if (format2==NR_SL_SCI_FORMAT_2B)
......
......@@ -24,6 +24,10 @@
#define SL_DEBUG
static const int sequence_cyclic_shift_harq_ack_or_ack_or_only_nack[2]
/* Sequence cyclic shift */ = { 0, 6 };
uint8_t sl_process_TDD_UL_DL_config_patterns(NR_TDD_UL_DL_ConfigCommon_t *TDD_UL_DL_Config,
uint8_t mu,
double *slot_period_P,
......@@ -488,6 +492,12 @@ uint8_t sl_determine_sci_1a_len(uint16_t *num_subchannels,
const uint8_t psfch_periods[] = {0,1,2,4};
psfch_period = (psfch_config->sl_PSFCH_Period_r16)
? psfch_periods[*psfch_config->sl_PSFCH_Period_r16] : 0;
LOG_D(NR_MAC, "sl_PSFCH_Period_r16: %ld\n", *psfch_config->sl_PSFCH_Period_r16);
LOG_D(NR_MAC, "sl_PSFCH_RB_Set_r16: %02X\n", *psfch_config->sl_PSFCH_RB_Set_r16->buf);
LOG_D(NR_MAC, "sl_NumMuxCS_Pair_r16: %ld\n", *psfch_config->sl_NumMuxCS_Pair_r16);
LOG_D(NR_MAC, "sl_MinTimeGapPSFCH_r16: %ld\n", *psfch_config->sl_MinTimeGapPSFCH_r16);
LOG_D(NR_MAC, "sl_PSFCH_HopID_r16: %ld\n", *psfch_config->sl_PSFCH_HopID_r16);
LOG_D(NR_MAC, "sl_PSFCH_CandidateResourceType_r16: %ld\n", *psfch_config->sl_PSFCH_CandidateResourceType_r16);
}
if ((psfch_period == 2) || (psfch_period == 4)) {
......@@ -575,6 +585,43 @@ uint32_t sl_determine_num_sidelink_slots(uint8_t mod_id, uint16_t *N_SSB_16frame
return N_SL_SLOTS;
}
uint8_t count_PSFCH_PRBs_bits(uint8_t* buf, size_t size) {
uint8_t count = 0;
uint8_t byte;
for (size_t i = 0; i < size; i++) {
byte = buf[i];
while(byte) {
count += byte & 1;
byte >>= 1;
}
}
return count;
}
static uint16_t nr_ue_configure_psfch(int module_idP) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
if (!mac->sl_tx_res_pool->sl_PSFCH_Config_r16 &&
mac->sl_tx_res_pool->sl_PSFCH_Config_r16->present != NR_SetupRelease_SL_PSFCH_Config_r16_PR_setup)
return;
NR_SL_PSFCH_Config_r16_t *sl_psfch_config = mac->sl_tx_res_pool->sl_PSFCH_Config_r16->choice.setup;
const int sl_num_muxcs_pair[4] = {1, 2, 3, 6};
uint8_t sci2_src_id = mac->sci_pdu_rx.source_id;
uint8_t *rb_buf = sl_psfch_config->sl_PSFCH_RB_Set_r16->buf;
size_t size = sl_psfch_config->sl_PSFCH_RB_Set_r16->size / sizeof(rb_buf[0]);
uint8_t m_psfch_prb_set = count_PSFCH_PRBs_bits(rb_buf, size);
long sl_numsubchannel = *mac->sl_tx_res_pool->sl_NumSubchannel_r16;
long sl_psfch_period = *sl_psfch_config->sl_PSFCH_Period_r16;
long n_psfch_cs = *sl_psfch_config->sl_NumMuxCS_Pair_r16;
double m_psfch_subch_slot = m_psfch_prb_set / sl_numsubchannel * sl_psfch_period;
long n_psfch_type = *sl_psfch_config->sl_PSFCH_CandidateResourceType_r16 ? sl_numsubchannel : 1;
uint16_t r_psfch_prb_cs = n_psfch_type * m_psfch_subch_slot * sl_num_muxcs_pair[n_psfch_cs];
uint8_t psfch_rsc_idx = (sci2_src_id + module_idP) / r_psfch_prb_cs;
return table_16_3_1[n_psfch_cs][psfch_rsc_idx];
}
void nr_ue_process_mac_sl_pdu(int module_idP,
sl_nr_rx_indication_t *rx_ind,
int pdu_id)
......@@ -589,6 +636,30 @@ void nr_ue_process_mac_sl_pdu(int module_idP,
if (!pduP){
return;
}
LOG_I(NR_MAC, "Filling psfch pdu %d\n", module_idP);
if ((rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.ack_nack == 1) {
uint16_t m0 = nr_ue_configure_psfch(module_idP);
mac->sl_tx_config_psfch_pdu = calloc(1, sizeof(sl_nr_tx_config_psfch_pdu_t));
mac->sl_tx_config_psfch_pdu->initial_cyclic_shift = m0;
if (mac->sci1_pdu.second_stage_sci_format == 2 ||
mac->sci_pdu_rx.cast_type == 1 ||
mac->sci_pdu_rx.cast_type == 2) {
mac->sl_tx_config_psfch_pdu->mcs = sequence_cyclic_shift_harq_ack_or_ack_or_only_nack[1]; // TODO: Update to use index 0 as well.
} else if (mac->sci1_pdu.second_stage_sci_format == 1 ||
(mac->sci1_pdu.second_stage_sci_format == 1 && mac->sci_pdu_rx.cast_type == 3)) {
mac->sl_tx_config_psfch_pdu->mcs = sequence_cyclic_shift_harq_ack_or_ack_or_only_nack[0];
}
const uint8_t values[] = {7, 8, 9, 10, 11, 12, 13, 14};
NR_SL_BWP_Generic_r16_t *sl_bwp = mac->sl_bwp->sl_BWP_Generic_r16;
uint8_t sl_num_symbols = (sl_bwp->sl_LengthSymbols_r16) ?
values[*sl_bwp->sl_LengthSymbols_r16] : 0;
mac->sl_tx_config_psfch_pdu->start_symbol_index = mac->sl_bwp->sl_BWP_Generic_r16->sl_StartSymbol_r16 + sl_num_symbols - 2; // start_symbol_index has been used as lprime and lprime should be computed as lprime = start symbol + sl_LengthSymbols_r16 - 2
mac->sl_tx_config_psfch_pdu->hopping_id = *mac->sl_bwp->sl_BWP_PoolConfigCommon_r16->sl_TxPoolSelectedNormal_r16->list.array[0]->sl_ResourcePool_r16->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_HopID_r16;
mac->sl_tx_config_psfch_pdu->prb = 2;
}
if ((rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.ack_nack == 0)
return;
......
......@@ -3578,12 +3578,30 @@ void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind) {
if (!is_psbch_slot && tx_allowed) {
//Check if reserved slot or a sidelink resource configured in Rx/Tx resource pool timeresource bitmap
nr_ue_sl_pssch_scheduler(mac,sl_ind, mac->sl_bwp, mac->sl_tx_res_pool,&tx_config, &tti_action);
if (sl_ind->slot_type == SIDELINK_SLOT_TYPE_TX && mac->sci_pdu_rx.harq_feedback) {
NR_SL_PSFCH_Config_r16_t *sl_psfch_config = mac->sl_tx_res_pool->sl_PSFCH_Config_r16->choice.setup;
long psfch_period = *sl_psfch_config->sl_PSFCH_Period_r16;
long psfch_min_time_gap = *sl_psfch_config->sl_MinTimeGapPSFCH_r16;
sl_ind->slot_tx = (slot + psfch_min_time_gap) % NR_MAX_SLOTS_PER_FRAME;
if (slot + psfch_min_time_gap >= NR_MAX_SLOTS_PER_FRAME) {
sl_ind->frame_tx = (frame + 1) % 1024;
}
// Need to check further weather New slot is SIDELINK SLOT or not
//LOG_I(NR_MAC, "sl_ind->slot_type %d, slot: %d, psfch_period: %ld, slot_mod_psfch_period: %d\n", sl_ind->slot_type, slot, psfch_period, slot%psfch_period);
LOG_I(NR_MAC, "sci_pdu feedback %d, cast_type %d\n", mac->sci_pdu_rx.harq_feedback, mac->sci_pdu_rx.cast_type);
// Add further check based on HARQ-ACK indication in SCI
if (slot%psfch_period == 0) {
LOG_I(NR_MAC,"Scheduling PSFCH TX processing slot %d\n", slot);
nr_ue_sl_psfch_scheduler(mac, sl_ind, mac->sl_bwp, mac->sl_tx_res_pool, &tx_config, &tti_action);
}
}
}
if (tti_action == SL_NR_CONFIG_TYPE_RX_PSBCH || tti_action == SL_NR_CONFIG_TYPE_RX_PSCCH || tti_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SCI || tti_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH) {
fill_scheduled_response(&scheduled_response, NULL, NULL, NULL, &rx_config, NULL, mod_id, 0,frame, slot, sl_ind->phy_data);
}
if (tti_action == SL_NR_CONFIG_TYPE_TX_PSBCH || tti_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH) {
if (tti_action == SL_NR_CONFIG_TYPE_TX_PSBCH || tti_action == SL_NR_CONFIG_TYPE_TX_PSFCH || tti_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH) {
fill_scheduled_response(&scheduled_response, NULL, NULL, NULL, NULL, &tx_config, mod_id, 0,frame, slot, sl_ind->phy_data);
}
......@@ -3599,3 +3617,48 @@ void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind) {
}
}
void nr_ue_sl_psfch_scheduler(NR_UE_MAC_INST_t *mac,
nr_sidelink_indication_t *sl_ind,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_nr_tx_config_request_t *tx_config,
uint8_t *config_type) {
LOG_I(NR_MAC,"PSFCH %s\n", __FUNCTION__);
uint8_t ret_status = 0;
uint16_t slot = sl_ind->slot_tx;
uint16_t frame = sl_ind->frame_tx;
int lcid = 4;
int sdu_length = 0;
if ((frame & 127) == 0 && slot == 0) {
print_meas(&mac->rlc_data_req,"rlc_data_req",NULL,NULL);
}
if (sl_ind->slot_type != SIDELINK_SLOT_TYPE_TX) return false;
if (slot > 9 && get_nrUE_params()->sync_ref) return false;
if (slot < 10 && !get_nrUE_params()->sync_ref) return false;
/*
if ((frame&127) > 0) return false;
if ((slot % 10) != 6) return false;
*/
LOG_I(NR_MAC,"[UE%d] SL-PSFCH SCHEDULER: Frame:SLOT %d:%d, slot_type:%d\n",
sl_ind->module_id, frame, slot,sl_ind->slot_type);
sl_nr_tx_config_psfch_pdu_t *tx_psfch_pdu = &tx_config->tx_config_list[0].tx_psfch_config_pdu;
tx_psfch_pdu->start_symbol_index = 0;
tx_psfch_pdu->hopping_id = 1;
tx_psfch_pdu->prb = 2;
tx_psfch_pdu->initial_cyclic_shift = 0;
tx_psfch_pdu->mcs = 1;
const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG);
*config_type = SL_NR_CONFIG_TYPE_TX_PSFCH;
tx_config->number_pdus = 1;
tx_config->sfn = frame;
tx_config->slot = slot;
tx_config->tx_config_list[0].pdu_type = *config_type;
//TODO: Add PSFCH related further configurations.
}
\ No newline at end of file
......@@ -249,6 +249,7 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
if (num_psfch_symbols == 3) num_psfch_symbols++;
}
nr_sl_pssch_pscch_pdu->pssch_numsym=7+*sl_bwp->sl_BWP_Generic_r16->sl_LengthSymbols_r16-num_psfch_symbols-2;
LOG_I(NR_PHY, "num_psfch_symbols %d, sl_LengthSymbols: %d, pssch_numsym: %d\n", num_psfch_symbols, *sl_bwp->sl_BWP_Generic_r16->sl_LengthSymbols_r16, nr_sl_pssch_pscch_pdu->pssch_numsym);
nr_sl_pssch_pscch_pdu->pssch_startsym = *sl_bwp->sl_BWP_Generic_r16->sl_StartSymbol_r16;
nr_sl_pssch_pscch_pdu->sci2_beta_offset = *sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_BetaOffsets2ndSCI_r16->list.array[sci_pdu->beta_offset_indicator];
......
......@@ -132,8 +132,40 @@ static void prepare_NR_SL_ResourcePool(NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16 = calloc(1,sizeof(*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16));
*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16 = NR_SL_PSSCH_Config_r16__sl_Scaling_r16_f0p5;
//PSFCH configuration
sl_res_pool->sl_PSFCH_Config_r16 = NULL;
// PSFCH configuration
sl_res_pool->sl_PSFCH_Config_r16 = calloc(1, sizeof(*sl_res_pool->sl_PSFCH_Config_r16));
sl_res_pool->sl_PSFCH_Config_r16->present = NR_SetupRelease_SL_PSFCH_Config_r16_PR_setup;
sl_res_pool->sl_PSFCH_Config_r16->choice.setup = calloc(1, sizeof(NR_SL_PSFCH_Config_r16_t));
// Period of PSFCH resource in the unit of slots within this resource pool. If set to sl0, no resource for PSFCH,
//and HARQ feedback for all transmissions in the resource pool is disabled.
// {sl0, sl1, sl2, sl4}
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_Period_r16 = calloc(1, sizeof(long));
*sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_Period_r16 = NR_SL_PSFCH_Config_r16__sl_PSFCH_Period_r16_sl1;
// Set of PRBs that are actually used for PSFCH transmission and reception (bitmap)
// 0b10101010101010101010101010101010101010101010101001 (PRBs bitmap)
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_RB_Set_r16 = calloc(1, sizeof(*sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_RB_Set_r16));
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_RB_Set_r16->size = 7;
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_RB_Set_r16->bits_unused = 6;
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_RB_Set_r16->buf = calloc(sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_RB_Set_r16->size, sizeof(uint8_t));
memset(sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_RB_Set_r16->buf, 0xAA, 6); // 48 bits
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_RB_Set_r16->buf[6] = (0b01 << 6); // 2 bits
// Number of cyclic shift pairs used for a PSFCH transmission that can be multiplexed in a PRB
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_NumMuxCS_Pair_r16 = calloc(1, sizeof(long));
*sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_NumMuxCS_Pair_r16 = NR_SL_PSFCH_Config_r16__sl_NumMuxCS_Pair_r16_n2;
// The minimum time gap between PSFCH and the associated PSSCH in the unit of slots {sl2, sl3}
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_MinTimeGapPSFCH_r16 = calloc(1, sizeof(long));
*sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_MinTimeGapPSFCH_r16 = NR_SL_PSFCH_Config_r16__sl_MinTimeGapPSFCH_r16_sl2;
// Scrambling ID {0..1023} for sequence hopping of the PSFCH used in the resource pool
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_HopID_r16 = calloc(1, sizeof(long));
*sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_HopID_r16 = 1;
// Indicates the number of PSFCH resources available {startSubCH, allocSubCH} for multiplexing HARQ-ACK information in a PSFCH transmission
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_CandidateResourceType_r16 = calloc(1, sizeof(long));
*sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_CandidateResourceType_r16 = NR_SL_PSFCH_Config_r16__sl_PSFCH_CandidateResourceType_r16_startSubCH;
// indicates allowed sync sources which are allowed to use this resource pool
sl_res_pool->sl_SyncAllowed_r16 = calloc(1, sizeof(NR_SL_SyncAllowed_r16_t));
......
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