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lizhongxiao
OpenXG-RAN
Commits
cfc0965a
Commit
cfc0965a
authored
May 08, 2018
by
Raymond Knopp
Browse files
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Plain Diff
RRC->MAC->PHY configuraiton
parent
45b5d75f
Changes
8
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Showing
8 changed files
with
166 additions
and
100 deletions
+166
-100
openair1/PHY/LTE_TRANSPORT/defs.h
openair1/PHY/LTE_TRANSPORT/defs.h
+16
-14
openair1/PHY/LTE_TRANSPORT/slsch.c
openair1/PHY/LTE_TRANSPORT/slsch.c
+28
-28
openair1/PHY/extern.h
openair1/PHY/extern.h
+3
-3
openair1/PHY/vars.h
openair1/PHY/vars.h
+7
-3
openair1/SIMULATION/LTE_PHY/slschsim.c
openair1/SIMULATION/LTE_PHY/slschsim.c
+9
-3
openair2/COMMON/platform_types.h
openair2/COMMON/platform_types.h
+1
-1
openair2/LAYER2/MAC/config_ue.c
openair2/LAYER2/MAC/config_ue.c
+40
-5
openair2/RRC/LITE/rrc_UE.c
openair2/RRC/LITE/rrc_UE.c
+62
-43
No files found.
openair1/PHY/LTE_TRANSPORT/defs.h
View file @
cfc0965a
...
...
@@ -872,16 +872,8 @@ typedef enum {
typedef
struct
{
// SL Configuration
/// Number of SL resource blocks (1-100)
uint32_t
N_SL_RB
;
/// prb-start (0-99)
uint32_t
prb_Start
;
/// prb-End (0-99)
uint32_t
prb_End
;
/// SL-OffsetIndicator (0-10239)
uint32_t
SL_OffsetIndicator
;
uint16_t
slss_id
;
uint8_t
slmib_length
;
uint8_t
slmib
[
5
];
...
...
@@ -890,16 +882,26 @@ typedef struct {
typedef
struct
{
// SL Configuration
/// Number of SL resource blocks (1-100)
uint32_t
N_SL_RB
;
/// prb-start (0-99)
uint32_t
prb_Start
;
/// prb-End (0-99)
uint32_t
prb_End
;
/// Number of SL resource blocks (1-100) for SCI
uint32_t
N_SL_RB_SC
;
/// prb-start (0-99) for SCI
uint32_t
prb_Start_SC
;
/// prb-End (0-99) for SCI
uint32_t
prb_End_SC
;
/// Number of SL resource blocks (1-100) for SCI
uint32_t
N_SL_RB_data
;
/// prb-start (0-99) for SCI
uint32_t
prb_Start_data
;
/// prb-End (0-99) for SCI
uint32_t
prb_End_data
;
/// SL-OffsetIndicator (0-10239)
uint32_t
SL_OffsetIndicator
;
/// SL-OffsetIndicator data (0-10239)
uint32_t
SL_OffsetIndicator_data
;
/// SC-SC_Period
uint32_t
SL_SC_Period
;
/// SC bitmap length (subframes)
uint32_t
SubframeBitmapSL_length
;
/// PSCCH subframe bitmap, first 64-bits (up to 40 bits for Rel 12)
uint64_t
bitmap1
;
/// PSCCH subframe bitmap, 2nd 64-bits (up to 100 bits for Rel 14)
...
...
openair1/PHY/LTE_TRANSPORT/slsch.c
View file @
cfc0965a
...
...
@@ -87,7 +87,7 @@ uint64_t sci_mapping(PHY_VARS_UE *ue) {
AssertFatal
(
slsch
->
freq_hopping_flag
<
2
,
"freq_hop %d >= 2
\n
"
,
slsch
->
freq_hopping_flag
);
uint64_t
freq_hopping_flag
=
(
uint64_t
)
slsch
->
freq_hopping_flag
;
uint64_t
RAbits
=
log2_approx
(
slsch
->
N_SL_RB
*
((
slsch
->
N_SL_RB
+
1
)
>>
1
));
uint64_t
RAbits
=
log2_approx
(
slsch
->
N_SL_RB
_data
*
((
slsch
->
N_SL_RB_data
+
1
)
>>
1
));
AssertFatal
(
slsch
->
resource_block_coding
<
(
1
<<
RAbits
),
"slsch->resource_block_coding %x >= %x
\n
"
,
slsch
->
resource_block_coding
,(
1
<<
RAbits
));
uint64_t
resource_block_coding
=
(
uint64_t
)
slsch
->
resource_block_coding
;
...
...
@@ -356,7 +356,7 @@ void pscch_codingmodulation(PHY_VARS_UE *ue,int frame_tx,int subframe_tx,uint32_
sci
=
sci_mapping
(
ue
);
LOG_I
(
PHY
,
"sci %lx
\n
"
,
sci
);
int
length
=
log2_approx
(
slsch
->
N_SL_RB
*
((
ue
->
slsch_rx
.
N_SL_RB
+
1
)
>>
1
))
+
32
;
int
length
=
log2_approx
(
slsch
->
N_SL_RB
_SC
*
((
ue
->
slsch_rx
.
N_SL_RB_SC
+
1
)
>>
1
))
+
32
;
// for (int i=0;i<(length+7)/8;i++) printf("sci[%d] %x\n",i,((uint8_t *)&sci)[i]);
uint8_t
sci_flip
[
8
];
...
...
@@ -404,10 +404,10 @@ void pscch_codingmodulation(PHY_VARS_UE *ue,int frame_tx,int subframe_tx,uint32_
// convert a to prb number and compute slot
// get index within slot (first half of the prbs in slot 0, second half in 1)
uint32_t
amod
=
a
%
(
slsch
->
N_SL_RB
);
uint32_t
amod
=
a
%
(
slsch
->
N_SL_RB
_SC
);
if
(
amod
<
(
slsch
->
N_SL_RB
>>
1
))
nprb
=
slsch
->
prb_Start
+
amod
;
else
nprb
=
slsch
->
prb_End
-
(
slsch
->
N_SL_RB
>>
1
)
+
amod
;
if
(
amod
<
(
slsch
->
N_SL_RB
_SC
>>
1
))
nprb
=
slsch
->
prb_Start_SC
+
amod
;
else
nprb
=
slsch
->
prb_End_SC
-
(
slsch
->
N_SL_RB_SC
>>
1
)
+
amod
;
// Fill in power control later
...
...
@@ -626,7 +626,7 @@ void check_and_generate_pssch(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,int frame_tx,
AssertFatal
(
subframe_tx
<
10
&&
subframe_tx
>=
0
,
"subframe %d is illegal
\n
"
,
subframe_tx
);
SLSCH_t
*
slsch
=
ue
->
slsch
;
AssertFatal
(
slsch
!=
NULL
,
"SLSCH is null
\n
"
);
uint32_t
O
=
ue
->
slsch
->
SL_OffsetIndicator
;
uint32_t
O
=
ue
->
slsch
->
SL_OffsetIndicator
_data
;
uint32_t
P
=
ue
->
slsch
->
SL_SC_Period
;
uint32_t
absSF
=
(
frame_tx
*
10
)
+
subframe_tx
;
uint32_t
absSF_offset
,
absSF_modP
;
...
...
@@ -643,10 +643,10 @@ void check_and_generate_pssch(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,int frame_tx,
absSF_modP
=
absSF_offset
%
P
;
// This is the condition for short SCCH bitmap (
40
bits), check that the current subframe is for SLSCH
if
(
absSF_modP
<
40
)
return
;
// This is the condition for short SCCH bitmap (
slsch->SubframeBitmapSL_length
bits), check that the current subframe is for SLSCH
if
(
absSF_modP
<
slsch
->
SubframeBitmapSL_length
)
return
;
absSF_modP
-=
40
;
absSF_modP
-=
slsch
->
SubframeBitmapSL_length
;
AssertFatal
(
slsch
->
time_resource_pattern
<=
TRP8_MAX
,
...
...
@@ -692,8 +692,8 @@ void check_and_generate_pscch(PHY_VARS_UE *ue,int frame_tx,int subframe_tx) {
absSF_modP
=
absSF_offset
%
P
;
// This is the condition for short SCCH bitmap (
40
bits), check that the current subframe is for SCCH
if
(
absSF_modP
>
39
)
{
// This is the condition for short SCCH bitmap (
slsch->SubframeBitmapSL_length
bits), check that the current subframe is for SCCH
if
(
absSF_modP
>
=
slsch
->
SubframeBitmapSL_length
)
{
ue
->
pscch_coded
=
0
;
ue
->
pscch_generated
=
0
;
return
;
...
...
@@ -703,18 +703,18 @@ void check_and_generate_pscch(PHY_VARS_UE *ue,int frame_tx,int subframe_tx) {
if
((
SFpos
&
slsch
->
bitmap1
)
==
0
)
return
;
// if we get here, then there is a PSCCH subframe for a potential transmission
uint32_t
sf_index
=
40
,
LPSCCH
=
0
;
for
(
int
i
=
0
;
i
<
40
;
i
++
)
{
uint32_t
sf_index
=
slsch
->
SubframeBitmapSL_length
,
LPSCCH
=
0
;
for
(
int
i
=
0
;
i
<
slsch
->
SubframeBitmapSL_length
;
i
++
)
{
if
(
i
==
absSF_modP
)
sf_index
=
LPSCCH
;
if
(((((
uint64_t
)
1
)
<<
i
)
&
slsch
->
bitmap1
)
>
0
)
LPSCCH
++
;
}
AssertFatal
(
sf_index
<
40
,
"sf_index not set, should not happen (absSF_modP %d)
\n
"
,
absSF_modP
);
AssertFatal
(
sf_index
<
slsch
->
SubframeBitmapSL_length
,
"sf_index not set, should not happen (absSF_modP %d)
\n
"
,
absSF_modP
);
// sf_index now contains the SF index in 0...LPSCCH-1
// LPSCCH has the number of PSCCH subframes
// number of resources blocks per slot times 2 slots
uint32_t
M_RB_PSCCH_RP
=
slsch
->
N_SL_RB
*
LPSCCH
<<
1
;
uint32_t
M_RB_PSCCH_RP
=
slsch
->
N_SL_RB
_SC
*
LPSCCH
<<
1
;
AssertFatal
(
slsch
->
n_pscch
<
(
M_RB_PSCCH_RP
>>
1
)
*
LPSCCH
,
"n_pscch not in 0..%d
\n
"
,
((
M_RB_PSCCH_RP
>>
1
)
*
LPSCCH
)
-
1
);
// hard-coded to transmission mode one for now (Section 14.2.1.1 from 36.213 Rel14.3)
...
...
@@ -783,7 +783,7 @@ void pscch_decoding(PHY_VARS_UE *ue,int frame_rx,int subframe_rx,int a,int slot)
int
Nsymb
=
7
-
slot
;
SLSCH_t
*
slsch
=
&
ue
->
slsch_rx
;
uint32_t
amod
=
a
%
(
slsch
->
N_SL_RB
);
uint32_t
amod
=
a
%
(
slsch
->
N_SL_RB
_SC
);
int16_t
**
rxdataF_ext
=
ue
->
pusch_slcch
->
rxdataF_ext
;
int16_t
**
drs_ch_estimates
=
ue
->
pusch_slcch
->
drs_ch_estimates
;
int16_t
**
rxdataF_comp
=
ue
->
pusch_slcch
->
rxdataF_comp
;
...
...
@@ -799,8 +799,8 @@ void pscch_decoding(PHY_VARS_UE *ue,int frame_rx,int subframe_rx,int a,int slot)
if
(
amod
<
(
slsch
->
N_SL_RB
>>
1
))
nprb
=
slsch
->
prb_Start
+
amod
;
else
nprb
=
slsch
->
prb_End
-
(
slsch
->
N_SL_RB
>>
1
)
+
amod
;
if
(
amod
<
(
slsch
->
N_SL_RB
_SC
>>
1
))
nprb
=
slsch
->
prb_Start_SC
+
amod
;
else
nprb
=
slsch
->
prb_End_SC
-
(
slsch
->
N_SL_RB_SC
>>
1
)
+
amod
;
// slot FEP
if
(
ue
->
sl_fep_done
==
0
)
{
...
...
@@ -980,7 +980,7 @@ void pscch_decoding(PHY_VARS_UE *ue,int frame_rx,int subframe_rx,int a,int slot)
uint16_t
res
;
uint64_t
sci_rx
=
0
,
sci_rx_flip
=
0
;
//decoding
int
length
=
log2_approx
(
slsch
->
N_SL_RB
*
((
ue
->
slsch_rx
.
N_SL_RB
+
1
)
>>
1
))
+
32
;
int
length
=
log2_approx
(
slsch
->
N_SL_RB
_SC
*
((
ue
->
slsch_rx
.
N_SL_RB_SC
+
1
)
>>
1
))
+
32
;
dci_decoding
(
length
,
E
,
f
,(
uint8_t
*
)
&
sci_rx
);
((
uint8_t
*
)
&
sci_rx_flip
)[
0
]
=
((
uint8_t
*
)
&
sci_rx
)[
7
];
((
uint8_t
*
)
&
sci_rx_flip
)[
1
]
=
((
uint8_t
*
)
&
sci_rx
)[
6
];
...
...
@@ -1083,27 +1083,27 @@ void rx_slcch(PHY_VARS_UE *ue,int frame_rx,int subframe_rx) {
if
(
absSF_modP
==
0
)
ue
->
slcch_received
=
0
;
// This is the condition for short SCCH bitmap (
40
bits), check that the current subframe is for SCCH
// This is the condition for short SCCH bitmap (
slsch->SubframeBitmapSL_length
bits), check that the current subframe is for SCCH
if
(
ue
->
slcch_received
==
1
)
return
;
if
(
absSF_modP
>
39
)
return
;
if
(
absSF_modP
>
=
slsch
->
SubframeBitmapSL_length
)
return
;
uint64_t
SFpos
=
((
uint64_t
)
1
)
<<
absSF_modP
;
if
((
SFpos
&
slsch
->
bitmap1
)
==
0
)
return
;
// if we get here, then there is a PSCCH subframe for a potential transmission
uint32_t
sf_index
=
40
,
LPSCCH
=
0
;
for
(
int
i
=
0
;
i
<
40
;
i
++
)
{
uint32_t
sf_index
=
slsch
->
SubframeBitmapSL_length
,
LPSCCH
=
0
;
for
(
int
i
=
0
;
i
<
slsch
->
SubframeBitmapSL_length
;
i
++
)
{
if
(
i
==
absSF_modP
)
sf_index
=
LPSCCH
;
if
(((((
uint64_t
)
1
)
<<
i
)
&
slsch
->
bitmap1
)
>
0
)
LPSCCH
++
;
}
AssertFatal
(
sf_index
<
40
,
"sf_index not set, should not happen
\n
"
);
AssertFatal
(
sf_index
<
slsch
->
SubframeBitmapSL_length
,
"sf_index not set, should not happen
\n
"
);
// sf_index now contains the SF index in 0...LPSCCH-1
// LPSCCH has the number of PSCCH subframes
// 2 SLSCH/SLCCH resource block regions subframe times number of resources blocks per slot times 2 slots
uint32_t
M_RB_PSCCH_RP
=
slsch
->
N_SL_RB
*
LPSCCH
<<
1
;
uint32_t
M_RB_PSCCH_RP
=
slsch
->
N_SL_RB
_SC
*
LPSCCH
<<
1
;
AssertFatal
(
slsch
->
n_pscch
<
(
M_RB_PSCCH_RP
>>
1
)
*
LPSCCH
,
"n_pscch not in 0..%d
\n
"
,
((
M_RB_PSCCH_RP
>>
1
)
*
LPSCCH
)
-
1
);
// hard-coded to transmission mode one for now (Section 14.2.1.1 from 36.213 Rel14.3)
...
...
@@ -1453,8 +1453,8 @@ void rx_slsch(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, int frame_rx,int subframe_rx
absSF_modP
=
absSF_offset
%
P
;
// This is the condition for short SCCH bitmap (
40
bits), check that the current subframe is for SCCH
if
(
absSF_modP
<
40
)
return
;
// This is the condition for short SCCH bitmap (
slsch->SubframeBitmapSL_length
bits), check that the current subframe is for SCCH
if
(
absSF_modP
<
slsch
->
SubframeBitmapSL_length
)
return
;
LOG_I
(
PHY
,
"Checking pssch for absSF %d (trp mask %d, rv %d)
\n
"
,
absSF
,
trp8
[
slsch
->
time_resource_pattern
][
absSF_modP
&
7
],
...
...
@@ -1462,7 +1462,7 @@ void rx_slsch(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, int frame_rx,int subframe_rx
// Note : this assumes Ntrp=8 for now
if
(
trp8
[
slsch
->
time_resource_pattern
][
absSF_modP
&
7
]
==
0
)
return
;
// we have an opportunity in this subframe
if
(
absSF_modP
==
40
)
slsch
->
ljmod10
=
0
;
if
(
absSF_modP
==
slsch
->
SubframeBitmapSL_length
)
slsch
->
ljmod10
=
0
;
else
slsch
->
ljmod10
++
;
if
(
slsch
->
ljmod10
==
0
)
slsch
->
ljmod10
=
0
;
...
...
openair1/PHY/extern.h
View file @
cfc0965a
...
...
@@ -60,9 +60,9 @@ extern short primary_synch1SL[144];
extern
unsigned
char
primary_synch0_tab
[
72
];
extern
unsigned
char
primary_synch1_tab
[
72
];
extern
unsigned
char
primary_synch2_tab
[
72
];
extern
int16_t
*
primary_synch0_time
;
//!< index: [0..ofdm_symbol_size*2[
extern
int16_t
*
primary_synch1_time
;
//!< index: [0..ofdm_symbol_size*2[
extern
int16_t
*
primary_synch2_time
;
//!< index: [0..ofdm_symbol_size*2[
extern
const
int16_t
*
primary_synch0_time
;
//!< index: [0..ofdm_symbol_size*2[
extern
const
int16_t
*
primary_synch1_time
;
//!< index: [0..ofdm_symbol_size*2[
extern
const
int16_t
*
primary_synch2_time
;
//!< index: [0..ofdm_symbol_size*2[
extern
int
*
sync_corr_ue0
;
//!< index [0..10*samples_per_tti[
extern
int
*
sync_corr_ue1
;
//!< index [0..10*samples_per_tti[
extern
int
*
sync_corr_ue2
;
//!< index [0..10*samples_per_tti[
...
...
openair1/PHY/vars.h
View file @
cfc0965a
...
...
@@ -33,10 +33,14 @@ char* namepointer_log2;
#include "PHY/LTE_REFSIG/primary_synch.h"
#include "PHY/LTE_REFSIG/primary_synch_SL.h"
int16_t
*
primary_synch0_time
;
int16_t
*
primary_synch1_time
;
int16_t
*
primary_synch2_time
;
const
int16_t
*
primary_synch0_time
;
const
int16_t
*
primary_synch1_time
;
const
int16_t
*
primary_synch2_time
;
#ifdef Rel14
const
int16_t
*
primary_synch0SL_time
;
const
int16_t
*
primary_synch1SL_time
;
#endif
#include "PHY/CODING/vars.h"
...
...
openair1/SIMULATION/LTE_PHY/slschsim.c
View file @
cfc0965a
...
...
@@ -239,10 +239,16 @@ int main(int argc, char **argv) {
UE
->
slsch
=
&
slsch
;
UE
->
sldch
=
&
sldch
;
// SLSCH/CCH Configuration
slsch
.
N_SL_RB
=
20
;
slsch
.
prb_Start
=
5
;
slsch
.
prb_End
=
44
;
slsch
.
N_SL_RB_data
=
20
;
slsch
.
prb_Start_data
=
5
;
slsch
.
prb_End_data
=
44
;
slsch
.
N_SL_RB_SC
=
4
;
slsch
.
prb_Start_SC
=
5
;
slsch
.
prb_End_SC
=
44
;
slsch
.
SL_SC_Period
=
320
;
slsch
.
SubframeBitmapSL_length
=
4
;
slsch
.
SL_OffsetIndicator
=
0
;
slsch
.
SL_OffsetIndicator_data
=
0
;
// This can be 40,60,70,80,120,140,160,240,280,320
slsch
.
SL_SC_Period
=
320
;
slsch
.
bitmap1
=
0xffffffffff
;
...
...
openair2/COMMON/platform_types.h
View file @
cfc0965a
...
...
@@ -200,7 +200,7 @@ typedef uint32_t m_tmsi_t;
#define SI_RNTI (rnti_t)0xFFFF
#endif
typedef
enum
config_action_e
{
CONFIG_ACTION_NULL
=
0
,
CONFIG_ACTION_NULL
=
0
,
CONFIG_ACTION_ADD
=
1
,
CONFIG_ACTION_REMOVE
=
2
,
CONFIG_ACTION_MODIFY
=
3
,
...
...
openair2/LAYER2/MAC/config_ue.c
View file @
cfc0965a
...
...
@@ -59,7 +59,7 @@
extern
void
mac_init_cell_params
(
int
Mod_idP
,
int
CC_idP
);
extern
void
phy_reset_ue
(
module_id_t
Mod_id
,
uint8_t
CC_id
,
uint8_t
eNB_index
);
extern
uint32_t
taus
(
void
);
/* sec 5.9, 36.321: MAC Reset Procedure */
void
ue_mac_reset
(
module_id_t
module_idP
,
uint8_t
eNB_index
)
...
...
@@ -96,9 +96,10 @@ void ue_mac_reset(module_id_t module_idP, uint8_t eNB_index)
}
int32_t
**
rxdata
;
int32_t
**
txdata
;
#ifdef Rel14
const
uint32_t
SC_Period
[
10
]
=
{
40
,
60
,
70
,
80
,
120
,
140
,
160
,
240
,
280
,
320
};
const
uint32_t
SubframeBitmapSL
[
7
]
=
{
4
,
8
,
12
,
16
,
30
,
40
,
42
};
#endif
int
rrc_mac_config_req_ue
(
module_id_t
Mod_idP
,
...
...
@@ -139,7 +140,7 @@ rrc_mac_config_req_ue(module_id_t Mod_idP,
,
config_action_t
config_action
,
const
uint32_t
*
const
sourceL2Id
,
const
uint32_t
*
const
destinationL2Id
,
SL_Preconfiguration_r12_t
*
SL_Preconfiguration_r12
_t
SL_Preconfiguration_r12_t
*
SL_Preconfiguration_r12
#endif
)
...
...
@@ -632,6 +633,40 @@ rrc_mac_config_req_ue(module_id_t Mod_idP,
break
;
}
// SL Preconfiguration
if
(
SL_Preconfiguration_r12
){
LOG_I
(
MAC
,
"Getting SL parameters
\n
"
);
// SLSS
UE_mac_inst
[
Mod_idP
].
slss
.
SL_OffsetIndicator
=
SL_Preconfiguration_r12
->
preconfigSync_r12
.
syncOffsetIndicator1_r12
;
// Note: Other synch parameters are ignored for now
UE_mac_inst
[
Mod_idP
].
slss
.
slss_id
=
168
+
(
taus
()
%
168
);
// PSCCH
struct
SL_PreconfigCommPool_r12
*
preconfigpool
=
SL_Preconfiguration_r12
->
preconfigComm_r12
.
list
.
array
[
0
];
UE_mac_inst
[
Mod_idP
].
slsch
.
N_SL_RB_SC
=
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_Num_r12
;
UE_mac_inst
[
Mod_idP
].
slsch
.
prb_Start_SC
=
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_Start_r12
;
UE_mac_inst
[
Mod_idP
].
slsch
.
prb_End_SC
=
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_End_r12
;
UE_mac_inst
[
Mod_idP
].
slsch
.
N_SL_RB_data
=
preconfigpool
->
data_TF_ResourceConfig_r12
.
prb_Num_r12
;
UE_mac_inst
[
Mod_idP
].
slsch
.
prb_Start_data
=
preconfigpool
->
data_TF_ResourceConfig_r12
.
prb_Start_r12
;
UE_mac_inst
[
Mod_idP
].
slsch
.
prb_End_data
=
preconfigpool
->
data_TF_ResourceConfig_r12
.
prb_End_r12
;
AssertFatal
(
preconfigpool
->
sc_Period_r12
<
10
,
"Maximum supported sc_Period is 320ms (sc_Period_r12=%d)
\n
"
,
SL_PeriodComm_r12_sf320
);
UE_mac_inst
[
Mod_idP
].
slsch
.
SL_SC_Period
=
SC_Period
[
preconfigpool
->
sc_Period_r12
];
AssertFatal
(
preconfigpool
->
sc_TF_ResourceConfig_r12
.
offsetIndicator_r12
.
present
==
SL_OffsetIndicator_r12_PR_small_r12
,
"offsetIndicator is limited to smaller format
\n
"
);
UE_mac_inst
[
Mod_idP
].
slsch
.
SL_OffsetIndicator
=
preconfigpool
->
sc_TF_ResourceConfig_r12
.
offsetIndicator_r12
.
choice
.
small_r12
;
UE_mac_inst
[
Mod_idP
].
slsch
.
SL_OffsetIndicator_data
=
preconfigpool
->
data_TF_ResourceConfig_r12
.
offsetIndicator_r12
.
choice
.
small_r12
;
AssertFatal
(
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
present
<=
SubframeBitmapSL_r12_PR_bs40_r12
||
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
present
>
SubframeBitmapSL_r12_PR_NOTHING
,
"PSCCH bitmap limited to 42 bits
\n
"
);
UE_mac_inst
[
Mod_idP
].
slsch
.
SubframeBitmapSL_length
=
SubframeBitmapSL
[
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
present
];
UE_mac_inst
[
Mod_idP
].
slsch
.
bitmap1
=
*
((
uint64_t
*
)
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
);
}
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
...
...
openair2/RRC/LITE/rrc_UE.c
View file @
cfc0965a
...
...
@@ -324,47 +324,29 @@ void init_SL_preconfig(UE_RRC_INST *UE, const uint8_t eNB_index )
// SL Control portion
struct
SL_PreconfigCommPool_r12
*
preconfigpool
=
malloc16_clear
(
sizeof
(
struct
SL_PreconfigCommPool_r12
));
preconfigpool
->
sc_CP_Len_r12
=
SL_CP_Len_r12_normal
;
preconfigpool
->
sc_Period_r12
=
SL_PeriodComm_r12_sf
4
0
;
//
20 PRBs for SL
communications
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_Num_r12
=
20
;
preconfigpool
->
sc_Period_r12
=
SL_PeriodComm_r12_sf
32
0
;
//
4 PRBs for SL-SC
communications
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_Num_r12
=
4
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_Start_r12
=
5
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_End_r12
=
44
;
// Offset set to 0 subframes
preconfigpool
->
sc_TF_ResourceConfig_r12
.
offsetIndicator_r12
.
present
=
SL_OffsetIndicator_r12_PR_small_r12
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
offsetIndicator_r12
.
choice
.
small_r12
=
0
;
// 40 ms SL Period
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
present
=
SubframeBitmapSL_r12_PR_bs4
0
_r12
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
=
CALLOC
(
1
,
5
);
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
size
=
5
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
bits_unused
=
0
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
present
=
SubframeBitmapSL_r12_PR_bs4_r12
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
=
CALLOC
(
1
,
1
);
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
size
=
1
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
bits_unused
=
4
;
// 1st 4 subframes for PSCCH
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
0
]
=
0xF
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
1
]
=
0
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
2
]
=
0
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
3
]
=
0
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
4
]
=
0
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
0
]
=
0x0F
;
preconfigpool
->
sc_TxParameters_r12
=
0
;
//SL Data portion
preconfigpool
->
data_CP_Len_r12
=
SL_CP_Len_r12_normal
;
// 20 PRBs for SL communications
preconfigpool
->
data_TF_ResourceConfig_r12
.
prb_Num_r12
=
20
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
prb_Start_r12
=
5
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
prb_End_r12
=
44
;
// Offset set to 0 subframes
preconfigpool
->
data_TF_ResourceConfig_r12
.
offsetIndicator_r12
.
present
=
SL_OffsetIndicator_r12_PR_small_r12
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
offsetIndicator_r12
.
choice
.
small_r12
=
0
;
// 40 ms SL Period
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
present
=
SubframeBitmapSL_r12_PR_bs40_r12
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
=
CALLOC
(
1
,
5
);
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
size
=
5
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
bits_unused
=
0
;
// last 36 subframes for PSCCH
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
0
]
=
0xF0
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
1
]
=
0xFF
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
2
]
=
0xFF
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
3
]
=
0xFF
;
preconfigpool
->
data_TF_ResourceConfig_r12
.
subframeBitmap_r12
.
choice
.
bs40_r12
.
buf
[
5
]
=
0xFF
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_Num_r12
=
20
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_Start_r12
=
5
;
preconfigpool
->
sc_TF_ResourceConfig_r12
.
prb_End_r12
=
44
;
preconfigpool
->
data_CP_Len_r12
=
SL_CP_Len_r12_normal
;
preconfigpool
->
dataHoppingConfig_r12
.
hoppingParameter_r12
=
0
;
preconfigpool
->
dataHoppingConfig_r12
.
numSubbands_r12
=
SL_HoppingConfigComm_r12__numSubbands_r12_ns1
;
...
...
@@ -5115,10 +5097,10 @@ openair_rrc_top_init_ue(
module_id_t
module_id
;
OAI_UECapability_t
*
UECap
=
NULL
;
int
CC_id
;
int
CC_id
=
0
;
/* for no gcc warnings */
(
void
)
CC_id
;
LOG_D
(
RRC
,
"[OPENAIR][INIT] Init function start: NB_UE_INST=%d, NB_eNB_INST=%d
\n
"
,
NB_UE_INST
,
NB_eNB_INST
);
...
...
@@ -5134,25 +5116,62 @@ openair_rrc_top_init_ue(
UE_rrc_inst
[
module_id
].
UECap
=
UECap
;
UE_rrc_inst
[
module_id
].
UECapability
=
UECap
->
sdu
;
UE_rrc_inst
[
module_id
].
UECapability_size
=
UECap
->
sdu_size
;
}
#if defined(Rel10) || defined(Rel14)
LOG_I
(
RRC
,
"[UE] eMBMS active state is %d
\n
"
,
eMBMS_active
);
for
(
module_id
=
0
;
module_id
<
NB_UE_INST
;
module_id
++
)
{
LOG_I
(
RRC
,
"[UE] eMBMS active state is %d
\n
"
,
eMBMS_active
);
UE_rrc_inst
[
module_id
].
MBMS_flag
=
(
uint8_t
)
eMBMS_active
;
}
#endif
#ifdef Rel14
init_SL_preconfig
(
&
UE_rrc_inst
[
module_id
],
0
);
init_SL_preconfig
(
&
UE_rrc_inst
[
module_id
],
0
);
rrc_mac_config_req_ue
(
module_id
,
CC_id
,
0
,
(
RadioResourceConfigCommonSIB_t
*
)
NULL
,
(
struct
PhysicalConfigDedicated
*
)
NULL
,
#if defined(Rel10) || defined(Rel14)
(
SCellToAddMod_r10_t
*
)
NULL
,
#endif
(
MeasObjectToAddMod_t
**
)
NULL
,
(
MAC_MainConfig_t
*
)
NULL
,
0
,
(
LogicalChannelConfig_t
*
)
NULL
,
(
MeasGapConfig_t
*
)
NULL
,
(
TDD_Config_t
*
)
NULL
,
(
MobilityControlInfo_t
*
)
NULL
,
(
uint8_t
*
)
NULL
,
(
uint16_t
*
)
NULL
,
(
ARFCN_ValueEUTRA_t
*
)
NULL
,
(
long
*
)
NULL
,
(
AdditionalSpectrumEmission_t
*
)
NULL
,
(
struct
MBSFN_SubframeConfigList
*
)
NULL
#if defined(Rel10) || defined(Rel14)
,
0
,
(
MBSFN_AreaInfoList_r9_t
*
)
NULL
,
(
PMCH_InfoList_r9_t
*
)
NULL
#endif
#ifdef CBA
,
0
,
0
#endif
#if defined(Rel14)
,
CONFIG_ACTION_NULL
,
(
const
uint32_t
*
)
NULL
,
(
const
uint32_t
*
)
NULL
,
UE_rrc_inst
[
module_id
].
SL_Preconfiguration
[
0
]
#endif
#endif
);
}
}
else
{
UE_rrc_inst
=
NULL
;
}
}
//-----------------------------------------------------------------------------
...
...
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