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Commit dfec275b authored by rmagueta's avatar rmagueta
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Send srs_config_pdu from MAC to PHY

parent 8c20f69a
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Showing with 103 additions and 13 deletions
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @ dfec275b
......@@ -349,7 +349,7 @@ typedef struct {
uint8_t bandwidth_index; // SRS bandwidth index B_SRS [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 3
uint8_t comb_size; // Transmission comb size K_TC [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 = comb size 2, 1 = comb size 4, 2 = comb size 8 (Rel16)
uint8_t comb_offset; // Transmission comb offset K'_TC[3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 1 (combSize = 0), Value: 0 --> 3 (combSize = 1), Value: 0 --> 7 (combSize = 2)
uint8_t cyclic_chift; // Cyclic shift n_CS_SRS [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 --> 7 (combSize = 0), Value: 0 --> 11 (combSize = 1), Value: 0 --> 5 (combSize = 2)
uint8_t cyclic_shift; // Cyclic shift n_CS_SRS [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 --> 7 (combSize = 0), Value: 0 --> 11 (combSize = 1), Value: 0 --> 5 (combSize = 2)
uint8_t frequency_position; // Frequency domain position n_RRC [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 67
uint16_t frequency_shift; // Frequency domain shift n_shift [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 268
uint8_t frequency_hopping; // Frequency hopping b_hop [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 3
......
openair1/PHY/INIT/nr_init_ue.c
View file @ dfec275b
......@@ -136,6 +136,8 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
NR_UE_COMMON *const common_vars = &ue->common_vars;
NR_UE_PBCH **const pbch_vars = ue->pbch_vars;
NR_UE_PRACH **const prach_vars = ue->prach_vars;
NR_UE_SRS **const srs_vars = ue->srs_vars;
int i,j,k,l,slot,symb,q;
int gNB_id;
int th_id;
......@@ -318,6 +320,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
prach_vars[gNB_id] = (NR_UE_PRACH *)malloc16_clear(sizeof(NR_UE_PRACH));
pbch_vars[gNB_id] = (NR_UE_PBCH *)malloc16_clear(sizeof(NR_UE_PBCH));
srs_vars[gNB_id] = (NR_UE_SRS *)malloc16_clear(sizeof(NR_UE_SRS));
if (abstraction_flag == 0) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
......
openair1/PHY/defs_nr_UE.h
View file @ dfec275b
......@@ -706,6 +706,10 @@ typedef struct {
fapi_nr_ul_config_prach_pdu prach_pdu;
} NR_UE_PRACH;
typedef struct {
fapi_nr_ul_config_srs_pdu srs_config_pdu;
} NR_UE_SRS;
// structure used for multiple SSB detection
typedef struct NR_UE_SSB {
uint8_t i_ssb; // i_ssb between 0 and 7 (it corresponds to ssb_index only for Lmax=4,8)
......@@ -815,6 +819,7 @@ typedef struct {
NR_UE_PBCH *pbch_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PDCCH *pdcch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PRACH *prach_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_SRS *srs_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUSCH *pusch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUCCH *pucch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two RxTx Threads
......
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ dfec275b
......@@ -166,6 +166,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu;
/* PUCCH */
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu;
/* SRS */
fapi_nr_ul_config_srs_pdu *srs_config_pdu;
switch (pdu_type){
......@@ -224,6 +226,12 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
memcpy((void*)&(PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->prach_pdu), (void*)prach_config_pdu, sizeof(fapi_nr_ul_config_prach_pdu));
break;
case (FAPI_NR_UL_CONFIG_TYPE_SRS):
// srs config pdu
srs_config_pdu = &ul_config->ul_config_list[i].srs_config_pdu;
memcpy((void*)&(PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->srs_config_pdu), (void*)srs_config_pdu, sizeof(fapi_nr_ul_config_srs_pdu));
break;
default:
break;
}
......
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @ dfec275b
......@@ -55,6 +55,8 @@
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
//#define SRS_DEBUG
static prach_association_pattern_t prach_assoc_pattern;
static ssb_list_info_t ssb_list;
......@@ -879,7 +881,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
}
// Periodic SRS scheduling
void nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slot) {
bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slot) {
bool srs_scheduled = false;
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
......@@ -891,7 +895,7 @@ void nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slo
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
srs_config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
} else {
return;
return false;
}
for(int rs = 0; rs < srs_config->srs_ResourceSetToAddModList->list.count; rs++) {
......@@ -918,20 +922,90 @@ void nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slo
continue;
}
int scs = mac->ULbwp[0] ?
mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing;
NR_BWP_t ubwp = mac->ULbwp[0] ?
mac->ULbwp[0]->bwp_Common->genericParameters :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters;
uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present];
uint16_t offset = srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.choice.sl40;
int n_slots_frame = nr_slots_per_frame[scs];
int n_slots_frame = nr_slots_per_frame[ubwp.subcarrierSpacing];
// Check if UE should transmit the SRS
if((frame*n_slots_frame+slot-offset)%period == 0) {
LOG_W(NR_MAC, "(%d.%d) Periodic SRS scheduling is not implemented yet!\n", frame, slot);
}
}
fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot);
fapi_nr_ul_config_srs_pdu *srs_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].srs_config_pdu;
srs_config_pdu->rnti = mac->crnti;
srs_config_pdu->handle = 0;
srs_config_pdu->bwp_size = NRRIV2BW(ubwp.locationAndBandwidth, MAX_BWP_SIZE);;
srs_config_pdu->bwp_start = NRRIV2PRBOFFSET(ubwp.locationAndBandwidth, MAX_BWP_SIZE);;
srs_config_pdu->subcarrier_spacing = ubwp.subcarrierSpacing;
srs_config_pdu->cyclic_prefix = 0;
srs_config_pdu->num_ant_ports = srs_resource->nrofSRS_Ports;
srs_config_pdu->num_symbols = srs_resource->resourceMapping.nrofSymbols;
srs_config_pdu->num_repetitions = srs_resource->resourceMapping.repetitionFactor;
srs_config_pdu->time_start_position = srs_resource->resourceMapping.startPosition;
srs_config_pdu->config_index = srs_resource->freqHopping.c_SRS;
srs_config_pdu->sequence_id = srs_resource->sequenceId;
srs_config_pdu->bandwidth_index = srs_resource->freqHopping.b_SRS;
srs_config_pdu->comb_size = srs_resource->transmissionComb.present - 1;
switch(srs_resource->transmissionComb.present) {
case NR_SRS_Resource__transmissionComb_PR_n2:
srs_config_pdu->comb_offset = srs_resource->transmissionComb.choice.n2->combOffset_n2;
srs_config_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n2->cyclicShift_n2;
break;
case NR_SRS_Resource__transmissionComb_PR_n4:
srs_config_pdu->comb_offset = srs_resource->transmissionComb.choice.n4->combOffset_n4;
srs_config_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n4->cyclicShift_n4;
break;
default:
LOG_W(NR_MAC, "Invalid or not implemented comb_size!\n");
}
srs_config_pdu->frequency_position = srs_resource->freqDomainPosition;
srs_config_pdu->frequency_shift = srs_resource->freqDomainShift;
srs_config_pdu->frequency_hopping = srs_resource->freqHopping.b_hop;
srs_config_pdu->group_or_sequence_hopping = srs_resource->groupOrSequenceHopping;
srs_config_pdu->resource_type = srs_resource->resourceType.present - 1;
srs_config_pdu->t_srs = period;
srs_config_pdu->t_offset = offset;
#ifdef SRS_DEBUG
LOG_I(NR_MAC,"Frame = %i, slot = %i\n", frame, slot);
LOG_I(NR_MAC,"srs_config_pdu->rnti = 0x%04x\n", srs_config_pdu->rnti);
LOG_I(NR_MAC,"srs_config_pdu->handle = %u\n", srs_config_pdu->handle);
LOG_I(NR_MAC,"srs_config_pdu->bwp_size = %u\n", srs_config_pdu->bwp_size);
LOG_I(NR_MAC,"srs_config_pdu->bwp_start = %u\n", srs_config_pdu->bwp_start);
LOG_I(NR_MAC,"srs_config_pdu->subcarrier_spacing = %u\n", srs_config_pdu->subcarrier_spacing);
LOG_I(NR_MAC,"srs_config_pdu->cyclic_prefix = %u (0: Normal; 1: Extended)\n", srs_config_pdu->cyclic_prefix);
LOG_I(NR_MAC,"srs_config_pdu->num_ant_ports = %u (0 = 1 port, 1 = 2 ports, 2 = 4 ports)\n", srs_config_pdu->num_ant_ports);
LOG_I(NR_MAC,"srs_config_pdu->num_symbols = %u (0 = 1 symbol, 1 = 2 symbols, 2 = 4 symbols)\n", srs_config_pdu->num_symbols);
LOG_I(NR_MAC,"srs_config_pdu->num_repetitions = %u (0 = 1, 1 = 2, 2 = 4)\n", srs_config_pdu->num_repetitions);
LOG_I(NR_MAC,"srs_config_pdu->time_start_position = %u\n", srs_config_pdu->time_start_position);
LOG_I(NR_MAC,"srs_config_pdu->config_index = %u\n", srs_config_pdu->config_index);
LOG_I(NR_MAC,"srs_config_pdu->sequence_id = %u\n", srs_config_pdu->sequence_id);
LOG_I(NR_MAC,"srs_config_pdu->bandwidth_index = %u\n", srs_config_pdu->bandwidth_index);
LOG_I(NR_MAC,"srs_config_pdu->comb_size = %u (0 = comb size 2, 1 = comb size 4, 2 = comb size 8)\n", srs_config_pdu->comb_size);
LOG_I(NR_MAC,"srs_config_pdu->comb_offset = %u\n", srs_config_pdu->comb_offset);
LOG_I(NR_MAC,"srs_config_pdu->cyclic_shift = %u\n", srs_config_pdu->cyclic_shift);
LOG_I(NR_MAC,"srs_config_pdu->frequency_position = %u\n", srs_config_pdu->frequency_position);
LOG_I(NR_MAC,"srs_config_pdu->frequency_shift = %u\n", srs_config_pdu->frequency_shift);
LOG_I(NR_MAC,"srs_config_pdu->frequency_hopping = %u\n", srs_config_pdu->frequency_hopping);
LOG_I(NR_MAC,"srs_config_pdu->group_or_sequence_hopping = %u (0 = No hopping, 1 = Group hopping groupOrSequenceHopping, 2 = Sequence hopping)\n", srs_config_pdu->group_or_sequence_hopping);
LOG_I(NR_MAC,"srs_config_pdu->resource_type = %u (0: aperiodic, 1: semi-persistent, 2: periodic)\n", srs_config_pdu->resource_type);
LOG_I(NR_MAC,"srs_config_pdu->t_srs = %u\n", srs_config_pdu->t_srs);
LOG_I(NR_MAC,"srs_config_pdu->t_offset = %u\n", srs_config_pdu->t_offset);
#endif
fill_ul_config(ul_config, frame, slot, FAPI_NR_UL_CONFIG_TYPE_SRS);
srs_scheduled = true;
}
}
return srs_scheduled;
}
// Performs :
......@@ -999,6 +1073,9 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx);
// Periodic SRS scheduling
nr_ue_periodic_srs_scheduling(mod_id, frame_tx, slot_tx);
// Schedule ULSCH only if the current frame and slot match those in ul_config_req
// AND if a UL grant (UL DCI or Msg3) has been received (as indicated by num_pdus)
if (ul_config && (ul_info->slot_tx == ul_config->slot && ul_info->frame_tx == ul_config->sfn) && ul_config->number_pdus > 0){
......@@ -1082,9 +1159,6 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
frame_t txFrameP = ul_info->frame_tx;
slot_t txSlotP = ul_info->slot_tx;
// Periodic SRS scheduling
nr_ue_periodic_srs_scheduling(mod_id, txFrameP, txSlotP);
// Handle the SR/BSR procedures per subframe
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
uint8_t gNB_indexP=0;
......
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