Commit e0ec9c65 authored by 111's avatar 111

add srs cap

parent 70aa9221
......@@ -39,7 +39,7 @@
{"max-ldpc-iterations", CONFIG_HLP_MAX_LDPC_ITERATIONS, 0, u8ptr:&nrUE_params.max_ldpc_iterations, defuintval:5, TYPE_UINT8, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \
{"uecap_file", CONFIG_HLP_UECAP_FILE, 0, strptr:&uecap_file, defstrval:"./uecap_ports1.xml", TYPE_STRING, 0}, \
{"uecap_file", CONFIG_HLP_UECAP_FILE, 0, strptr:&uecap_file, defstrval:"./uecap_ports2.xml", TYPE_STRING, 0}, \
{"rrc_config_path", CONFIG_HLP_RRC_CFG_PATH,0, strptr:&rrc_config_path, defstrval:"./", TYPE_STRING, 0}, \
{"ue-idx-standalone", NULL, 0, u16ptr:&ue_idx_standalone, defuintval:0xFFFF, TYPE_UINT16, 0} \
}
......
......@@ -44,6 +44,17 @@
//#define SRS_DEBUG
int g_dmrs_caps_idx = 0;
int g_dmrs_cnt = 0;
//#if defined SEND_BY_SOCKET
nr_srs_cap_t g_srs_caps[2];
// extern uint8_t *ric_send_buf;
// extern int ric_send_len;
// extern sem_t ric_send_sem;
//#endif
NR_gNB_SRS_t *new_gNB_srs(void){
NR_gNB_SRS_t *srs;
srs = (NR_gNB_SRS_t *)malloc16(sizeof(NR_gNB_SRS_t));
......@@ -184,3 +195,74 @@ int nr_get_srs_signal(PHY_VARS_gNB *gNB,
return 0;
}
}
int nr_cap_srs_signal(PHY_VARS_gNB *gNB,
frame_t frame,
slot_t slot,
nfapi_nr_srs_pdu_t *srs_config_pdu,
nr_srs_info_t *nr_srs_info)
{
int32_t **rxdataF = gNB->common_vars.rxdataF;
const NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
const uint16_t n_symbols = (slot&3)*frame_parms->symbols_per_slot; // number of symbols until this slot
const uint8_t l0 = frame_parms->symbols_per_slot - 1 - srs_config_pdu->time_start_position; // starting symbol in this slot
const uint64_t symbol_offset = (n_symbols+l0)*frame_parms->ofdm_symbol_size;
nr_srs_cap_t *ns_srs_cap = (nr_srs_cap_t *)&g_srs_caps[g_dmrs_caps_idx];
ns_srs_cap->num_ant_ports = srs_config_pdu->num_ant_ports;
ns_srs_cap->num_symbols = srs_config_pdu->num_symbols;
ns_srs_cap->num_repetitions = srs_config_pdu->num_repetitions;
ns_srs_cap->time_start_position = srs_config_pdu->time_start_position;
ns_srs_cap->config_index = srs_config_pdu->config_index;
ns_srs_cap->sequence_id = srs_config_pdu->sequence_id;
ns_srs_cap->bandwidth_index = srs_config_pdu->bandwidth_index;
ns_srs_cap->comb_size = srs_config_pdu->comb_size;
ns_srs_cap->comb_offset = srs_config_pdu->comb_offset;
ns_srs_cap->cyclic_shift = srs_config_pdu->cyclic_shift;
ns_srs_cap->frequency_position = srs_config_pdu->frequency_position;
ns_srs_cap->frequency_shift = srs_config_pdu->frequency_shift;
ns_srs_cap->frequency_hopping = srs_config_pdu->frequency_hopping;
ns_srs_cap->group_or_sequence_hopping = srs_config_pdu->group_or_sequence_hopping;
ns_srs_cap->resource_type = srs_config_pdu->resource_type;
ns_srs_cap->t_srs = srs_config_pdu->t_srs;
ns_srs_cap->t_offset = srs_config_pdu->t_offset;
uint8_t N_ap = 1<<srs_config_pdu->num_ant_ports; // Number of antenna port for transmission
uint8_t N_symb_SRS = 1<<srs_config_pdu->num_symbols;
uint8_t n_SRS_cs = srs_config_pdu->cyclic_shift;
uint8_t n_SRS_cs_max = srs_max_number_cs[srs_config_pdu->comb_size];
for (int p_index = 0; p_index < N_ap; p_index++)
{
ns_srs_cap->n_SRS_cs_i[p_index] = (n_SRS_cs + (n_SRS_cs_max * (SRS_antenna_port[p_index] - 1000)/N_ap))%n_SRS_cs_max;
for (int l_line = 0; l_line < N_symb_SRS; l_line++)
ns_srs_cap->k_0_p[p_index][l_line] = nr_srs_info->k_0_p[p_index][l_line];
}
int len = frame_parms->N_RB_DL * 6;
int32_t *dst = ns_srs_cap->dmrsData;
int32_t *src;
for (int ant = 0; ant < frame_parms->nb_antennas_rx; ant++)
{
for (int l_line = 0; l_line < N_symb_SRS; l_line++)
{
src = (int32_t *)&rxdataF[ant][symbol_offset + l_line * gNB->frame_parms.ofdm_symbol_size];
memcpy(dst, &src[gNB->frame_parms.ofdm_symbol_size - len], len*4);
dst += len;
memcpy(dst, &src[0], len*4);
dst += len;
}
}
FILE *output_fd = NULL;
output_fd = fopen("srs_data.am","w");
if (output_fd==NULL){
printf("Error opening \n");
}
if (output_fd) {
LOG_I(PHY, "log srs data, ant %d, symbs %d, port %d, size %d\n", frame_parms->nb_antennas_rx, N_symb_SRS, N_ap, sizeof(nr_srs_cap_t)/2);
fwrite(&(ns_srs_cap->num_ant_ports),sizeof(int16_t),38+273*12*frame_parms->nb_antennas_rx*N_symb_SRS*2,output_fd);
fclose(output_fd);
}
g_dmrs_caps_idx++;
}
\ No newline at end of file
......@@ -218,7 +218,9 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
uint16_t m_SRS_b = srs_bandwidth_config[C_SRS][B_SRS][0]; // Number of resource blocks
uint16_t M_sc_b_SRS = m_SRS_b * NR_NB_SC_PER_RB/K_TC; // Length of the SRS sequence
#ifdef SRS_DEBUG
//#ifdef SRS_DEBUG
if ((frame_number % 1024) == 8)
{
LOG_I(NR_PHY,"Frame = %i, slot = %i\n", frame_number, slot_number);
LOG_I(NR_PHY,"B_SRS = %i\n", B_SRS);
LOG_I(NR_PHY,"C_SRS = %i\n", C_SRS);
......@@ -240,7 +242,8 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
LOG_I(NR_PHY,"n_SRS_cs_max = %i\n", n_SRS_cs_max);
LOG_I(NR_PHY,"m_SRS_b = %i\n", m_SRS_b);
LOG_I(NR_PHY,"M_sc_b_SRS = %i\n", M_sc_b_SRS);
#endif
}
//#endif
// Validation of SRS config parameters
......
......@@ -373,6 +373,31 @@ typedef struct {
int32_t reserved;
} prs_meas_t;
typedef struct {
uint16_t num_ant_ports; // Number of antenna ports N_SRS_ap [3GPP TS 38.211, Sec 6.4.1.4.1], Value: 0 = 1 port, 1 = 2 ports, 2 = 4 ports
uint16_t num_symbols; // Number of symbols N_SRS_symb [3GPP TS 38.211, Sec 6.4.1.4.1], Value: 0 = 1 symbol, 1 = 2 symbols, 2 = 4 symbols
uint16_t num_repetitions; // Repetition factor R [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 = 1, 1 = 2, 2 = 4
uint16_t time_start_position; // Starting position in the time domain l_0 [3GPP TS 38.211, Sec 6.4.1.4.1], Note: the MAC undertakes the translation from startPosition to l_0, Value: 0 --> 13
uint16_t config_index; // SRS bandwidth config index C_SRS [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 63
uint16_t sequence_id; // SRS sequence ID n_SRS_ID [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 --> 1023
uint16_t bandwidth_index; // SRS bandwidth index B_SRS [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 3
uint16_t comb_size; // Transmission comb size K_TC [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 = comb size 2, 1 = comb size 4, 2 = comb size 8 (Rel16)
uint16_t comb_offset; // Transmission comb offset K'_TC[3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 1 (combSize = 0), Value: 0 --> 3 (combSize = 1), Value: 0 --> 7 (combSize = 2)
uint16_t cyclic_shift; // Cyclic shift n_CS_SRS [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 --> 7 (combSize = 0), Value: 0 --> 11 (combSize = 1), Value: 0 --> 5 (combSize = 2)
uint16_t frequency_position; // Frequency domain position n_RRC [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 67
uint16_t frequency_shift; // Frequency domain shift n_shift [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 268
uint16_t frequency_hopping; // Frequency hopping b_hop [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 3
uint16_t group_or_sequence_hopping; // Group or sequence hopping configuration (RRC parameter groupOrSequenceHopping in SRSResource IE), Value: 0 = No hopping, 1 = Group hopping groupOrSequenceHopping, 2 = Sequence hopping
uint16_t resource_type; // Type of SRS resource allocation [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0: aperiodic, 1: semi-persistent, 2: periodic
uint16_t t_srs; // SRS-Periodicity in slots [3GPP TS 38.211, Sec 6.4.1.4.4], Value: 1,2,3,4,5,8,10,16,20,32,40,64,80,160,320,640,1280,2560
uint16_t t_offset;
uint16_t n_SRS_cs_max;
uint16_t n_SRS_cs_i[4];
uint16_t k_0_p[4][4]; // Slot offset value [3GPP TS 38.211, Sec 6.4.1.4.3], Value:0->2559
int32_t dmrsData[4*273*12*4];
} nr_srs_cap_t;
// rel16 prs k_prime table as per ts138.211 sec.7.4.1.7.2
#define K_PRIME_TABLE_ROW_SIZE 4
#define K_PRIME_TABLE_COL_SIZE 12
......
......@@ -879,7 +879,12 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
generate_srs_nr(srs_pdu, frame_parms, gNB->nr_srs_info[i]->srs_generated_signal, 0, gNB->nr_srs_info[i], AMP, frame_rx, slot_rx);
int srs_est = nr_get_srs_signal(gNB, frame_rx, slot_rx, srs_pdu, gNB->nr_srs_info[i], srs_received_signal);
static int log_first = 0;
if ((log_first == 0) && ((1<<srs_pdu->num_ant_ports)== 2))
{
nr_cap_srs_signal(gNB, frame_rx, slot_rx, srs_pdu, gNB->nr_srs_info[i]);
log_first++;
}
if (srs_est >= 0) {
nr_srs_channel_estimation(gNB,
frame_rx,
......
......@@ -395,7 +395,7 @@ long rrc_get_max_nr_csrs(const uint8_t max_rbs, const long b_SRS) {
m = m_SRS[c];
}
}
c_srs = 63;
return c_srs;
}
......@@ -580,7 +580,7 @@ void config_srs(const NR_ServingCellConfigCommon_t *scc,
ul_feature_setup->supportedSRS_Resources->maxNumberSRS_Ports_PerResource);
}
}
LOG_I(NR_RRC, "SRS configured with %d ports\n", 1<<srs_res0->nrofSRS_Ports);
LOG_I(NR_RRC, "SRS configured with %d ports, %d, mimolayers %d\n", 1<<srs_res0->nrofSRS_Ports, nrofSRS_Ports, maxMIMO_Layers);
}
srs_res0->ptrs_PortIndex = NULL;
srs_res0->transmissionComb.present = NR_SRS_Resource__transmissionComb_PR_n2;
......
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs = (
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 100;
plmn_list = ({ mcc = 466; mnc = 92; mnc_length = 2; snssaiList = ({ sst = 1; }); });
nr_cellid = 12345678L;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
pusch_AntennaPorts = 2;
do_CSIRS = 1;
do_SRS = 1;
ul_prbblacklist = "135,136,137,138"
pdcch_ConfigSIB1 = ({
controlResourceSetZero = 12;
searchSpaceZero = 0;
});
servingCellConfigCommon = (
{
# spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
# frequencyInfoDL
# this is 3900.60 MHz + (134 PRBs + 4 SCs)@30kHz SCS (GSCN: 8158)
absoluteFrequencySSB = 623232;
dl_frequencyBand = 78;
# this is 3900.60 MHz
dl_absoluteFrequencyPointA = 620016;
# scs-SpecificCarrierList
dl_offstToCarrier = 0;
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 273;
# initialDownlinkBWP
# genericParameters
initialDLBWPlocationAndBandwidth = 31624;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
# pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 10;
# uplinkConfigCommon
# frequencyInfoUL
ul_frequencyBand = 78;
# scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 273;
pMax = 20;
# initialUplinkBWP
# genericParameters
initialULBWPlocationAndBandwidth = 31624;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
# rach-ConfigCommon
# rach-ConfigGeneric
prach_ConfigurationIndex = 98;
# prach_msg1_FDM
# 0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 12;
preambleReceivedTargetPower = -90;
# preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
# powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
# ra_ReponseWindow
# 1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
# ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
# 1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
# oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
# ra_ContentionResolutionTimer
# (0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
# prach-RootSequenceIndex_PR
# 1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -70;
#dmrs_TypeA_position
#0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
#subcarrierSpacing
#0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = (
{
ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129";
GNB_INTERFACE_NAME_FOR_NGU = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
}
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 300;
pucch_TargetSNRx10 = 200;
pusch_FailureThres = 1000;
ulsch_max_frame_inactivity = 0;
ul_max_mcs = 28;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 80;
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 2;
nb_rx = 2;
att_tx = 75;
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 25;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
#bf_weights = [0x00007fff, 0x0000];
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "dev=pciex:0,auxdac1=1628";
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
hw_log_level ="info";
phy_log_level ="info";
mac_log_level ="info";
rlc_log_level ="info";
pdcp_log_level ="info";
rrc_log_level ="info";
ngap_log_level ="debug";
f1ap_log_level ="debug";
};
......@@ -27,9 +27,10 @@ gNBs =
////////// Physical parameters:
sib1_tda = 15;
min_rxtxtime = 6;
pdsch_AntennaPorts_XP = 1;
pdsch_AntennaPorts_XP = 2;
pusch_AntennaPorts = 2;
do_CSIRS = 0;
do_CSIRS = 1;
do_SRS = 1;
ul_prbblacklist = "135,136,137,138"
pdcch_ConfigSIB1 = (
......@@ -61,7 +62,7 @@ gNBs =
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=162 (275*(275-L+1))+(274-RBstart))
initialDLBWPlocationAndBandwidth = 31624;
initialDLBWPlocationAndBandwidth = 1099;
#
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
......@@ -82,7 +83,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 31624;
initialULBWPlocationAndBandwidth = 1099;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
......@@ -267,7 +268,7 @@ RUs = (
##beamforming 1x2 matrix: 1 layer x 2 antennas
#bf_weights = [0x00007fff, 0x0000];
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "dev=pciex:0,auxdac1=340";
sdr_addrs = "dev=pciex:0,auxdac1=315";
clock_src = "internal";
}
......@@ -276,7 +277,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
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