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Commit ee7aacf2 authored by Raymond Knopp's avatar Raymond Knopp
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sci development

parent fef6303c
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Showing with 888 additions and 192 deletions
CMakeLists.txt
View file @ ee7aacf2
......@@ -302,7 +302,7 @@ target_link_libraries(nr_rrc PUBLIC asn1_nr_rrc asn1_lte_rrc)
# S1AP and NGAP need crypt library
pkg_check_modules(libcrypt REQUIRED libcrypt)
#pkg_check_modules(libcrypt REQUIRED libcrypt)
# S1AP
##############
......@@ -1128,8 +1128,8 @@ target_link_libraries(PHY_COMMON PRIVATE asn1_lte_rrc_hdrs)
add_library(PHY ${PHY_SRC})
target_link_libraries(PHY PRIVATE asn1_lte_rrc_hdrs asn1_nr_rrc_hdrs)
pkg_check_modules(blas REQUIRED blas)
pkg_check_modules(lapacke REQUIRED lapacke)
#pkg_check_modules(blas REQUIRED blas)
#pkg_check_modules(lapacke REQUIRED lapacke)
add_library(PHY_UE ${PHY_SRC_UE})
target_link_libraries(PHY_UE PRIVATE asn1_lte_rrc_hdrs asn1_nr_rrc_hdrs)
......@@ -1381,6 +1381,7 @@ set (MAC_NR_SRC_UE
${NR_UE_MAC_DIR}/nr_ue_dci_configuration.c
${NR_UE_MAC_DIR}/nr_ra_procedures.c
${NR_UE_MAC_DIR}/nr_ue_power_procedures.c
${NR_UE_MAC_DIR}/nr_ue_sci_slsch.c
)
set (ENB_APP_SRC
......
cmake_targets/build_oai
View file @ ee7aacf2
......@@ -523,7 +523,7 @@ function main() {
echo_info "Doxygen generation log is located here: $doxygen_log"
echo_info "Generating Doxygen files....please wait"
(
cmake --build . --target doc
cmake3 --build . --target doc
) >& $doxygen_log
fi
......
common/utils/nr/nr_common.c
View file @ ee7aacf2
......@@ -232,6 +232,42 @@ int NRRIV2BW(int locationAndBandwidth,int N_RB) {
}
/* This function converts the FRIV to a start sub-channel and length in subchannels */
/* for sl_MaxNumPerReserve = 2, the sequence from 38.214 for Lsc = 1,2,3, ...
* goes like startsc + (0,N_subch,N_subch +(N_subch-1), N_subch + (N_subch-1) + (N_subch-2), ...)
*
* This is only done for sl_MaxNumPerReserve = 2
* */
void convNRFRIV(int FRIV,
int N_subch,
long sl_MaxNumPerReserve,
uint16_t *Lsc,
uint16_t *startsc,
uint16_t *startsc2) {
if (sl_MaxNumPerReserve == 2) {
*Lsc=1;
int prevN=0;
int N=N_subch;
while (FRIV>N) {
*Lsc = *Lsc+1;
prevN = N;
N += (N_subch - *Lsc + 1);
}
if (startsc) *startsc = FRIV-prevN;
} else {
*Lsc=1;
int prevN=0;
int N=N_subch;
while (FRIV>N) {
*Lsc = *Lsc + 1;
prevN = N;
N += ((N_subch - *Lsc + 1)*(N_subch - *Lsc + 1));
}
int tmp1 = FRIV - prevN; // This holds startsc1 + startsc2*(N_subch - *Lsc + 1)
if (startsc2) *startsc2 = tmp1 / (N_subch - *Lsc + 1);
if (startsc) *startsc = tmp1 % (N_subch - *Lsc + 1);
}
}
int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB) {
int tmp = locationAndBandwidth/N_RB;
int tmp2 = locationAndBandwidth%N_RB;
......
common/utils/nr/nr_common.h
View file @ ee7aacf2
......@@ -90,6 +90,7 @@ frame_type_t get_frame_type(uint16_t nr_bandP, uint8_t scs_index);
uint16_t get_band(uint64_t downlink_frequency, int32_t delta_duplex);
int NRRIV2BW(int locationAndBandwidth,int N_RB);
int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB);
void convNRFRIV(int FRIV, int N_subch, long sl_MaxNumPerReserve, uint16_t *Lsc, uint16_t *startsc, uint16_t *startsc2);
int PRBalloc_to_locationandbandwidth0(int NPRB,int RBstart,int BWPsize);
int PRBalloc_to_locationandbandwidth(int NPRB,int RBstart);
int get_subband_size(int NPRB,int size);
......
nfapi/open-nFAPI/nfapi/public_inc/sidelink_nr_ue_interface.h
View file @ ee7aacf2
......@@ -5,7 +5,8 @@
#define SL_NR_RX_CONFIG_LIST_NUM 1
#define SL_NR_TX_CONFIG_LIST_NUM 1
#define SL_NR_RX_IND_MAX_PDU 1
#define SL_NR_RX_IND_MAX_PDU 2
#define SL_NR_SCI_IND_MAX_PDU 2
#define SL_NR_MAX_PSCCH_SCI_LENGTH_IN_BYTES 8
#define SL_NR_MAX_PSSCH_SCI_LENGTH_IN_BYTES 8
#define SL_NR_MAX_SCI_LENGTH_IN_BYTES 8
......@@ -68,7 +69,7 @@ typedef struct {
uint8_t sensing_result;
//in case pssch sensing is requested.
int16_t pssch_rsrp;
sl_nr_sci_indication_pdu_t sci_pdu;
sl_nr_sci_indication_pdu_t sci_pdu[SL_NR_SCI_IND_MAX_PDU];
} sl_nr_sci_indication_t;
// IF UE Rx PSBCH, PHY indicates MAC with received MIB and PSBCH RSRP
......@@ -243,6 +244,9 @@ typedef struct sl_nr_tx_config_pscch_pssch_pdu {
//Indicates the number of symbols for PSCCH+PSSCH txn
uint8_t pssch_numsym;
// start symbol of PSCCH/PSSCH (excluding AGC)
uint8_t pssch_startsym;
//.... Other Parameters for SCI-2 and PSSCH
// Used to determine number of SCI2 modulated symbols
......
openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c
View file @ ee7aacf2
......@@ -94,6 +94,54 @@ uint32_t nr_compute_tbs(uint16_t Qm,
return nr_tbs;
}
uint32_t nr_compute_tbs_sl(uint16_t Qm,
uint16_t R,
uint16_t nb_re,
uint8_t Nl)
{
LOG_D(NR_MAC, "In %s: nb_re %d, Nl %d\n", __FUNCTION__, nb_re,Nl);
// Intermediate number of information bits
// Rx1024 is tabulated as 10 times the actual code rate
const uint32_t R_5 = R/5; // R can be fractional so we can't divide by 10
// So we ned to right shift by 11 (10 for x1024 and 1 additional as above)
const uint32_t Ninfo = ((nb_re * R_5 * Qm * Nl)>>11);
uint32_t nr_tbs=0;
uint32_t Np_info, C, n;
if (Ninfo <=3824) {
n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, (Ninfo>>n)<<n);
for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
if (Tbstable_nr[i] >= Np_info){
nr_tbs = Tbstable_nr[i];
break;
}
}
} else {
n = log2(Ninfo-24)-5;
Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
if (R <= 2560) {
C = CEILIDIV((Np_info+24),3816);
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
} else {
if (Np_info > 8424){
C = CEILIDIV((Np_info+24),8424);
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
} else {
nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
}
}
}
LOG_D(NR_MAC, "In %s: Ninfo %u nb_re %d Qm %d, R %d, tbs %d bits\n", __FUNCTION__, Ninfo, nb_re, Qm, R, nr_tbs);
return nr_tbs;
}
//tbslbrm calculation according to 5.4.2.1 of 38.212
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
View file @ ee7aacf2
......@@ -185,6 +185,12 @@ uint32_t nr_compute_tbs(uint16_t Qm,
uint8_t tb_scaling,
uint8_t Nl);
uint32_t nr_compute_tbs_sl(uint16_t Qm,
uint16_t R,
uint16_t nb_re,
uint8_t Nl);
/** \brief Computes Q based on I_MCS PDSCH and table_idx for downlink. Implements MCS Tables from 38.214. */
uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx);
......
openair2/LAYER2/NR_MAC_UE/mac_defs.h
View file @ ee7aacf2
......@@ -62,6 +62,7 @@
#include "NR_ServingCellConfig.h"
#include "NR_MeasConfig.h"
#include "NR_ServingCellConfigCommonSIB.h"
#include "NR_SL-BWP-ConfigCommon-r16.h"
// ==========
......@@ -455,6 +456,10 @@ typedef struct {
NR_SearchSpace_t *BWP_searchspaces[FAPI_NR_MAX_SS];
NR_SearchSpace_t *search_space_zero;
// sidelink
NR_SL_BWP_ConfigCommon_r16_t *sl_bwp;
NR_SL_ResourcePool_r16_t *sl_res_pool;
bool phy_config_request_sent;
frame_type_t frame_type;
......
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @ ee7aacf2
......@@ -86,6 +86,7 @@ void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, in
void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
fapi_nr_dl_config_request_t *dl_config,
fapi_nr_ul_config_request_t *ul_config,
sl_nr_rx_config_request_t *sl_config,
fapi_nr_tx_request_t *tx_request,
module_id_t mod_id,
int cc_id,
......
openair2/LAYER2/NR_MAC_UE/nr_ue_sci.c deleted 100644 → 0
View file @ fef6303c
uint32_t nr_sci_size(const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu,
nr_sci_format_t format) {
int size=0;
switch(format) {
case NR_SL_SCI_FORMAT_1A:
// priority
size+=3;
// frequency resource assignment
long Nsc = sl_res_pool->sl_NumSubchannel_r16;
if (sl_res_pool->sl_UE_SelectedConfigRP_r16.sl_MaxNumPerReserve_r16 == NR_SL_UE_SelectedConfigRP_r16__sl_MaxNumPerReserve_r16_n2)
sci_pdu->frequency_resource_assignment.nbits = (uint8_t)ceil(log2((Nsc * (Nsc + 1)) >>1));
else
sci_pdu->frequency_resource_assignment.nbits = (uint8_t)ceil(log2((Nsc * (Nsc + 1) * (2*Nsc + 1)) /6));
size += sci_pdu->frequency_resource_assignment.nbits;
// time-domain-assignment
if (sl_res_pool->sl_UE_SelectedConfigRP_r16.sl_MaxNumPerReserve_r16 == NR_SL_UE_SelectedConfigRP_r16__sl_MaxNumPerReserve_r16_n2)
sci_pdu->time_resource_assignment.nbits = 5;
else
sci_pdu->time_resource_assignment.nbits = 9;
size += sci_pdu->time_resource_assignment.nbits;
// resource reservation period
if (0 /*!sl_res_pool->sl_MultiReserveResource*/) // not defined in 17.4 RRC
sci_pdu->resource_reservation_period.nbits = 0;
size += sci_pdu->resource_reservation_period.nbits;
// DMRS pattern
int dmrs_pattern_num = sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_PSSCH_DMRS_TimePatternList_r16->list.count;
sci_pdu->dmrs_pattern.nbits = (uint8_t)ceil(log2(dmrs_pattern_num));
size += sci_pdu->dmrs_pattern.nbits;
// second_stage_sci_format // 2 bits - Table 8.3.1.1-1
size += 2;
// beta_offset_indicator // 2 bits - depending sl-BetaOffsets2ndSCI and Table 8.3.1.1-2
size += 2
// number_of_dmrs_port // 1 bit - Table 8.3.1.1-3
size += 1;
// mcs // 5 bits
size += 5;
// additional_mcs; // depending on sl-Additional-MCS-Table
if (sl_res_pool->sl_Additional_MCS_Table_r16)
sci_pdu->additional_mcs.nbits = (*sl_res_pool->sl_Additional_MCS_Table_r16 < 2) ? 1 : 2;
else sci_pdu->additional_mcs.nbits=0;
size += sci_pdu->additional_mcs.nbits;
// psfch_overhead; // depending on sl-PSFCH-Period
if (sl_res_pool->PSFCH_config && sl_res_pool->PSFCH_config->sl_PSFCH_Period_r16 && *sl_res_pool->PSFCH_config->sl_PSFCH_Period_r16>1)
sci_pdu->psfch_overhead.nbits=1;
else sci_pdu->psfch_overhead.nbits=0;
size += sci_pdu->psfch_overhead.nbits;
// reserved; // depending on N_reserved (sl-NumReservedBits) and sl-IndicationUE-B
// note R17 dependence no sl_IndicationUE-B needs to be added here
AssertFatal(sl_res_pool->sl_PSCCH_Config_r16!=NULL,"sl_res_pool->sl_PSCCH_Config_r16 is null\n");
AssertFatal(sl_res_pool->sl_PSCCH_Config_r16->choice.setup!=NULL,"sl_res_pool->sl_PSCCH_Config_r16->choice.setup is null\n");
AssertFatal(sl_res_pool->sl_PSCCH_Config_r16->choice.setup->sl_NumReservedBits_r16!=NULL, "sl_res_pool->sl_PSCCH_Config_r16->choice.setup->sl_NumReservedBits_r16 is null\n");
sci_pdu->reserved.nbits = sl_res_pool->sl_PSCCH_Config_r16->choice.setup->sl_NumReservedBits_r16;
// conflict_information_receiver; // depending on sl-IndicationUE-B
// note: R17 field not included here
sci_pdu->conflict_information_receiver.nbits=0;
break;
case NR_SL_SCI_FORMAT_2A:
case NR_SL_SCI_FORMAT_2B:
case NR_SL_SCI_FORMAT_2C:
// common components
//harq_pid; // 4 bits
//ndi; // 1 bit
//rv_index; // 2 bits
//source_id; // 8 bits
//dest_id; // 16 bits
//harq_feedback; //1 bit
size += (4+1+2+8+16+1);
if (format==NR_SL_SCI_FORMAT_2A)
//cast_type // 2 bits formac 2A
size += 2;
if (format==NR_SL_SCI_FORMAT_2C || format==NR_SL_SCI_FORMAT_2A)
// csi_req // 1 bit format 2A, format 2C
size +=1;
if (format==NR_SL_SCI_FORMAT_2B) {
// zone_id // 12 bits format 2B
size +=12;
// communication_range; // 4 bits depending on sl-ZoneConfigMCR-Index, format 2B
// note fill in for R17
if (0) size +=4;
}
else if (format==NR_SL_SCI_FORMAT_2C) {
// providing_req_ind; // 1 bit, format 2C
size += 1;
// resource_combinations; // depending on n_subChannel^SL (sl-NumSubchennel), N_rsv_period (sl-ResourceReservePeriodList) and sl-MultiReservedResource, format 2C
// first_resource_location; // 8 bits, format 2C
size += 8;
// reference_slot_location; // depending on mu, format 2C
// resource_set_type; // 1 bit, format 2C
size += 1;
// lowest_subchannel_indices; // depending on n_subChannel^SL, format 2C
//
}
break;
}
return(size);
}
void fill_sci_pdu(sl_nr_sci_indication_pdu_t *nr_sl_sci_pdu,
nr_sci_pdu_t *sci_pdu,
nr_sci_format_t format,
int sci_size) {
int pos=0,fsize;
uint64_t *sci_payload = (uint64_t *)sci_payloadBits;
switch(format) {
case NR_SL_SCI_FORMAT_1A:
// priority 3 bits
fsize=3;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->priority >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// frequency resource assignment
fsize = sci_pdu->frequency_resource_assignment.nbits;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// time-domain-assignment
fsize = sci_pdu->time_resource_assignment.nbits;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->time_resource_assignment.val >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// resource reservation period
fsize = sci_pdu->resource_reservation_period.nbits;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->resource_reservation_period.val >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// DMRS pattern
fsize = sci_pdu->dmrs_pattern.nbits;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->dmrs_pattern.val >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// second_stage_sci_format // 2 bits - Table 8.3.1.1-1
fsize = 2;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->second_stage_sci_format >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// beta_offset_indicator // 2 bits - depending sl-BetaOffsets2ndSCI and Table 8.3.1.1-2
fsize = 2;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->beta_offset_indicator >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// number_of_dmrs_port // 1 bit - Table 8.3.1.1-3
fsize = 1;
*sci_payload |= (((uint64_t)sci_pdu->number_of_dmrs_port&1)) << (sci_size - pos++)
// mcs // 5 bits
fsize = 5;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->mcs >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// additional_mcs; // depending on sl-Additional-MCS-Table
fsize = sci_pdu->additional_mcs.nbits;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->additional_mcs.val >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// psfch_overhead; // depending on sl-PSFCH-Period
fsize = sci_pdu->psfch_overhead.nbits;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->psfch_overhead.val >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// reserved; // depending on N_reserved (sl-NumReservedBits) and sl-IndicationUE-B
fsize = sci_pdu->reserved.nbits;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->reserved.val >> (fsize - i - 1)) & 1) << (sci_size - pos++);
// conflict_information_receiver; // depending on sl-IndicationUE-B
fsize = sci_pdu->conflict_information_receiver.nbits;
for (int i = 0; i < fsize; i++)
*sci_payload |= (((uint64_t)sci_pdu->conflict_information_receiver.val >> (fsize - i - 1)) & 1) << (sci_size - pos++);
break;
case NR_SL_SCI_FORMAT_2A:
case NR_SL_SCI_FORMAT_2B:
case NR_SL_SCI_FORMAT_2C:
break;
openair2/LAYER2/NR_MAC_UE/nr_ue_sci.h
View file @ ee7aacf2
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* \file nr_ue_sci.h
* \brief Definitions and Structures for sci/slsch procedures for Sidelink UE
* \author R. Knopp
* \date 2023
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#include "NR_MAC_COMMON/nr_mac.h"
typedef enum {
NR_SL_SCI_FORMAT_1A = 0;
NR_SL_SCI_FORMAT_2A = 1;
NR_SL_SCI_FORMAT_2B = 2;
NR_SL_SCI_FORMAT_2C = 3;
} sci_format_t;
NR_SL_SCI_FORMAT_1A = 0,
NR_SL_SCI_FORMAT_2A = 1,
NR_SL_SCI_FORMAT_2B = 2,
NR_SL_SCI_FORMAT_2C = 3
} nr_sci_format_t;
typedef {
typedef struct {
// 1st stage fields
uint8_t priority; // 3 bits
dci_field_t frequency_resource_assignment; // depending on sl-MaxNumPerReserve and N_subChannel^SL
......@@ -37,5 +71,5 @@ typedef {
dci_field_t reference_slot_location; // depending on mu, format 2C
uint8_t resource_set_type; // 1 bit, format 2C
dci_field_t lowest_subchannel_indices; // depending on n_subChannel^SL, format 2C
} sci_pdu_t;
} nr_sci_pdu_t;
openair2/LAYER2/NR_MAC_UE/nr_ue_sci_slsch.c 0 → 100644
View file @ ee7aacf2
This diff is collapsed.
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ ee7aacf2
......@@ -1297,6 +1297,82 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
return 0;
}
int nr_ue_scireq(nr_scireq_t *scireq) {
sl_nr_rx_config_request_t *sl_config = &scireq->sl_config_req;
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
sl_config->sfn = scireq->frame;
sl_config->slot = scireq->slot;
LOG_T(PHY, "Entering UE SCI configuration frame %d slot %d \n", scireq->frame, scireq->slot);
// ue_sci_configuration(UE_mac, sl_config, scireq->frame, scireq->slot);
return 0;
}
int nr_ue_sl_indication(nr_sidelink_indication_t *sl_info)
{
pthread_mutex_lock(&mac_IF_mutex);
uint32_t ret_mask = 0x0;
module_id_t module_id = sl_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
if ((!sl_info->sci_ind && !sl_info->rx_ind)) {
// indication to schedule SCI reception
if (mac->phy_config_request_sent)
nr_ue_sl_scheduler(sl_info);
} else {
// SL indication after reception of SCI or SL PDU
if (sl_info && sl_info->sci_ind && sl_info->sci_ind->number_of_SCIs) {
LOG_T(MAC,"[L2][IF MODULE][SL INDICATION][SCI_IND]\n");
for (int i = 0; i < sl_info->sci_ind->number_of_SCIs; i++) {
LOG_T(MAC,">>>NR_IF_Module i=%d, sl_info->sci_ind->number_of_scis=%d\n",i,sl_info->sci_ind->number_of_SCIs);
nr_scheduled_response_t scheduled_response;
int8_t ret = handle_sci(sl_info->module_id,
sl_info->frame_rx,
sl_info->slot_rx,
sl_info->sci_ind->sci_pdu+i);
if (ret < 0)
continue;
sl_nr_sci_indication_pdu_t *sci_index = sl_info->sci_ind->sci_pdu+i;
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" );
AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" );
sl_nr_rx_config_request_t *sl_config = get_sl_config_request(mac, sl_info->slot_rx);
fill_sl_scheduled_response(&scheduled_response, sl_config, NULL, NULL, sl_info->module_id, sl_info->frame_rx, sl_info->slot_rx, sl_info->phy_data);
nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response);
}
sl_info->sci_ind = NULL;
}
if (sl_info->rx_ind != NULL) {
for (int i = 0; i < sl_info->rx_ind->number_pdus; ++i) {
sl_nr_rx_indication_body_t rx_indication_body = sl_info->rx_ind->rx_indication_body[i];
LOG_D(NR_MAC, "Sending DL indication to MAC. 1 PDU type %d of %d total number of PDUs \n",
rx_indication_body.pdu_type,
sl_info->rx_ind->number_pdus);
switch(rx_indication_body.pdu_type){
case SL_NR_RX_PDU_TYPE_SSB:
break;
case SL_NR_RX_PDU_TYPE_SLSCH:
break;
default:
AssertFatal(1==0,"Unknown RX indication type\n");
break;
}
}
sl_info->rx_ind = NULL;
}
}
pthread_mutex_unlock(&mac_IF_mutex);
return ret_mask;
}
void RCconfig_nr_ue_macrlc(void) {
int j;
paramdef_t MACRLC_Params[] = MACRLCPARAMS_DESC;
......
openair2/RRC/NR_UE/rrc_sl_preconfig.c
View file @ ee7aacf2
......@@ -107,6 +107,15 @@ static void prepare_NR_SL_ResourcePool(NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_res_pool->sl_PSSCH_Config_r16 = calloc(1, sizeof(NR_SetupRelease_SL_PSSCH_Config_r16_t));
sl_res_pool->sl_PSSCH_Config_r16->present = NR_SetupRelease_SL_PSSCH_Config_r16_PR_setup;
sl_res_pool->sl_PSSCH_Config_r16->choice.setup = calloc(1, sizeof(NR_SL_PSSCH_Config_r16_t));
sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_BetaOffsets2ndSCI_r16 =
calloc(1, sizeof(*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_BetaOffsets2ndSCI_r16));
for(int i=0; i<4; i++) {
long *p = calloc(1, sizeof(long));
*p = i<<2; // valid values: 0...15, for the moment choose 0,4,8,12
ASN_SEQUENCE_ADD(&sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_BetaOffsets2ndSCI_r16->list, p);
}
sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_PSSCH_DMRS_TimePatternList_r16 =
calloc(1, sizeof(*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_PSSCH_DMRS_TimePatternList_r16));
for(int i=0; i<3; i++) {
......@@ -115,6 +124,10 @@ static void prepare_NR_SL_ResourcePool(NR_SL_ResourcePool_r16_t *sl_res_pool,
ASN_SEQUENCE_ADD(&sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_PSSCH_DMRS_TimePatternList_r16->list, p);
}
// This should be added to configuration file
sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16 = calloc(1,sizeof(*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16));
*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16 = NR_SL_PSSCH_Config_r16__sl_Scaling_r16_f0p5;
//PSFCH configuration
sl_res_pool->sl_PSFCH_Config_r16 = NULL;
......
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