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lizhongxiao
OpenXG-RAN
Commits
f3ebd694
Commit
f3ebd694
authored
Mar 06, 2019
by
Khalid Ahmed
Committed by
Thomas Schlichter
Jun 04, 2019
Browse files
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Plain Diff
PUSCH DMRS generation is implemented
parent
9b58180c
Changes
9
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Showing
9 changed files
with
111 additions
and
10 deletions
+111
-10
openair1/PHY/INIT/nr_init_ue.c
openair1/PHY/INIT/nr_init_ue.c
+36
-1
openair1/PHY/NR_REFSIG/nr_gold.c
openair1/PHY/NR_REFSIG/nr_gold.c
+29
-0
openair1/PHY/NR_REFSIG/nr_refsig.h
openair1/PHY/NR_REFSIG/nr_refsig.h
+2
-0
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+4
-1
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.c
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.c
+2
-2
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.h
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.h
+1
-1
openair1/PHY/defs_nr_UE.h
openair1/PHY/defs_nr_UE.h
+3
-0
openair1/PHY/defs_nr_common.h
openair1/PHY/defs_nr_common.h
+4
-1
openair1/SIMULATION/NR_PHY/ulsim.c
openair1/SIMULATION/NR_PHY/ulsim.c
+30
-4
No files found.
openair1/PHY/INIT/nr_init_ue.c
View file @
f3ebd694
...
...
@@ -662,11 +662,14 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
int
i
,
j
,
k
,
l
;
int
i
,
j
,
k
,
l
,
slot
,
symb
,
q
;
int
eNB_id
;
int
th_id
;
int
n_ssb_crb
=
(
fp
->
N_RB_DL
-
20
);
int
k_ssb
=
0
;
uint32_t
****
pusch_dmrs
;
int
N_n_scid
[
2
]
=
{
0
,
1
};
// [HOTFIX] This is a temporary implementation of scramblingID0 and scramblingID1 which are given by DMRS-UplinkConfig
int
n_scid
;
abstraction_flag
=
0
;
fp
->
nb_antennas_tx
=
1
;
fp
->
nb_antennas_rx
=
1
;
...
...
@@ -698,6 +701,37 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
ue
->
total_received_bits
[
eNB_id
]
=
0
;
}
/////////////////////////PUSCH DMRS init/////////////////////////
///////////
// default values until overwritten by RRCConnectionReconfiguration
//------------- config DMRS parameters--------------//
ue
->
dmrs_UplinkConfig
.
pusch_dmrs_type
=
pusch_dmrs_type1
;
ue
->
dmrs_UplinkConfig
.
pusch_dmrs_AdditionalPosition
=
pusch_dmrs_pos0
;
ue
->
dmrs_UplinkConfig
.
pusch_maxLength
=
pusch_len1
;
//-------------------------------------------------//
ue
->
nr_gold_pusch_dmrs
=
(
uint32_t
****
)
malloc16
(
fp
->
slots_per_frame
*
sizeof
(
uint32_t
***
));
pusch_dmrs
=
ue
->
nr_gold_pusch_dmrs
;
n_scid
=
0
;
// This quantity is indicated by higher layer parameter dmrs-SeqInitialization
for
(
slot
=
0
;
slot
<
fp
->
slots_per_frame
;
slot
++
)
{
pusch_dmrs
[
slot
]
=
(
uint32_t
***
)
malloc16
(
fp
->
symbols_per_slot
*
sizeof
(
uint32_t
**
));
AssertFatal
(
pusch_dmrs
[
slot
]
!=
NULL
,
"init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed
\n
"
,
slot
);
for
(
symb
=
0
;
symb
<
fp
->
symbols_per_slot
;
symb
++
){
pusch_dmrs
[
slot
][
symb
]
=
(
uint32_t
**
)
malloc16
(
NR_MAX_NB_CODEWORDS
*
sizeof
(
uint32_t
*
));
AssertFatal
(
pusch_dmrs
[
slot
][
symb
]
!=
NULL
,
"init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed
\n
"
,
slot
,
symb
);
for
(
q
=
0
;
q
<
NR_MAX_NB_CODEWORDS
;
q
++
)
{
pusch_dmrs
[
slot
][
symb
][
q
]
=
(
uint32_t
*
)
malloc16
(
NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD
*
sizeof
(
uint32_t
));
AssertFatal
(
pusch_dmrs
[
slot
][
symb
][
q
]
!=
NULL
,
"init_nr_ue_signal: pusch_dmrs for slot %d symbol %d codeword %d - malloc failed
\n
"
,
slot
,
symb
,
q
);
}
}
}
nr_init_pusch_dmrs
(
ue
,
N_n_scid
,
n_scid
);
///////////
////////////////////////////////////////////////////////////////////////////////////////////
for
(
i
=
0
;
i
<
10
;
i
++
)
ue
->
tx_power_dBm
[
i
]
=-
127
;
...
...
@@ -895,6 +929,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
ue
->
pdsch_config_dedicated
->
p_a
=
dBm3
;
else
ue
->
pdsch_config_dedicated
->
p_a
=
dB0
;
// set channel estimation to do linear interpolation in time
ue
->
high_speed_flag
=
1
;
...
...
openair1/PHY/NR_REFSIG/nr_gold.c
View file @
f3ebd694
...
...
@@ -102,3 +102,32 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
}
}
void
nr_init_pusch_dmrs
(
PHY_VARS_NR_UE
*
ue
,
uint16_t
*
N_n_scid
,
uint8_t
n_scid
)
{
uint32_t
x1
,
x2
,
n
;
uint8_t
reset
,
slot
,
symb
,
q
;
NR_DL_FRAME_PARMS
*
fp
=
&
ue
->
frame_parms
;
uint32_t
****
pusch_dmrs
=
ue
->
nr_gold_pusch_dmrs
;
for
(
slot
=
0
;
slot
<
fp
->
slots_per_frame
;
slot
++
)
{
for
(
symb
=
0
;
symb
<
fp
->
symbols_per_slot
;
symb
++
)
{
for
(
q
=
0
;
q
<
NR_MAX_NB_CODEWORDS
;
q
++
)
{
reset
=
1
;
x2
=
((
1
<<
17
)
*
(
fp
->
symbols_per_slot
*
slot
+
symb
+
1
)
*
((
N_n_scid
[
n_scid
]
<<
1
)
+
1
)
+
((
N_n_scid
[
n_scid
]
<<
1
)
+
n_scid
));
for
(
n
=
0
;
n
<
NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD
;
n
++
)
{
pusch_dmrs
[
slot
][
symb
][
q
][
n
]
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
reset
=
0
;
}
}
}
}
}
openair1/PHY/NR_REFSIG/nr_refsig.h
View file @
f3ebd694
...
...
@@ -25,6 +25,7 @@
#define __NR_REFSIG__H__
#include "PHY/defs_gNB.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
...
...
@@ -38,5 +39,6 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
*/
void
nr_init_pdcch_dmrs
(
PHY_VARS_gNB
*
gNB
,
uint32_t
Nid
);
void
nr_init_pdsch_dmrs
(
PHY_VARS_gNB
*
gNB
,
uint32_t
Nid
);
void
nr_init_pusch_dmrs
(
PHY_VARS_NR_UE
*
ue
,
uint16_t
*
N_n_scid
,
uint8_t
n_scid
);
#endif
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
View file @
f3ebd694
...
...
@@ -294,8 +294,11 @@ for (int l=0; l<rel15->nb_layers; l++)
uint16_t
n_dmrs
=
(
rel15
->
n_prb
*
rel15
->
nb_re_dmrs
)
<<
1
;
int16_t
mod_dmrs
[
n_dmrs
<<
1
];
uint8_t
dmrs_type
=
config
.
pdsch_config
.
dmrs_type
.
value
;
l0
=
get_l0
(
dmrs_type
,
2
);
//config.pdsch_config.dmrs_typeA_position.value);
uint8_t
mapping_type
=
config
.
pdsch_config
.
mapping_type
.
value
;
l0
=
get_l0
(
mapping_type
,
2
);
//config.pdsch_config.dmrs_typeA_position.value);
nr_modulation
(
pdsch_dmrs
[
l0
][
0
],
n_dmrs
,
MOD_QPSK
,
mod_dmrs
);
// currently only codeword 0 is modulated
#ifdef DEBUG_DLSCH
printf
(
"DMRS modulation (single symbol %d, %d symbols, type %d):
\n
"
,
l0
,
n_dmrs
>>
1
,
dmrs_type
);
for
(
int
i
=
0
;
i
<
n_dmrs
>>
4
;
i
++
)
{
...
...
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.c
View file @
f3ebd694
...
...
@@ -84,6 +84,6 @@ uint8_t get_delta(uint8_t ap, uint8_t config) {
return
((
config
==
NFAPI_NR_DMRS_TYPE1
)
?
(
pdsch_dmrs_1
[
ap
][
2
])
:
(
pdsch_dmrs_2
[
ap
][
2
]));
}
uint8_t
get_l0
(
uint8_t
config
,
uint8_t
dmrs_typeA_position
)
{
return
((
config
==
NFAPI_NR_DMRS_TYPE1
)
?
dmrs_typeA_position
:
0
);
uint8_t
get_l0
(
uint8_t
mapping_type
,
uint8_t
dmrs_typeA_position
)
{
return
((
mapping_type
==
NFAPI_NR_PDSCH_MAPPING_TYPE_A
)
?
dmrs_typeA_position
:
0
);
}
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.h
View file @
f3ebd694
...
...
@@ -45,4 +45,4 @@ void get_Wf(int8_t *Wf, uint8_t ap, uint8_t config);
uint8_t
get_delta
(
uint8_t
ap
,
uint8_t
config
);
uint8_t
get_l0
(
uint8_t
config
,
uint8_t
dmrs_typeA_position
);
uint8_t
get_l0
(
uint8_t
mapping_type
,
uint8_t
dmrs_typeA_position
);
openair1/PHY/defs_nr_UE.h
View file @
f3ebd694
...
...
@@ -983,6 +983,9 @@ typedef struct {
/// PDCCH DMRS
uint32_t
nr_gold_pdcch
[
7
][
20
][
3
][
52
];
/// PUSCH DMRS sequence
uint32_t
****
nr_gold_pusch_dmrs
;
uint32_t
X_u
[
64
][
839
];
uint32_t
high_speed_flag
;
...
...
openair1/PHY/defs_nr_common.h
View file @
f3ebd694
...
...
@@ -74,9 +74,12 @@
/*used for the resource mapping*/
#define NR_MAX_PDCCH_DMRS_LENGTH 576 // 16(L)*2(QPSK)*3(3 DMRS symbs per REG)*6(REG per CCE)
#define NR_MAX_PDSCH_DMRS_LENGTH 3300 //275*6(k)*2(QPSK
)
#define NR_MAX_PDSCH_DMRS_LENGTH 3300 //275*6(k)*2(QPSK
real+imag)
#define NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD 104 // ceil(NR_MAX_PDSCH_DMRS_LENGTH/32)
#define NR_MAX_PUSCH_DMRS_LENGTH NR_MAX_PDSCH_DMRS_LENGTH
#define NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD
#define NR_MAX_DCI_PAYLOAD_SIZE 64
#define NR_MAX_DCI_SIZE 1728 //16(L)*2(QPSK)*9(12 RE per REG - 3(DMRS))*6(REG per CCE)
#define NR_MAX_DCI_SIZE_DWORD 54 // ceil(NR_MAX_DCI_SIZE/32)
...
...
openair1/SIMULATION/NR_PHY/ulsim.c
View file @
f3ebd694
...
...
@@ -145,7 +145,7 @@ int main(int argc, char **argv) {
uint16_t
N_RB_DL
=
106
,
N_RB_UL
=
106
,
mu
=
1
;
//unsigned char frame_type = 0;
unsigned
char
pbch_phase
=
0
;
int
frame
=
0
,
subframe
=
0
;
int
frame
=
0
,
subframe
=
0
,
slot
=
1
;
int
frame_length_complex_samples
;
NR_DL_FRAME_PARMS
*
frame_parms
;
uint32_t
Nsoft
=
0
;
...
...
@@ -158,6 +158,12 @@ int main(int argc, char **argv) {
uint16_t
nb_symb_sch
=
12
;
uint16_t
nb_rb
=
50
;
uint8_t
Imcs
=
9
;
uint16_t
n_dmrs
;
uint8_t
dmrs_TypeA_Position
;
int
l0
;
uint32_t
***
pusch_dmrs
;
PUSCH_TimeDomainResourceAllocation_t
pusch_time_alloc
;
cpuf
=
get_cpu_freq_GHz
();
...
...
@@ -453,6 +459,12 @@ int main(int argc, char **argv) {
TBS
=
nr_compute_tbs
(
Imcs
,
nb_rb
,
nb_symb_sch
,
nb_re_dmrs
,
length_dmrs
,
Nl
);
printf
(
"available bits %d TBS %d mod_order %d
\n
"
,
available_bits
,
TBS
,
mod_order
);
/////////// setting PUSCH_TimeDomainResourceAllocation_t parameters ///////////
pusch_time_alloc
.
mappingType
=
typeA
;
///////////////////////////////////////////////////
/////////// setting rel15_ul parameters ///////////
rel15_ul
->
number_rbs
=
nb_rb
;
rel15_ul
->
number_symbols
=
nb_symb_sch
;
...
...
@@ -565,9 +577,23 @@ int main(int argc, char **argv) {
///////////
////////////////////////////////////////////////////////////////////////
for
(
SNR
=
snr0
;
SNR
<
snr1
;
SNR
+=
snr_step
)
{
n_errors
=
0
;
n_false_positive
=
0
;
/////////////////////////PUSCH DMRS/////////////////////////
///////////
pusch_dmrs
=
UE
->
nr_gold_pusch_dmrs
[
slot
];
dmrs_TypeA_Position
=
2
;
// This parameter is given by dmrs_TypeA_Position which is located in MIB.
n_dmrs
=
nb_re_dmrs
<<
1
;
int16_t
mod_dmrs
[
n_dmrs
<<
1
];
l0
=
get_l0
(
pusch_time_alloc
.
mappingType
,
dmrs_TypeA_Position
);
//config.pdsch_config.dmrs_typeA_position.value);
nr_modulation
(
pusch_dmrs
[
l0
][
0
],
n_dmrs
,
MOD_QPSK
,
mod_dmrs
);
// currently only codeword 0 is modulated
///////////
////////////////////////////////////////////////////////////////////////
for
(
SNR
=
snr0
;
SNR
<
snr1
;
SNR
+=
snr_step
)
{
n_errors
=
0
;
n_false_positive
=
0
;
for
(
trial
=
0
;
trial
<
n_trials
;
trial
++
)
{
...
...
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