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Commit f9b583e0 authored by Khalid Ahmed's avatar Khalid Ahmed Committed by Thomas Schlichter
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PUSCH running with rfsimulator

parent 45419222
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Showing with 150 additions and 131 deletions
.gitignore
View file @ f9b583e0
......@@ -4,6 +4,7 @@
# log and exec file
cmake_targets/log/
cmake_targets/*/build/
cmake_targets/ran_build/
log/
lte_build_oai/
targets/bin/
\ No newline at end of file
targets/bin/
executables/nr-ru.c
View file @ f9b583e0
......@@ -659,6 +659,7 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
ru->nb_rx);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 0 );
proc->timestamp_rx = ts-ru->ts_offset;
......@@ -1445,6 +1446,7 @@ static void *ru_thread( void *param ) {
}
// synchronization on input FH interface, acquire signals/data and block
LOG_D(PHY,"[RU_thread] read data: frame_rx = %d, tti_rx = %d\n", frame, slot);
if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&slot);
else AssertFatal(1==0, "No fronthaul interface at south port");
......@@ -1471,14 +1473,12 @@ static void *ru_thread( void *param ) {
// do RX front-end processing (frequency-shift, dft) if needed
if (ru->feprx) ru->feprx(ru,proc->tti_rx);
LOG_I(PHY,"RU proc: frame_rx = %d, tti_rx = %d\n", proc->frame_rx, proc->tti_rx);
LOG_I(PHY,"gNB proc: frame_rx = %d, slot_rx = %d\n", RC.gNB[0][0]->proc.frame_rx, RC.gNB[0][0]->proc.slot_rx);
LOG_I(PHY,"Copying rxdataF from RU to gNB\n");
LOG_D(PHY,"RU proc: frame_rx = %d, tti_rx = %d\n", proc->frame_rx, proc->tti_rx);
LOG_D(PHY,"Copying rxdataF from RU to gNB\n");
for (aa=0;aa<ru->nb_rx;aa++)
memcpy((void*)RC.gNB[0][0]->common_vars.rxdataF[aa],
(void*)&ru->common.rxdataF[aa][proc->tti_rx*fp->symbols_per_tti*fp->ofdm_symbol_size],
fp->symbols_per_tti*fp->ofdm_symbol_size*sizeof(int32_t));
(void*)ru->common.rxdataF[aa], fp->symbols_per_slot*fp->ofdm_symbol_size*sizeof(int32_t));
// At this point, all information for subframe has been received on FH interface
......@@ -2152,7 +2152,7 @@ void init_NR_RU(char *rf_config_file)
if (gNB0) {
LOG_I(PHY,"Copying frame parms from gNB %d to ru %d\n",gNB0->Mod_id,ru->idx);
memcpy((void *)fp,(void *)&gNB0->frame_parms,sizeof(NR_DL_FRAME_PARMS));
memset((void *)ru->frame_parms, 0, sizeof(LTE_DL_FRAME_PARMS));
memset((void *)ru->nr_frame_parms, 0, sizeof(NR_DL_FRAME_PARMS));
// attach all RU to all gNBs in its list/
LOG_D(PHY,"ru->num_gNB:%d gNB0->num_RU:%d\n", ru->num_gNB, gNB0->num_RU);
......
executables/nr-ue.c
View file @ f9b583e0
......@@ -141,8 +141,10 @@ PHY_VARS_NR_UE *init_nr_ue_vars(NR_DL_FRAME_PARMS *frame_parms,
ue = (PHY_VARS_NR_UE *)malloc(sizeof(PHY_VARS_NR_UE));
memset(ue,0,sizeof(PHY_VARS_NR_UE));
memcpy(&(ue->frame_parms), frame_parms, sizeof(NR_DL_FRAME_PARMS));
ue->Mod_id = UE_id;
ue->mac_enabled = 1;
// initialize all signal buffers
init_nr_ue_signal(ue,1,abstraction_flag);
// intialize transport
......@@ -430,14 +432,12 @@ void UE_processing(void *arg) {
(UE->frame_parms.frame_type == FDD) )
#endif
*/
if (proc->nr_tti_tx == NR_UPLINK_SLOT){
LOG_I(PHY, "[UE_processing] Frame = %d, Slot = %d\n", proc->frame_tx, proc->nr_tti_tx);
//if (proc->nr_tti_tx == NR_UPLINK_SLOT){
if (UE->mode != loop_through_memory)
phy_procedures_nrUE_TX(UE,proc,0,0);
}
//}
//phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay);
......@@ -664,7 +664,7 @@ void *UE_thread(void *arg) {
slot_nr*UE->frame_parms.samples_per_slot];
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
txp[i] = (void *)&UE->common_vars.txdata[i][curMsg->proc.nr_tti_tx*UE->frame_parms.samples_per_slot];
txp[i] = (void *)&UE->common_vars.txdata[i][((curMsg->proc.nr_tti_rx + 2)%nb_slot_frame)*UE->frame_parms.samples_per_slot];
int readBlockSize, writeBlockSize;
......
executables/nr-uesoftmodem.c
View file @ f9b583e0
......@@ -77,6 +77,7 @@ unsigned short config_frames[4] = {2,9,11,13};
#include <forms.h>
/* Callbacks, globals and object handlers */
extern void reset_stats( FL_OBJECT *, long );
......@@ -735,6 +736,7 @@ int main( int argc, char **argv ) {
PHY_vars_UE_g[0][CC_id] = init_nr_ue_vars(frame_parms[CC_id], 0,abstraction_flag);
UE[CC_id] = PHY_vars_UE_g[0][CC_id];
if (phy_test==1)
UE[CC_id]->mac_enabled = 0;
else
......
openair1/PHY/INIT/nr_parms.c
View file @ f9b583e0
......@@ -224,6 +224,8 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
fp->slots_per_frame = 10* fp->slots_per_subframe;
fp->nb_antenna_ports_eNB = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_rx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_tx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe;
......
openair1/PHY/NR_REFSIG/nr_gold.c
View file @ f9b583e0
......@@ -143,7 +143,7 @@ void nr_gold_pusch(PHY_VARS_gNB* gNB, unsigned short lbar,unsigned short *n_idDM
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
for (n=0; n<52; n++) {
for (n=0; n<NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
......
openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
View file @ f9b583e0
......@@ -176,96 +176,96 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch)
unsigned char i, j;
if (ulsch) {
ulsch->harq_mask = 0;
ulsch->bundling = 0;
ulsch->beta_offset_cqi_times8 = 0;
ulsch->beta_offset_ri_times8 = 0;
ulsch->beta_offset_harqack_times8 = 0;
ulsch->Msg3_active = 0;
ulsch->Msg3_flag = 0;
ulsch->Msg3_subframe = 0;
ulsch->Msg3_frame = 0;
ulsch->rnti = 0;
ulsch->rnti_type = 0;
ulsch->cyclicShift = 0;
ulsch->cooperation_flag = 0;
ulsch->Mlimit = 0;
ulsch->max_ldpc_iterations = 0;
ulsch->last_iteration_cnt = 0;
ulsch->num_active_cba_groups = 0;
for (i=0;i<NUM_MAX_CBA_GROUP;i++) ulsch->cba_rnti[i] = 0;
for (i=0;i<NR_MAX_SLOTS_PER_FRAME;i++) ulsch->harq_process_id[i] = 0;
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
if (ulsch->harq_processes[i]){
/// Nfapi ULSCH PDU
//nfapi_nr_ul_config_ulsch_pdu ulsch_pdu;
ulsch->harq_processes[i]->frame=0;
ulsch->harq_processes[i]->subframe=0;
ulsch->harq_processes[i]->round=0;
ulsch->harq_processes[i]->TPC=0;
ulsch->harq_processes[i]->mimo_mode=0;
ulsch->harq_processes[i]->dci_alloc=0;
ulsch->harq_processes[i]->rar_alloc=0;
ulsch->harq_processes[i]->status=0;
ulsch->harq_processes[i]->subframe_scheduling_flag=0;
ulsch->harq_processes[i]->subframe_cba_scheduling_flag=0;
ulsch->harq_processes[i]->phich_active=0;
ulsch->harq_processes[i]->phich_ACK=0;
ulsch->harq_processes[i]->previous_first_rb=0;
ulsch->harq_processes[i]->handled=0;
ulsch->harq_processes[i]->delta_TF=0;
ulsch->harq_processes[i]->TBS=0;
/// Pointer to the payload (38.212 V15.4.0 section 5.1)
//uint8_t *b;
ulsch->harq_processes[i]->B=0;
/// Pointers to code blocks after code block segmentation and CRC attachment (38.212 V15.4.0 section 5.2.2)
//uint8_t *c[MAX_NUM_NR_ULSCH_SEGMENTS];
ulsch->harq_processes[i]->K=0;
ulsch->harq_processes[i]->F=0;
ulsch->harq_processes[i]->C=0;
/// Pointers to code blocks after LDPC coding (38.212 V15.4.0 section 5.3.2)
//int16_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
/// LDPC processing buffer
//t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_NR_ULSCH_SEGMENTS];
ulsch->harq_processes[i]->Z=0;
/// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
//int16_t e[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
ulsch->harq_processes[i]->E=0;
ulsch->harq_processes[i]->n_DMRS=0;
ulsch->harq_processes[i]->n_DMRS2=0;
ulsch->harq_processes[i]->previous_n_DMRS=0;
ulsch->harq_processes[i]->cqi_crc_status=0;
for (j=0;j<MAX_CQI_BYTES;j++) ulsch->harq_processes[i]->o[j]=0;
ulsch->harq_processes[i]->uci_format=0;
ulsch->harq_processes[i]->Or1=0;
ulsch->harq_processes[i]->Or2=0;
ulsch->harq_processes[i]->o_RI[0]=0; ulsch->harq_processes[i]->o_RI[1]=0;
ulsch->harq_processes[i]->O_RI=0;
ulsch->harq_processes[i]->o_ACK[0]=0; ulsch->harq_processes[i]->o_ACK[1]=0;
ulsch->harq_processes[i]->o_ACK[2]=0; ulsch->harq_processes[i]->o_ACK[3]=0;
ulsch->harq_processes[i]->O_ACK=0;
ulsch->harq_processes[i]->V_UL_DAI=0;
/// "q" sequences for CQI/PMI (for definition see 36-212 V8.6 2009-03, p.27)
//int8_t q[MAX_CQI_PAYLOAD];
ulsch->harq_processes[i]->o_RCC=0;
/// coded and interleaved CQI bits
//int8_t o_w[(MAX_CQI_BITS+8)*3];
/// coded CQI bits
//int8_t o_d[96+((MAX_CQI_BITS+8)*3)];
for (j=0;j<MAX_ACK_PAYLOAD;j++) ulsch->harq_processes[i]->q_ACK[j]=0;
for (j=0;j<MAX_RI_PAYLOAD;j++) ulsch->harq_processes[i]->q_RI[j]=0;
/// Temporary h sequence to flag PUSCH_x/PUSCH_y symbols which are not scrambled
//uint8_t h[MAX_NUM_CHANNEL_BITS];
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
//int16_t w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
}
}
ulsch->harq_mask = 0;
ulsch->bundling = 0;
ulsch->beta_offset_cqi_times8 = 0;
ulsch->beta_offset_ri_times8 = 0;
ulsch->beta_offset_harqack_times8 = 0;
ulsch->Msg3_active = 0;
ulsch->Msg3_flag = 0;
ulsch->Msg3_subframe = 0;
ulsch->Msg3_frame = 0;
ulsch->rnti = 0;
ulsch->rnti_type = 0;
ulsch->cyclicShift = 0;
ulsch->cooperation_flag = 0;
ulsch->Mlimit = 0;
ulsch->max_ldpc_iterations = 0;
ulsch->last_iteration_cnt = 0;
ulsch->num_active_cba_groups = 0;
for (i=0;i<NUM_MAX_CBA_GROUP;i++) ulsch->cba_rnti[i] = 0;
for (i=0;i<NR_MAX_SLOTS_PER_FRAME;i++) ulsch->harq_process_id[i] = 0;
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
if (ulsch->harq_processes[i]){
/// Nfapi ULSCH PDU
//nfapi_nr_ul_config_ulsch_pdu ulsch_pdu;
ulsch->harq_processes[i]->frame=0;
ulsch->harq_processes[i]->subframe=0;
ulsch->harq_processes[i]->round=0;
ulsch->harq_processes[i]->TPC=0;
ulsch->harq_processes[i]->mimo_mode=0;
ulsch->harq_processes[i]->dci_alloc=0;
ulsch->harq_processes[i]->rar_alloc=0;
ulsch->harq_processes[i]->status=0;
ulsch->harq_processes[i]->subframe_scheduling_flag=0;
ulsch->harq_processes[i]->subframe_cba_scheduling_flag=0;
ulsch->harq_processes[i]->phich_active=0;
ulsch->harq_processes[i]->phich_ACK=0;
ulsch->harq_processes[i]->previous_first_rb=0;
ulsch->harq_processes[i]->handled=0;
ulsch->harq_processes[i]->delta_TF=0;
ulsch->harq_processes[i]->TBS=0;
/// Pointer to the payload (38.212 V15.4.0 section 5.1)
//uint8_t *b;
ulsch->harq_processes[i]->B=0;
/// Pointers to code blocks after code block segmentation and CRC attachment (38.212 V15.4.0 section 5.2.2)
//uint8_t *c[MAX_NUM_NR_ULSCH_SEGMENTS];
ulsch->harq_processes[i]->K=0;
ulsch->harq_processes[i]->F=0;
ulsch->harq_processes[i]->C=0;
/// Pointers to code blocks after LDPC coding (38.212 V15.4.0 section 5.3.2)
//int16_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
/// LDPC processing buffer
//t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_NR_ULSCH_SEGMENTS];
ulsch->harq_processes[i]->Z=0;
/// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
//int16_t e[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
ulsch->harq_processes[i]->E=0;
ulsch->harq_processes[i]->n_DMRS=0;
ulsch->harq_processes[i]->n_DMRS2=0;
ulsch->harq_processes[i]->previous_n_DMRS=0;
ulsch->harq_processes[i]->cqi_crc_status=0;
for (j=0;j<MAX_CQI_BYTES;j++) ulsch->harq_processes[i]->o[j]=0;
ulsch->harq_processes[i]->uci_format=0;
ulsch->harq_processes[i]->Or1=0;
ulsch->harq_processes[i]->Or2=0;
ulsch->harq_processes[i]->o_RI[0]=0; ulsch->harq_processes[i]->o_RI[1]=0;
ulsch->harq_processes[i]->O_RI=0;
ulsch->harq_processes[i]->o_ACK[0]=0; ulsch->harq_processes[i]->o_ACK[1]=0;
ulsch->harq_processes[i]->o_ACK[2]=0; ulsch->harq_processes[i]->o_ACK[3]=0;
ulsch->harq_processes[i]->O_ACK=0;
ulsch->harq_processes[i]->V_UL_DAI=0;
/// "q" sequences for CQI/PMI (for definition see 36-212 V8.6 2009-03, p.27)
//int8_t q[MAX_CQI_PAYLOAD];
ulsch->harq_processes[i]->o_RCC=0;
/// coded and interleaved CQI bits
//int8_t o_w[(MAX_CQI_BITS+8)*3];
/// coded CQI bits
//int8_t o_d[96+((MAX_CQI_BITS+8)*3)];
for (j=0;j<MAX_ACK_PAYLOAD;j++) ulsch->harq_processes[i]->q_ACK[j]=0;
for (j=0;j<MAX_RI_PAYLOAD;j++) ulsch->harq_processes[i]->q_RI[j]=0;
/// Temporary h sequence to flag PUSCH_x/PUSCH_y symbols which are not scrambled
//uint8_t h[MAX_NUM_CHANNEL_BITS];
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
//int16_t w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
}
}
}
}
......@@ -642,7 +642,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
// harq_process->harq_ack.harq_id = harq_pid;
// harq_process->harq_ack.send_harq_status = 1;
// harq_process->errors[harq_process->round]++;
harq_process->round++;
//harq_process->round++;
if (harq_process->round >= ulsch->Mlimit) {
harq_process->status = SCH_IDLE;
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
View file @ f9b583e0
......@@ -275,7 +275,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
#if UE_TIMING_TRACE
if(symbol > ue->frame_parms.symbols_per_tti>>1)
if(symbol > ue->frame_parms.symbols_per_slot>>1)
{
slot = 1;
}
......@@ -1064,9 +1064,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#if T_TRACER
T(T_UE_PHY_PDSCH_IQ, T_INT(eNB_id), T_INT(ue->Mod_id), T_INT(frame%1024),
T_INT(nr_tti_rx), T_INT(nb_rb),
T_INT(frame_parms->N_RB_UL), T_INT(frame_parms->symbols_per_tti),
T_INT(frame_parms->N_RB_UL), T_INT(frame_parms->symbols_per_slot),
T_BUFFER(&pdsch_vars[eNB_id]->rxdataF_comp0[eNB_id][0],
2 * /* ulsch[UE_id]->harq_processes[harq_pid]->nb_rb */ frame_parms->N_RB_UL *12*frame_parms->symbols_per_tti*2));
2 * /* ulsch[UE_id]->harq_processes[harq_pid]->nb_rb */ frame_parms->N_RB_UL *12*frame_parms->symbols_per_slot*2));
#endif
return(0);
......
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c
View file @ f9b583e0
......@@ -317,6 +317,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
///////////
/////////////////////////////////////////////////////////////////////////////////////
opp_enabled=0;
///////////////////////// c---->| LDCP coding |---->d /////////////////////////
///////////
......
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
View file @ f9b583e0
......@@ -239,7 +239,6 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////DMRS Modulation/////////////////////////
///////////
pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
n_dmrs = (harq_process_ul_ue->nb_rb*ulsch_ue->nb_re_dmrs);
int16_t mod_dmrs[n_dmrs<<1];
......@@ -249,7 +248,6 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
l0 = get_l0_ul(mapping_type, 2);
nr_modulation(pusch_dmrs[l0][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
///////////
////////////////////////////////////////////////////////////////////////
......@@ -338,7 +336,7 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PUSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t dmrs: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[(sample_offsetF)<<1],
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1]);
#endif
......@@ -369,7 +367,6 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
}
}
///////////
////////////////////////////////////////////////////////////////////////
......@@ -415,7 +412,6 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
frame_parms);
}
}
///////////
////////////////////////////////////////////////////
return 0;
......
openair1/PHY/defs_gNB.h
View file @ f9b583e0
......@@ -669,7 +669,7 @@ typedef struct PHY_VARS_gNB_s {
uint32_t ****nr_gold_pdsch_dmrs;
/// PUSCH DMRS
uint32_t nr_gold_pusch[2][20][2][52];
uint32_t nr_gold_pusch[2][20][2][NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD];
/// Indicator set to 0 after first SR
uint8_t first_sr[NUMBER_OF_UE_MAX];
......
openair1/SCHED_NR/nr_ru_procedures.c
View file @ f9b583e0
......@@ -264,7 +264,7 @@ void nr_fep0(RU_t *ru, int first_half) {
end_symbol = NR_SYMBOLS_PER_SLOT;
}
LOG_I(PHY,"In fep0 for slot = %d, first_half = %d, start_symbol = %d, end_symbol = %d\n", proc->tti_rx, first_half, start_symbol, end_symbol);
LOG_D(PHY,"In fep0 for slot = %d, first_half = %d, start_symbol = %d, end_symbol = %d\n", proc->tti_rx, first_half, start_symbol, end_symbol);
// printf("fep0: slot %d\n",slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+proc->tti_rx, 1);
......@@ -405,7 +405,7 @@ void nr_fep_full(RU_t *ru, int slot) {
// remove_7_5_kHz(ru,proc->tti_rx<<1);
// remove_7_5_kHz(ru,1+(proc->tti_rx<<1));
for (l = 0; l < fp->symbols_per_tti; l++) {
for (l = 0; l < fp->symbols_per_slot; l++) {
for (aa = 0; aa < fp->nb_antennas_rx; aa++) {
nr_slot_fep_ul(fp,
ru->common.rxdata[aa],
......
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @ f9b583e0
......@@ -282,7 +282,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx,
uint8_t harq_pid = 0; // [hna] Previously in LTE, the harq_pid was obtained from the subframe number (Synchronous HARQ)
// In NR, this should be signaled through uplink scheduling dci (i.e, DCI 0_0, 0_1) (Asynchronous HARQ)
for (UE_id = 0; UE_id < NUMBER_OF_NR_UE_MAX; UE_id++) {
for (UE_id = 0; UE_id < 1; UE_id++) { // temporary set to 1 untill list of connected UEs is implemented
for(symbol = symbol_start; symbol < symbol_end; symbol++) {
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ f9b583e0
......@@ -2483,7 +2483,6 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
start_meas(&ue->phy_proc_tx);
#endif
harq_pid = 0; //temporary implementation
/*
......@@ -2498,11 +2497,26 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
TBS = nr_compute_tbs( harq_process_ul_ue->mcs, harq_process_ul_ue->nb_rb, ulsch_ue->Nsymb_pusch, ulsch_ue->nb_re_dmrs, ulsch_ue->length_dmrs, harq_process_ul_ue->Nl);
LOG_I(PHY, "[phy_procedures_nrUE_TX] mcs = %d, nb_rb = %d \n , Nsymb_pusch = %d, nb_re_dmrs = %d, length_dmrs = %d, precod_nbr_layers = %d, TBS = %d\n",
harq_process_ul_ue->mcs,
harq_process_ul_ue->nb_rb,
ulsch_ue->Nsymb_pusch,
ulsch_ue->nb_re_dmrs,
ulsch_ue->length_dmrs,
harq_process_ul_ue->Nl,
TBS);
//-----------------------------------------------------//
// to be removed later when MAC is ready
for (i = 0; i < TBS / 8; i++)
harq_process_ul_ue->a[i] = (unsigned char) rand();
if (harq_process_ul_ue != NULL){
for (i = 0; i < TBS / 8; i++)
harq_process_ul_ue->a[i] = (unsigned char) rand();
} else {
LOG_E(PHY, "[phy_procedures_nrUE_TX] harq_process_ul_ue is NULL !!\n");
return;
}
//-----------------------------------------------------//
......@@ -2529,6 +2543,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
&ue->frame_parms);
/*
if ((ue->UE_mode[eNB_id] == PRACH) &&
(ue->frame_parms.prach_config_common.prach_Config_enabled==1)) {
......@@ -3405,7 +3420,7 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
first_symbol_flag = 0;
#if UE_TIMING_TRACE
uint8_t slot = 0;
if(m >= ue->frame_parms.symbols_per_tti>>1)
if(m >= ue->frame_parms.symbols_per_slot>>1)
slot = 1;
start_meas(&ue->dlsch_llr_stats_parallelization[ue->current_thread_id[nr_tti_rx]][slot]);
#endif
......@@ -3898,7 +3913,7 @@ void *UE_thread_slot1_dl_processing(void *arg) {
0);
*/
// 1- perform FFT
for (int l=1; l<ue->frame_parms.symbols_per_tti>>1; l++)
for (int l=1; l<ue->frame_parms.symbols_per_slot>>1; l++)
{
//if( (l != pilot0) && (l != pilot1))
{
......@@ -3930,7 +3945,7 @@ void *UE_thread_slot1_dl_processing(void *arg) {
}
// 2- perform Channel Estimation for slot1
for (int l=1; l<ue->frame_parms.symbols_per_tti>>1; l++)
for (int l=1; l<ue->frame_parms.symbols_per_slot>>1; l++)
{
if(l == pilot1)
{
......@@ -4018,8 +4033,8 @@ void *UE_thread_slot1_dl_processing(void *arg) {
PDSCH,
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
NULL,
(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
(ue->frame_parms.symbols_per_slot>>1),
ue->frame_parms.symbols_per_slot-1,
abstraction_flag);
LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
LOG_D(PHY," ------ --> PDSCH Turbo Decoder slot 0/1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
......@@ -4033,8 +4048,8 @@ void *UE_thread_slot1_dl_processing(void *arg) {
SI_PDSCH,
ue->dlsch_SI[eNB_id],
NULL,
(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
(ue->frame_parms.symbols_per_slot>>1),
ue->frame_parms.symbols_per_slot-1,
abstraction_flag);
}
......@@ -4046,8 +4061,8 @@ void *UE_thread_slot1_dl_processing(void *arg) {
P_PDSCH,
ue->dlsch_p[eNB_id],
NULL,
(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
(ue->frame_parms.symbols_per_slot>>1),
ue->frame_parms.symbols_per_slot-1,
abstraction_flag);
}
// do procedures for RA-RNTI
......@@ -4058,8 +4073,8 @@ void *UE_thread_slot1_dl_processing(void *arg) {
RA_PDSCH,
ue->dlsch_ra[eNB_id],
NULL,
(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
(ue->frame_parms.symbols_per_slot>>1),
ue->frame_parms.symbols_per_slot-1,
abstraction_flag);
}
......@@ -4228,7 +4243,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
//set active for testing, to be removed
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 1;
}
else
else
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
#if UE_TIMING_TRACE
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
View file @ f9b583e0
......@@ -91,6 +91,8 @@ typedef struct {
uint32_t slot;
/// ssb_index, if ssb is not present in current TTI, thie value set to -1
int ssb_index;
/// dci reception indication structure
fapi_nr_dci_indication_t *dci_ind;
} nr_uplink_indication_t;
// Downlink subframe P7
......
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