Commit 19a2b37c authored by jftt_wangshanshan's avatar jftt_wangshanshan

Fix bug in Adaptive Retransmission for ULSCH. Fix Qm,mcs,TBS setting.

parent 5a461002
...@@ -2783,6 +2783,7 @@ void fill_ulsch(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_ulsch_pdu *ulsch_pdu ...@@ -2783,6 +2783,7 @@ void fill_ulsch(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_ulsch_pdu *ulsch_pdu
ulsch->harq_processes[harq_pid]->ndi, ulsch_pdu->ulsch_pdu_rel8.new_data_indication, new_ulsch, ulsch->harq_processes[harq_pid]->status); ulsch->harq_processes[harq_pid]->ndi, ulsch_pdu->ulsch_pdu_rel8.new_data_indication, new_ulsch, ulsch->harq_processes[harq_pid]->status);
ulsch->harq_processes[harq_pid]->rvidx = ulsch_pdu->ulsch_pdu_rel8.redundancy_version; ulsch->harq_processes[harq_pid]->rvidx = ulsch_pdu->ulsch_pdu_rel8.redundancy_version;
if(ulsch_pdu->ulsch_pdu_rel8.modulation_type!=0)
ulsch->harq_processes[harq_pid]->Qm = ulsch_pdu->ulsch_pdu_rel8.modulation_type; ulsch->harq_processes[harq_pid]->Qm = ulsch_pdu->ulsch_pdu_rel8.modulation_type;
// Set O_ACK to 0 by default, will be set of DLSCH is scheduled and needs to be // Set O_ACK to 0 by default, will be set of DLSCH is scheduled and needs to be
ulsch->harq_processes[harq_pid]->O_ACK = 0; ulsch->harq_processes[harq_pid]->O_ACK = 0;
......
...@@ -1705,8 +1705,10 @@ fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t * ...@@ -1705,8 +1705,10 @@ fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2; ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
else if (mcs < 21) else if (mcs < 21)
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4; ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4;
else else if(mcs < 29)
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6; ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6;
else
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms =
cyclic_shift_2_for_drms; cyclic_shift_2_for_drms;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8. ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.
......
...@@ -1997,8 +1997,13 @@ void schedule_ulsch_rnti(module_id_t module_idP, ...@@ -1997,8 +1997,13 @@ void schedule_ulsch_rnti(module_id_t module_idP,
round = UE_sched_ctrl->round_UL[CC_id][harq_pid]; round = UE_sched_ctrl->round_UL[CC_id][harq_pid];
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power=normalized_rx_power; UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power=normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power; UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power;
if(rvidx_tab[round&3]==1){
UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb); UE_template->mcs_UL[harq_pid] = 29;
}else if(rvidx_tab[round&3]==2){
UE_template->mcs_UL[harq_pid] = 30;
}else if(rvidx_tab[round&3]==3){
UE_template->mcs_UL[harq_pid] = 31;
}
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=UE_template->TBS_UL[harq_pid]; UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=UE_template->TBS_UL[harq_pid];
if (mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) if (mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED)
...@@ -2045,6 +2050,7 @@ void schedule_ulsch_rnti(module_id_t module_idP, ...@@ -2045,6 +2050,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = UE_template->cshift[harq_pid]; hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = UE_template->cshift[harq_pid];
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0; hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
hi_dci0_req->number_of_hi++; hi_dci0_req->number_of_hi++;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.tl.tag = NFAPI_HI_DCI0_REQUEST_HI_PDU_REL8_TAG;
hi_dci0_req->sfnsf = sfnsf_add_subframe(sched_frame, sched_subframeP, 0); //(frameP, subframeP, 4) hi_dci0_req->sfnsf = sfnsf_add_subframe(sched_frame, sched_subframeP, 0); //(frameP, subframeP, 4)
nfapi_hi_dci0_request_t *nfapi_hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP]; nfapi_hi_dci0_request_t *nfapi_hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP];
...@@ -2077,8 +2083,7 @@ void schedule_ulsch_rnti(module_id_t module_idP, ...@@ -2077,8 +2083,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
0, // ul_tx_mode 0, // ul_tx_mode
0, // current_tx_nb 0, // current_tx_nb
0, // n_srs 0, // n_srs
get_TBS_UL(UE_template->mcs_UL[harq_pid], UE_template->TBS_UL[harq_pid]
ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb)
); );
#ifdef Rel14 #ifdef Rel14
if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
......
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