Commit 2ebbc2f0 authored by Raymond Knopp's avatar Raymond Knopp

Merge branch 'l1-sidelink' of https://gitlab.eurecom.fr/matzakos/LTE-D2D into l1-sidelink

parents f86a5a16 d4b27659
This diff is collapsed.
......@@ -414,18 +414,23 @@ int32_t lte_ul_channel_estimation(LTE_DL_FRAME_PARMS *frame_parms,
} //if (Ns&1 && interpolate==1)
else if (interpolate == 0 && l == pilot_pos1)
for (k=0;k<frame_parms->symbols_per_tti>>1;k++) {
if (k==pilot_pos1) k++;
memcpy((void*)&ul_ch_estimates[aa][frame_parms->N_RB_UL*12*k],
(void*)&ul_ch_estimates[aa][frame_parms->N_RB_UL*12*pilot_pos1],
frame_parms->N_RB_UL*12*sizeof(int));
if (k==pilot_pos1) k++;
}
else if (interpolate == 0 && l == pilot_pos2)
else if (interpolate == 0 && l == pilot_pos2) {
for (k=0;k<frame_parms->symbols_per_tti>>1;k++) {
if (k==pilot_pos1) k++;
if (k==pilot_pos2) k++;
memcpy((void*)&ul_ch_estimates[aa][frame_parms->N_RB_UL*12*(k+(frame_parms->symbols_per_tti>>1))],
(void*)&ul_ch_estimates[aa][frame_parms->N_RB_UL*12*pilot_pos2],
frame_parms->N_RB_UL*12*sizeof(int));
}
delta_phase = lte_ul_freq_offset_estimation(frame_parms,
ul_ch_estimates[aa],
N_rb_alloc);
LOG_I(PHY,"delta_phase = %d\n",delta_phase);
}
} //for(aa=...
return(0);
}
......@@ -605,18 +610,19 @@ int16_t lte_ul_freq_offset_estimation(LTE_DL_FRAME_PARMS *frame_parms,
mmtmpD3 = _mm_unpackhi_epi32(mmtmpD0,mmtmpD1);
R[2] = _mm_packs_epi32(mmtmpD2,mmtmpD3);
R[0] = _mm_add_epi16(_mm_srai_epi16(R[0],1),_mm_srai_epi16(R[1],1));
R[0] = _mm_add_epi16(_mm_srai_epi16(R[0],1),_mm_srai_epi16(R[2],1));
// R[0] = _mm_add_epi16(_mm_srai_epi16(R[0],1),_mm_srai_epi16(R[1],1));
// R[0] = _mm_add_epi16(_mm_srai_epi16(R[0],1),_mm_srai_epi16(R[2],1));
R[0] = _mm_add_epi16(R[0],_mm_add_epi16(R[1],R[2]));
Ravg[0] += (((short*)&R)[0] +
((short*)&R)[2] +
((short*)&R)[4] +
((short*)&R)[6])/(nb_rb*4);
// ((short*)&R)[6])/(nb_rb*4);
((short*)&R)[6])/(nb_rb*12);
Ravg[1] += (((short*)&R)[1] +
((short*)&R)[3] +
((short*)&R)[5] +
((short*)&R)[7])/(nb_rb*4);
// ((short*)&R)[7])/(nb_rb*4);
((short*)&R)[6])/(nb_rb*12);
ul_ch1+=3;
ul_ch2+=3;
......@@ -650,7 +656,7 @@ int16_t lte_ul_freq_offset_estimation(LTE_DL_FRAME_PARMS *frame_parms,
phase_idx = -phase_idx;
return(phase_idx);
#elif defined(__arm__)
#elif defined(__arm__)
return(0);
#endif
}
......@@ -168,7 +168,7 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
drs_offset = 0;
#ifdef DEBUG_DRS
printf("drs_modulation: l %d Msc_RS = %d, Msc_RS_idx = %d, u=%d,v=%d\n",l,Msc_RS, Msc_RS_idx,u,v);
LOG_I(PHY,"drs_modulation: l %d Msc_RS = %d, Msc_RS_idx = %d, u=%d,v=%d, cyclic shift %d\n",l,Msc_RS, Msc_RS_idx,u,v,cyclic_shift);
#endif
......@@ -177,9 +177,6 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
symbol_offset = subframe_offset + frame_parms->ofdm_symbol_size*l;
#ifdef DEBUG_DRS
printf("generate_drs_pusch: symbol_offset %d, subframe offset %d, cyclic shift %d\n",symbol_offset,subframe_offset,cyclic_shift);
#endif
alpha_ind = 0;
for (rb=0; rb<frame_parms->N_RB_UL; rb++) {
......
......@@ -50,16 +50,23 @@ int initial_syncSL(PHY_VARS_UE *ue) {
&index,
&psslevel,
&avglevel);
printf("index %d, psslevel %lld dB avglevel %lld dB => %d sample offset\n",
index,dB_fixed(psslevel),dB_fixed(avglevel),ue->rx_offsetSL);
printf("index %d, psslevel %d dB avglevel %d dB => %d sample offset\n",
index,dB_fixed64((uint64_t)psslevel),dB_fixed64((uint64_t)avglevel),ue->rx_offsetSL);
if (ue->rx_offsetSL >= 0) {
int32_t sss_metric;
int32_t phase_max;
rx_slsss(ue,&sss_metric,&phase_max,index);
generate_sl_grouphop(ue);
if (rx_psbch(ue) == -1) {
ue->slbch_errors++;
LOG_I(PHY,"PBCH not decoded\n");
/*
write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata_syncSL[0][0],40*ue->frame_parms.samples_per_tti,1,1);
write_output("corr0.m","rxsync0",sync_corr_ue0,40*ue->frame_parms.samples_per_tti,1,6);
write_output("corr1.m","rxsync1",sync_corr_ue1,40*ue->frame_parms.samples_per_tti,1,6);
exit(-1); */
return(-1);
}
else {
......@@ -71,7 +78,7 @@ int initial_syncSL(PHY_VARS_UE *ue) {
0, // eNB_index
NULL, // pdu, NULL for MIB-SL
0, // len, 0 for MIB-SL
&ue->slss_rx,
ue->slss_rx.slmib,
&frame,
&subframe);
......@@ -80,7 +87,8 @@ int initial_syncSL(PHY_VARS_UE *ue) {
}
}
else {
write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][ue->frame_parms.samples_per_tti*subframe],ue->frame_parms.samples_per_tti,1,1);
/*write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][ue->frame_parms.samples_per_tti*subframe],ue->frame_parms.samples_per_tti,1,1);
exit(-1);
*/
}
}
......@@ -42,6 +42,8 @@
#define PSBCH_A 40
#define PSBCH_E 1008 //12REs/PRB*6PRBs*7symbols*2 bits/RB
//#define PSBCH_DEBUG 1
......@@ -147,9 +149,11 @@ int rx_psbch(PHY_VARS_UE *ue) {
ru_tmp.N_TA_offset=0;
ru_tmp.common.rxdata_7_5kHz = (int32_t**)malloc16(ue->frame_parms.nb_antennas_rx*sizeof(int32_t*));
for (int aa=0;aa<ue->frame_parms.nb_antennas_rx;aa++)
ru_tmp.common.rxdata_7_5kHz[aa] = (int32_t*)&ue->common_vars.rxdata_syncSL[aa][ue->rx_offsetSL*2];
ru_tmp.common.rxdata_7_5kHz[aa] = ue->sl_rxdata_7_5kHz[aa];//(int32_t*)&ue->common_vars.rxdata_syncSL[aa][ue->rx_offsetSL*2];
ru_tmp.common.rxdataF = (int32_t**)rxdataF;
ru_tmp.nb_rx = ue->frame_parms.nb_antennas_rx;
LOG_I(PHY,"Running PBCH detection with Nid_SL %d\n",ue->frame_parms.Nid_SL);
for (int l=0; l<11; l++) {
slot_fep_ul(&ru_tmp,l%7,(l>6)?1:0,0);
......@@ -163,11 +167,13 @@ int rx_psbch(PHY_VARS_UE *ue) {
if (l==0) l+=2;
}
#ifdef PSBCH_DEBUG
if (ue->frame_parms.Nid_SL==170) {
write_output("slbch_rxF.m",
"slbchrxF",
&rxdataF[0][0],
14*ue->frame_parms.ofdm_symbol_size,1,1);
write_output("slbch_rxF_ext.m","slbchrxF_ext",rxdataF_ext[0],14*12*ue->frame_parms.N_RB_DL,1,1);
}
#endif
lte_ul_channel_estimation(&ue->frame_parms,
......@@ -181,7 +187,7 @@ int rx_psbch(PHY_VARS_UE *ue) {
0, //v
(ue->frame_parms.Nid_SL>>1)&7, //cyclic_shift
3,
1, // interpolation
0, // interpolation
0);
lte_ul_channel_estimation(&ue->frame_parms,
......@@ -195,7 +201,7 @@ int rx_psbch(PHY_VARS_UE *ue) {
0,//v
(ue->frame_parms.Nid_SL>>1)&7,//cyclic_shift,
10,
1, // interpolation
0, // interpolation
0);
ulsch_channel_level(drs_ch_estimates,
......@@ -204,7 +210,7 @@ int rx_psbch(PHY_VARS_UE *ue) {
2);
#ifdef PSBCH_DEBUG
write_output("drsbch_ext0.m","drsbchest0",drs_ch_estimates[0],ue->frame_parms.N_RB_UL*12*14,1,1);
if (ue->frame_parms.Nid_SL == 170) write_output("drsbch_est0.m","drsbchest0",drs_ch_estimates[0],ue->frame_parms.N_RB_UL*12*14,1,1);
#endif
avgs = 0;
......@@ -256,7 +262,7 @@ int rx_psbch(PHY_VARS_UE *ue) {
72);
#ifdef PSBCH_DEBUG
write_output("slbch_rxF_comp.m","slbchrxF_comp",rxdataF_comp[0],ue->frame_parms.N_RB_UL*12*14,1,1);
if (ue->frame_parms.Nid_SL == 170) write_output("slbch_rxF_comp.m","slbchrxF_comp",rxdataF_comp[0],ue->frame_parms.N_RB_UL*12*14,1,1);
#endif
int8_t llr[PSBCH_E];
int8_t *llrp = llr;
......@@ -275,7 +281,7 @@ int rx_psbch(PHY_VARS_UE *ue) {
1);
#ifdef PSBCH_DEBUG
write_output("slbch_llr.m","slbch_llr",llr,PSBCH_E,1,4);
if (ue->frame_parms.Nid_SL == 170) write_output("slbch_llr.m","slbch_llr",llr,PSBCH_E,1,4);
#endif
uint8_t slbch_a[2+(PSBCH_A>>3)];
......
......@@ -55,6 +55,11 @@ void check_and_generate_slss(PHY_VARS_UE *ue,int frame_tx,int subframe_tx) {
// here we have a transmission opportunity for SLSS
ue->frame_parms.Nid_SL = slss->slss_id;
if (ue->SLghinitialized ==0) {
generate_sl_grouphop(ue);
ue->SLghinitialized=1;
}
// 6 PRBs => ceil(10*log10(6)) = 8
ue->tx_power_dBm[subframe_tx] = -6;
ue->tx_total_RE[subframe_tx] = 72;
......@@ -84,20 +89,20 @@ void check_and_generate_slss(PHY_VARS_UE *ue,int frame_tx,int subframe_tx) {
1,
subframe_tx
);
generate_slpss(ue->common_vars.txdataF,
tx_amp<<1,
&ue->frame_parms,
2,
subframe_tx
);
);
generate_slbch(ue->common_vars.txdataF,
tx_amp,
&ue->frame_parms,
subframe_tx,
ue->slss->slmib);
generate_slsss(ue->common_vars.txdataF,
subframe_tx,
......
......@@ -96,12 +96,14 @@ int slpss_ch_est(PHY_VARS_UE *ue,
int32_t sss0_ext[4][72],
int32_t pss1_ext[4][72],
int32_t sss1_ext[4][72],
int64_t sss0_comp[72],
int64_t sss1_comp[72],
int Nid2)
{
int16_t *pss;
int16_t *pss0_ext2,*sss0_ext2,*sss0_ext3,*sss1_ext3,tmp_re,tmp_im,tmp0_re2,tmp0_im2,tmp1_re2,tmp1_im2;
int16_t *pss0_ext2,*sss0_ext2,tmp0_re,tmp0_im,tmp1_re,tmp1_im;
int32_t *sss0comp,*sss1comp,tmp0_re2,tmp0_im2,tmp1_re2,tmp1_im2;
int16_t *pss1_ext2,*sss1_ext2;
uint8_t aarx,i;
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
......@@ -121,8 +123,8 @@ int slpss_ch_est(PHY_VARS_UE *ue,
break;
}
sss0_ext3 = (int16_t*)&sss0_ext[0][5];
sss1_ext3 = (int16_t*)&sss1_ext[0][5];
sss0comp = (int32_t*)&sss0_comp[5];
sss1comp = (int32_t*)&sss1_comp[5];
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
......@@ -134,33 +136,38 @@ int slpss_ch_est(PHY_VARS_UE *ue,
for (i=0; i<62; i++) {
// This is H*(PSS) = R* \cdot PSS
tmp_re = (int16_t)((((pss0_ext2[i<<1]+pss1_ext2[i<<1]) * (int32_t)pss[i<<1])>>15) + (((pss0_ext2[1+(i<<1)]+pss1_ext2[1+(i<<1)]) * (int32_t)pss[1+(i<<1)])>>15));
tmp_im = (int16_t)((((pss0_ext2[i<<1]+pss1_ext2[i<<1]) * (int32_t)pss[1+(i<<1)])>>15) - (((pss0_ext2[1+(i<<1)]+pss1_ext2[1+(i<<1)]) * (int32_t)pss[(i<<1)])>>15));
// printf("H*(%d,%d) : (%d,%d)\n",aarx,i,tmp_re,tmp_im);
tmp0_re = (int16_t)((((pss0_ext2[i<<1]) * (int32_t)pss[i<<1])>>15) + (((pss0_ext2[1+(i<<1)]) * (int32_t)pss[1+(i<<1)])>>15));
tmp0_im = (int16_t)((((pss0_ext2[i<<1]) * (int32_t)pss[1+(i<<1)])>>15) - (((pss0_ext2[1+(i<<1)]) * (int32_t)pss[(i<<1)])>>15));
tmp1_re = (int16_t)((((pss1_ext2[i<<1]) * (int32_t)pss[i<<1])>>15) + (((pss1_ext2[1+(i<<1)]) * (int32_t)pss[1+(i<<1)])>>15));
tmp1_im = (int16_t)((((pss1_ext2[i<<1]) * (int32_t)pss[1+(i<<1)])>>15) - (((pss1_ext2[1+(i<<1)]) * (int32_t)pss[(i<<1)])>>15));
//printf("H*(%d,%d) : (%d,%d)\n",aarx,i,tmp0_re,tmp0_im);
// This is R(SSS0) \cdot H*(PSS)
tmp0_re2 = (int16_t)(((tmp_re * (int32_t)sss0_ext2[i<<1])>>15) -
((tmp_im * (int32_t)sss0_ext2[1+(i<<1)])>>15));
tmp0_im2 = (int16_t)(((tmp_re * (int32_t)sss0_ext2[1+(i<<1)])>>15) +
((tmp_im * (int32_t)sss0_ext2[(i<<1)])>>15));
tmp0_re2 = (tmp0_re * (int32_t)sss0_ext2[i<<1]) -
(tmp0_im * (int32_t)sss0_ext2[1+(i<<1)]);
tmp0_im2 = (tmp0_re * (int32_t)sss0_ext2[1+(i<<1)]) +
(tmp0_im * (int32_t)sss0_ext2[(i<<1)]);
// This is R(SSS1) \cdot H*(PSS)
tmp1_re2 = (int16_t)(((tmp_re * (int32_t)sss1_ext2[i<<1])>>15) -
((tmp_im * (int32_t)sss1_ext2[1+(i<<1)])>>15));
tmp1_im2 = (int16_t)(((tmp_re * (int32_t)sss1_ext2[1+(i<<1)])>>15) +
((tmp_im * (int32_t)sss1_ext2[(i<<1)])>>15));
tmp1_re2 = (tmp1_re * (int32_t)sss1_ext2[i<<1]) -
(tmp1_im * (int32_t)sss1_ext2[1+(i<<1)]);
tmp1_im2 = (tmp1_re * (int32_t)sss1_ext2[1+(i<<1)]) +
(tmp1_im * (int32_t)sss1_ext2[(i<<1)]);
// printf("SSSi(%d,%d) : (%d,%d)\n",aarx,i,sss_ext2[i<<1],sss_ext2[1+(i<<1)]);
// printf("SSSo(%d,%d) : (%d,%d)\n",aarx,i,tmp_re2,tmp_im2);
//printf("SSScomp0(%d,%d) : (%d,%d)\n",aarx,i,tmp0_re2,tmp0_im2);
//printf("SSScomp1(%d,%d) : (%d,%d)\n",aarx,i,tmp1_re2,tmp1_im2);
// MRC on RX antennas
if (aarx==0) {
sss0_ext3[i<<1] = tmp0_re2;
sss0_ext3[1+(i<<1)] = tmp0_im2;
sss1_ext3[i<<1] = tmp1_re2;
sss1_ext3[1+(i<<1)] = tmp1_im2;
sss0comp[i<<1] = tmp0_re2;
sss0comp[1+(i<<1)] = tmp0_im2;
sss1comp[i<<1] = tmp1_re2;
sss1comp[1+(i<<1)] = tmp1_im2;
} else {
sss0_ext3[i<<1] += tmp0_re2;
sss0_ext3[1+(i<<1)] += tmp0_im2;
sss1_ext3[i<<1] += tmp1_re2;
sss1_ext3[1+(i<<1)] += tmp1_im2;
sss0comp[i<<1] += tmp0_re2;
sss0comp[1+(i<<1)] += tmp0_im2;
sss1comp[i<<1] += tmp1_re2;
sss1comp[1+(i<<1)] += tmp1_im2;
}
}
}
......@@ -204,7 +211,8 @@ int _do_slpss_sss_extract(PHY_VARS_UE *ue,
pss1_symb = 2;
sss0_symb = 11;
sss1_symb = 12;
rxdataF = ue->sl_rxdataF;
rxdataF = (int32_t**)ue->sl_rxdataF;
pss0_rxF = &rxdataF[aarx][(rx_offset + (pss0_symb*(frame_parms->ofdm_symbol_size)))];
sss0_rxF = &rxdataF[aarx][(rx_offset + (sss0_symb*(frame_parms->ofdm_symbol_size)))];
pss1_rxF = &rxdataF[aarx][(rx_offset + (pss1_symb*(frame_parms->ofdm_symbol_size)))];
......@@ -289,6 +297,9 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
uint8_t i;
int32_t pss0_ext[4][72],pss1_ext[4][72];
int32_t sss0_ext[4][72],sss1_ext[4][72];
int64_t sss0_comp[72],sss1_comp[72];
int16_t sss0_comp16[144],sss1_comp16[144];
uint8_t phase;
uint16_t Nid1;
int16_t *sss0,*sss1;
......@@ -316,12 +327,17 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
memcpy((void*)&ru_tmp.frame_parms,(void*)&ue->frame_parms,sizeof(LTE_DL_FRAME_PARMS));
ru_tmp.N_TA_offset=0;
ru_tmp.common.rxdata_7_5kHz = (int32_t**)malloc16(ue->frame_parms.nb_antennas_rx*sizeof(int32_t*));
for (int aa=0;aa<ue->frame_parms.nb_antennas_rx;aa++)
ru_tmp.common.rxdata_7_5kHz[aa] = (int32_t*)&ue->common_vars.rxdata_syncSL[aa][ue->rx_offsetSL*2];
ru_tmp.common.rxdata = (int32_t**)malloc16(ue->frame_parms.nb_antennas_rx*sizeof(int32_t*));
for (int aa=0;aa<ue->frame_parms.nb_antennas_rx;aa++) {
ru_tmp.common.rxdata_7_5kHz[aa] = (int32_t*)ue->sl_rxdata_7_5kHz[aa];
ru_tmp.common.rxdata[aa] = (int32_t*)&ue->common_vars.rxdata_syncSL[aa][2*ue->rx_offsetSL];
}
ru_tmp.common.rxdataF = (int32_t**)rxdataF;
ru_tmp.nb_rx = ue->frame_parms.nb_antennas_rx;
remove_7_5_kHz(&ru_tmp,0);
remove_7_5_kHz(&ru_tmp,1);
// PSS
slot_fep_ul(&ru_tmp,1,0,0);
slot_fep_ul(&ru_tmp,2,0,0);
......@@ -330,6 +346,7 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
slot_fep_ul(&ru_tmp,5,1,0);
free(ru_tmp.common.rxdata_7_5kHz);
free(ru_tmp.common.rxdata);
} else { // TDD
AssertFatal(1==0,"TDD not supported for Sidelink\n");
}
......@@ -342,8 +359,12 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
0);
// write_output("rxdataF0.m","rxF0",&rxdataF[0][0],2*14*ue->frame_parms.ofdm_symbol_size,1,1);
// write_output("pss0_ext.m","pss0ext",pss0_ext,72,1,1);
// write_output("sss0_ext.m","sss0ext",sss0_ext,72,1,1);
/* write_output("pss0_ext.m","pss0ext",pss0_ext,72,1,1);
write_output("sss0_ext.m","sss0ext",sss0_ext,72,1,1);
write_output("pss1_ext.m","pss1ext",pss1_ext,72,1,1);
write_output("sss1_ext.m","sss1ext",sss1_ext,72,1,1); */
// exit(-1);
......@@ -355,17 +376,41 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
sss0_ext,
pss1_ext,
sss1_ext,
sss0_comp,
sss1_comp,
Nid2);
// write_output("sss0_comp0.m","sss0comp0",sss0_ext,72,1,1);
// exit(-1);
// rescale from 64 to 16 bit resolution keeping 8 bits of dynamic range
uint32_t maxval=0;
int32_t *sss0comp=(int32_t*)sss0_comp,*sss1comp=(int32_t*)sss1_comp;
for (i=10;i<134;i++) {
if (sss0comp[i] >=0) maxval=(uint64_t)max(maxval,sss0comp[i]);
else maxval=(uint64_t)max(maxval,-sss0comp[i]);
if (sss1comp[i] >=0) maxval=(uint64_t)max(maxval,sss1comp[i]);
else maxval=(uint64_t)max(maxval,-sss1comp[i]);
}
uint8_t log2maxval = log2_approx64(maxval);
uint8_t shift;
if (log2maxval < 8) shift = 0; else shift = log2maxval-8;
for (i=0;i<144;i++) {
sss0_comp16[i] = (int16_t)(sss0comp[i]>>shift);
sss1_comp16[i] = (int16_t)(sss1comp[i]>>shift);
}
/*
write_output("sss0_comp0.m","sss0comp0",sss0_comp16,72,1,1);
write_output("sss1_comp0.m","sss1comp0",sss1_comp16,72,1,1);
exit(-1); */
// now do the SSS detection based on the precomputed sequences in PHY/LTE_TRANSPORT/sss.h
*tot_metric = -99999999;
sss0 = (int16_t*)&sss0_ext[0][5];
sss1 = (int16_t*)&sss1_ext[0][5];
sss0 = &sss0_comp16[10];
sss1 = &sss1_comp16[10];
for (phase=0; phase<7; phase++) { // phase offset between PSS and SSS
......@@ -377,8 +422,8 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
// This is the inner product using one particular value of each unknown parameter
for (i=0; i<62; i++) {
metric +=
(int16_t)(((d0[i]*((((phaseSL_re[phase]*(int32_t)sss0[i<<1])>>19)-((phaseSL_im[phase]*(int32_t)sss0[1+(i<<1)])>>19)))))) +
(int16_t)(((d5[i]*((((phaseSL_re[phase]*(int32_t)sss1[i<<1])>>19)-((phaseSL_im[phase]*(int32_t)sss1[1+(i<<1)])>>19))))));
(int16_t)(((d0[i]*((((phaseSL_re[phase]*(int32_t)sss0[i<<1])>>15)-((phaseSL_im[phase]*(int32_t)sss0[1+(i<<1)])>>15)))))) +
(int16_t)(((d5[i]*((((phaseSL_re[phase]*(int32_t)sss1[i<<1])>>15)-((phaseSL_im[phase]*(int32_t)sss1[1+(i<<1)])>>15))))));
}
// if the current metric is better than the last save it
......
......@@ -21,7 +21,7 @@
#include "defs.h"
#include "PHY/sse_intrin.h"
#include <stdio.h>
// returns the complex dot product of x and y
#ifdef MAIN
......@@ -30,7 +30,7 @@ void print_shorts(char *s,__m128i *x);
void print_bytes(char *s,__m128i *x);
#endif
int32_t dot_product(int16_t *x,
int64_t dot_product(int16_t *x,
int16_t *y,
uint32_t N, //must be a multiple of 8
uint8_t output_shift)
......@@ -40,7 +40,6 @@ int32_t dot_product(int16_t *x,
#if defined(__x86_64__) || defined(__i386__)
__m128i *x128,*y128,mmtmp1,mmtmp2,mmtmp3,mmcumul,mmcumul_re,mmcumul_im;
__m64 mmtmp7;
__m128i minus_i = _mm_set_epi16(-1,1,-1,1,-1,1,-1,1);
int32_t result;
......@@ -52,37 +51,37 @@ int32_t dot_product(int16_t *x,
for (n=0; n<(N>>2); n++) {
//printf("n=%d, x128=%p, y128=%p\n",n,x128,y128);
// print_shorts("x",&x128[0]);
// printf("n=%d, x128=%p, y128=%p\n",n,x128,y128);
// print_shorts("x",&x128[0]);
// print_shorts("y",&y128[0]);
// this computes Re(z) = Re(x)*Re(y) + Im(x)*Im(y)
mmtmp1 = _mm_madd_epi16(x128[0],y128[0]);
// print_ints("re",&mmtmp1);
// print_ints("retmp",&mmtmp1);
// mmtmp1 contains real part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp1 = _mm_srai_epi32(mmtmp1,output_shift);
mmcumul_re = _mm_add_epi32(mmcumul_re,mmtmp1);
// print_ints("re",&mmcumul_re);
//print_ints("re",&mmcumul_re);
// this computes Im(z) = Re(x)*Im(y) - Re(y)*Im(x)
mmtmp2 = _mm_shufflelo_epi16(y128[0],_MM_SHUFFLE(2,3,0,1));
// print_shorts("y",&mmtmp2);
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_shufflehi_epi16(mmtmp2,_MM_SHUFFLE(2,3,0,1));
// print_shorts("y",&mmtmp2);
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_sign_epi16(mmtmp2,minus_i);
// print_shorts("y",&mmtmp2);
// print_shorts("y",&mmtmp2);
mmtmp3 = _mm_madd_epi16(x128[0],mmtmp2);
// print_ints("im",&mmtmp3);
//print_ints("imtmp",&mmtmp3);
// mmtmp3 contains imag part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp3 = _mm_srai_epi32(mmtmp3,output_shift);
mmcumul_im = _mm_add_epi32(mmcumul_im,mmtmp3);
// print_ints("im",&mmcumul_im);
//print_ints("im",&mmcumul_im);
x128++;
y128++;
......@@ -90,24 +89,18 @@ int32_t dot_product(int16_t *x,
// this gives Re Re Im Im
mmcumul = _mm_hadd_epi32(mmcumul_re,mmcumul_im);
// print_ints("cumul1",&mmcumul);
//print_ints("cumul1",&mmcumul);
// this gives Re Im Re Im
mmcumul = _mm_hadd_epi32(mmcumul,mmcumul);
// print_ints("cumul2",&mmcumul);
//print_ints("cumul2",&mmcumul);
//mmcumul = _mm_srai_epi32(mmcumul,output_shift);
// extract the lower half
mmtmp7 = _mm_movepi64_pi64(mmcumul);
// print_ints("mmtmp7",&mmtmp7);
// pack the result
mmtmp7 = _mm_packs_pi32(mmtmp7,mmtmp7);
// print_shorts("mmtmp7",&mmtmp7);
// convert back to integer
result = _mm_cvtsi64_si32(mmtmp7);
result = _mm_extract_epi64(mmcumul,0);
//printf("result: (%d,%d)\n",((int32_t*)&result)[0],((int32_t*)&result)[1]);
_mm_empty();
_m_empty();
......
......@@ -23,7 +23,7 @@
// Approximate 10*log10(x) in fixed point : x = 0...(2^32)-1
int8_t dB_table[256] = {
uint8_t dB_table[256] = {
0,
3,
5,
......@@ -282,7 +282,7 @@ int8_t dB_table[256] = {
24
};
int16_t dB_table_times10[256] = {
uint16_t dB_table_times10[256] = {
0,
30,
47,
......@@ -571,9 +571,9 @@ int8_t dB_fixed(int x) {
}
*/
int16_t dB_fixed_times10(uint32_t x)
uint16_t dB_fixed_times10(uint32_t x)
{
int16_t dB_power=0;
uint8_t dB_power=0;
if (x==0) {
......@@ -597,10 +597,17 @@ int16_t dB_fixed_times10(uint32_t x)
return dB_power;
}
int8_t dB_fixed(uint32_t x)
uint8_t dB_fixed64(uint64_t x)
{
int8_t dB_power=0;
if (x<(((uint64_t)1)<<32)) return(dB_fixed((uint32_t)x));
else return(4*dB_table[255] + dB_fixed(x>>32));
}
uint8_t dB_fixed(uint32_t x)
{
uint8_t dB_power=0;
if (x==0) {
......@@ -624,7 +631,7 @@ int8_t dB_fixed(uint32_t x)
return dB_power;
}
int8_t dB_fixed2(uint32_t x, uint32_t y)
uint8_t dB_fixed2(uint32_t x, uint32_t y)
{
if ((x>0) && (y>0) )
......
......@@ -29,6 +29,6 @@
#ifndef DB_ROUTINES_H_
#define DB_ROUTINES_H_
int16_t dB_fixed_times10(uint32_t x);
uint16_t dB_fixed_times10(uint32_t x);
#endif /* DB_ROUTINES_H_ */
......@@ -347,16 +347,18 @@ Compensate the phase rotation of the RF. WARNING: This function is currently unu
*/
int8_t dB_fixed(uint32_t x);
uint8_t dB_fixed(uint32_t x);
int8_t dB_fixed2(uint32_t x,uint32_t y);
uint8_t dB_fixed2(uint32_t x,uint32_t y);
int16_t dB_fixed_times10(uint32_t x);
uint8_t dB_fixed64(uint64_t x);
uint16_t dB_fixed_times10(uint32_t x);
int32_t phy_phase_compensation_top (uint32_t pilot_type, uint32_t initial_pilot,
uint32_t last_pilot, int32_t ignore_prefix);
int32_t dot_product(int16_t *x,
int64_t dot_product(int16_t *x,
int16_t *y,
uint32_t N, //must be a multiple of 8
uint8_t output_shift);
......
......@@ -1415,6 +1415,7 @@ typedef struct {
uint8_t destination_id;
// DMRS group-hopping sequences for PSBCH (index 0) and 256 possible PSSCH (indices 1...256)
uint32_t gh[257][20];
uint8_t SLghinitialized;
uint8_t slss_generated;
uint8_t pscch_coded;
uint8_t pscch_generated;
......
......@@ -60,14 +60,17 @@ extern short primary_synch1SL[144];
extern unsigned char primary_synch0_tab[72];
extern unsigned char primary_synch1_tab[72];
extern unsigned char primary_synch2_tab[72];
extern const int16_t *primary_synch0_time; //!< index: [0..ofdm_symbol_size*2[
extern const int16_t *primary_synch1_time; //!< index: [0..ofdm_symbol_size*2[
extern const int16_t *primary_synch2_time; //!< index: [0..ofdm_symbol_size*2[
extern const int16_t *primary_synch0SL_time;
extern const int16_t *primary_synch1SL_time;
extern int *sync_corr_ue0; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue1; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue2; //!< index [0..10*samples_per_tti[
extern int16_t *primary_synch0_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch1_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch2_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch0SL_time;
extern int16_t *primary_synch1SL_time;
extern int16_t *primary_synch0SL_time_rx;
extern int16_t *primary_synch1SL_time_rx;
extern int64_t *sync_corr_ue0; //!< index [0..10*samples_per_tti[
extern int64_t *sync_corr_ue1; //!< index [0..10*samples_per_tti[
extern int64_t *sync_corr_ue2; //!< index [0..10*samples_per_tti[
extern int flagMag;
//extern short **txdataF_rep_tmp;
......
......@@ -33,13 +33,15 @@ char* namepointer_log2;
#include "PHY/LTE_REFSIG/primary_synch.h"
#include "PHY/LTE_REFSIG/primary_synch_SL.h"
const int16_t *primary_synch0_time;
const int16_t *primary_synch1_time;
const int16_t *primary_synch2_time;
int16_t *primary_synch0_time;
int16_t *primary_synch1_time;
int16_t *primary_synch2_time;
const int16_t *primary_synch0SL_time;
const int16_t *primary_synch1SL_time;
int16_t *primary_synch0SL_time;
int16_t *primary_synch1SL_time;
int16_t *primary_synch0SL_time_rx;
int16_t *primary_synch1SL_time_rx;
#include "PHY/CODING/vars.h"
......
......@@ -1227,7 +1227,7 @@ void ulsch_common_procedures(PHY_VARS_UE *ue, int frame_tx, int subframe_tx, uin
//LOG_E(PHY,"ul-signal [subframe: %d, ulsch_start %d]\n",subframe_tx, ulsch_start);
#else //this is the normal case
ulsch_start = (frame_parms->samples_per_tti*subframe_tx)-ue->N_TA_offset; //-ue->timing_advance;
ulsch_start = ue->rx_offset+(frame_parms->samples_per_tti*subframe_tx)-ue->N_TA_offset; //-ue->timing_advance;
#endif //else EXMIMO
......
......@@ -65,6 +65,7 @@ int main(int argc, char **argv) {
channel_desc_t *UE2UE[2][2][2];
PHY_VARS_UE *UE;
int log_level = LOG_INFO;
int tx_offset=0;
SLSCH_t slsch;
SLDCH_t sldch;
SLSS_t slss;
......@@ -94,7 +95,7 @@ int main(int argc, char **argv) {
char c;
while ((c = getopt (argc, argv, "hf:m:n:g:r:z:w:s:S")) != -1) {
while ((c = getopt (argc, argv, "hf:m:n:g:r:z:w:s:S:")) != -1) {
switch (c) {
case 'f':
snr_step= atof(optarg);
......@@ -189,6 +190,8 @@ int main(int argc, char **argv) {
break;
case 'S':
do_SLSS=1;
tx_offset=atoi(optarg);
printf("Running TX/RX synchornization signals with timing offset %d\n",tx_offset);
break;
case 'h':
......@@ -354,14 +357,15 @@ int main(int argc, char **argv) {
UE->slss_generated=0;
frame = absSF/10;
subframe= absSF%10;
check_and_generate_psdch(UE,frame,subframe);
UE->slsch_active = 1;
check_and_generate_pscch(UE,frame,subframe);
proc.subframe_tx = subframe;
proc.frame_tx = frame;
check_and_generate_pssch(UE,&proc,frame,subframe);
check_and_generate_slss(UE,frame,subframe);
if (do_SLSS==0) {
check_and_generate_psdch(UE,frame,subframe);
UE->slsch_active = 1;
check_and_generate_pscch(UE,frame,subframe);
proc.subframe_tx = subframe;
proc.frame_tx = frame;
check_and_generate_pssch(UE,&proc,frame,subframe);
}
check_and_generate_slss(UE,frame,subframe);
if (UE->psdch_generated>0 || UE->pscch_generated > 0 || UE->pssch_generated > 0 || UE->slss_generated > 0) {
AssertFatal(UE->pscch_generated<3,"Illegal pscch_generated %d\n",UE->pscch_generated);
// FEP
......@@ -373,7 +377,7 @@ int main(int argc, char **argv) {
&UE->frame_parms,frame,0);
// write_output("rxsig0.m","rxs0",&UE->common_vars.rxdata[0][UE->frame_parms.samples_per_tti*subframe],UE->frame_parms.samples_per_tti,1,1);
if (do_SLSS==1)
memcpy((void*)&UE->common_vars.rxdata_syncSL[0][(((frame&3)*10)+subframe)*2*UE->frame_parms.samples_per_tti],
memcpy((void*)&UE->common_vars.rxdata_syncSL[0][2*tx_offset+(((frame&3)*10)+subframe)*2*UE->frame_parms.samples_per_tti],
(void*)&UE->common_vars.rxdata[0][subframe*UE->frame_parms.samples_per_tti],
2*UE->frame_parms.samples_per_tti*sizeof(int16_t));
// write_output("rxsyncb0.m","rxsyncb0",(void*)UE->common_vars.rxdata_syncSL[0],(UE->frame_parms.samples_per_tti),1,1);
......
......@@ -646,7 +646,7 @@ rrc_mac_config_req_ue(module_id_t Mod_idP,
UE_mac_inst[Mod_idP].slss.SL_OffsetIndicator = SL_Preconfiguration_r12->preconfigSync_r12.syncOffsetIndicator1_r12;
// Note: Other synch parameters are ignored for now
UE_mac_inst[Mod_idP].slss.slss_id = 168+(taus()%168);
UE_mac_inst[Mod_idP].slss.slss_id = 170;//+(taus()%168);
// PSCCH
struct SL_PreconfigCommPool_r12 *preconfigpool = SL_Preconfiguration_r12->preconfigComm_r12.list.array[0];
UE_mac_inst[Mod_idP].slsch.N_SL_RB_SC = preconfigpool->sc_TF_ResourceConfig_r12.prb_Num_r12;
......
......@@ -599,18 +599,22 @@ ue_decode_si(module_id_t module_idP, int CC_id, frame_t frameP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_DECODE_SI, VCD_FUNCTION_IN);
LOG_D(MAC, "[UE %d] Frame %d Sending SI to RRC (LCID Id %d,len %d)\n",
module_idP, frameP, BCCH, len);
if (slss == NULL) { // this is not MIB-SL
LOG_D(MAC, "[UE %d] Frame %d Sending SI to RRC (LCID Id %d,len %d)\n",
module_idP, frameP, BCCH, len);
mac_rrc_data_ind_ue(module_idP, CC_id, frameP, 0, // unknown subframe
SI_RNTI,
BCCH, (uint8_t *) pdu, len, eNB_index,
0);
}
else {
LOG_I(MAC, "[UE %d] Frame %d Sending MIBSL to RRC (LCID Id %d,len %d)\n",
module_idP, frameP, MIBSLCH, 5);
mac_rrc_data_ind_ue(module_idP, CC_id, frameP, 0, // unknown subframe
SI_RNTI,
MIBSLCH, (uint8_t *) pdu, len, eNB_index,
MIBSLCH, (uint8_t *) slss->slmib, 5, eNB_index,
0);
// copy frame/subframe
*frame = UE_mac_inst[module_idP].directFrameNumber_r12;
......
......@@ -6274,6 +6274,12 @@ int decode_MIB_SL( const protocol_ctxt_t* const ctxt_pP,
return -1;
}
LOG_I(RRC,"Decoded MIBSL SFN.SF %d.%d, sl_Bandwidth_r12 %d, InCoverage %d\n",
BIT_STRING_to_uint32(&UE_rrc_inst[ctxt_pP->module_id].SL_mib[0]->message.directFrameNumber_r12), // indicates that there is no update in the frame number
UE_rrc_inst[ctxt_pP->module_id].SL_mib[0]->message.directSubframeNumber_r12, // /indicates that there isno update in the subframe number
&UE_rrc_inst[ctxt_pP->module_id].SL_mib[0]->message.sl_Bandwidth_r12,
UE_rrc_inst[ctxt_pP->module_id].SL_mib[0]->message.inCoverage_r12);
rrc_mac_config_req_ue(ctxt_pP->module_id, 0, 0,
(RadioResourceConfigCommonSIB_t *)NULL,
(struct PhysicalConfigDedicated *)NULL,
......
......@@ -1066,7 +1066,6 @@ extern "C" {
}
else{
s->usrp->set_clock_source("external");
s->usrp->set_time_source("external");
}
device->type = USRP_B200_DEV;
......
......@@ -635,6 +635,8 @@ static void *UE_thread_synch(void *arg)
return &UE_thread_synch_retval;
}
extern int64_t* sync_corr_ue1;
static void *UE_thread_synchSL(void *arg)
{
static int UE_thread_synch_retval;
......@@ -702,14 +704,62 @@ static void *UE_thread_synchSL(void *arg)
// the thread waits here most of the time
pthread_cond_wait( &UE->proc.cond_synchSL, &UE->proc.mutex_synchSL );
AssertFatal ( 0== pthread_mutex_unlock(&UE->proc.mutex_synchSL), "");
LOG_I(PHY,"Running initial synch with carrier offset %d, ue_scan_carrier %d\n",freq_offset,UE->UE_scan_carrier);
// Do initial synch here
if (initial_syncSL(UE) >= 0) LOG_I(PHY,"Found SynchRef UE\n");
if (initial_syncSL(UE) >= 0) {
LOG_I(PHY,"Found SynchRef UE\n");
// rerun with new cell parameters and frequency-offset
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
openair0_cfg[UE->rf_map.card].rx_gain[UE->rf_map.chain+i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
if (UE->UE_scan_carrier == 1) {
if (freq_offset >= 0)
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] += abs(UE->common_vars.freq_offset);
else
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] -= abs(UE->common_vars.freq_offset);
freq_offset=0;
}
}
UE->rfdevice.trx_set_freq_func(&UE->rfdevice,&openair0_cfg[0],0);
//UE->rfdevice.trx_set_gains_func(&openair0,&openair0_cfg[0]);
//UE->rfdevice.trx_stop_func(&UE->rfdevice);
sleep(1);
if (UE->UE_scan_carrier == 1) {
UE->UE_scan_carrier = 0;
} else {
AssertFatal ( 0== pthread_mutex_lock(&UE->proc.mutex_synch), "");
UE->is_synchronizedSL = 1;
AssertFatal ( 0== pthread_mutex_unlock(&UE->proc.mutex_synch), "");
}
}
else {
LOG_I(PHY,"No SynchRefUE found\n");
LOG_I(PHY,"No SynchRefUE found\n");
/*
write_output("rxsig0.m","rxs0",&UE->common_vars.rxdata_syncSL[0][0],40*UE->frame_parms.samples_per_tti,1,1);
write_output("corr.m","corr1",sync_corr_ue1,40*UE->frame_parms.samples_per_tti,1,2);
exit(-1);
}
*/
if (UE->UE_scan_carrier == 1) {
if (freq_offset>=0)
freq_offset+=100;
freq_offset*=-1;
if (abs(freq_offset) > 7500)
AssertFatal(1==0, "[initial_sync] No cell synchronization found, abandoning\n" );
}
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = (double)UE->frame_parms.ul_CarrierFreq+freq_offset;
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] = (double)UE->frame_parms.ul_CarrierFreq+freq_offset;
openair0_cfg[UE->rf_map.card].rx_gain[UE->rf_map.chain+i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
if (UE->UE_scan_carrier==1)
openair0_cfg[UE->rf_map.card].autocal[UE->rf_map.chain+i] = 1;
}
LOG_I(PHY,"Setting USRP freq to %f\n",openair0_cfg[UE->rf_map.card].rx_freq[0]);
UE->rfdevice.trx_set_freq_func(&UE->rfdevice,&openair0_cfg[0],0);
}
AssertFatal ( 0== pthread_mutex_lock(&UE->proc.mutex_synchSL), "");
UE->proc.instance_cnt_synchSL--;
UE->is_synchronizedSL = 0;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment