Commit 2ed8aa4c authored by Florian Kaltenberger's avatar Florian Kaltenberger

more changes to UE FAPI handling:

 - dci_request and dl_indication for PBCH now also on stack
 - fixed type of nrUE_config (was using structure for gNB before)
 - added configuration of PBCH to phy_config_request and using this config now in phy_procedures_nr_ue
 - we need to add configuration of PDCCH and PDSCH also to phy_config_request (there are still some hardcoded parameters)
 - removed UL scheduling for now
parent 6cb25d77
...@@ -350,39 +350,42 @@ static void UE_synch(void *arg) { ...@@ -350,39 +350,42 @@ static void UE_synch(void *arg) {
} }
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
// Process Rx data for one sub-frame // Process Rx data for one sub-frame
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) { if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
//clean previous FAPI MESSAGE //TODO: all of this has to be moved to the MAC!!!
UE->rx_ind.number_pdus = 0; dcireq.module_id = UE->Mod_id;
UE->dci_ind.number_of_dcis = 0; dcireq.gNB_index = 0;
//clean previous FAPI MESSAGE dcireq.cc_id = 0;
// call L2 for DL_CONFIG (DCI) dcireq.frame = proc->frame_rx;
UE->dcireq.module_id = UE->Mod_id; dcireq.slot = proc->nr_tti_rx;
UE->dcireq.gNB_index = 0; nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx; scheduled_response.dl_config = &dcireq.dl_config_req;
UE->dcireq.slot = proc->nr_tti_rx; scheduled_response.ul_config = NULL;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later scheduled_response.tx_request = NULL;
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0); scheduled_response.module_id = UE->Mod_id;
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req; scheduled_response.CC_id = 0;
UE_mac->scheduled_response.ul_config = NULL; scheduled_response.frame = proc->frame_rx;
UE_mac->scheduled_response.tx_request = NULL; scheduled_response.slot = proc->nr_tti_rx;
UE_mac->scheduled_response.module_id = UE->Mod_id; nr_ue_scheduled_response(&scheduled_response);
UE_mac->scheduled_response.CC_id = 0;
UE_mac->scheduled_response.frame = proc->frame_rx;
UE_mac->scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
//write_output("uerxdata_frame.m", "uerxdata_frame", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_frame, 1, 1);
#ifdef UE_SLOT_PARALLELISATION #ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL ); phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else #else
uint64_t a=rdtsc(); uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode, UE_mac->phy_config.config_req.pbch_config); phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500); LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n"); //printf(">>> nr_ue_pdcch_procedures ended\n");
#endif #endif
} }
// no UL for now
/*
if (UE->mac_enabled==1) { if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module // trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync // [TODO] mapping right after NR initial sync
...@@ -395,6 +398,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -395,6 +398,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE->if_inst->ul_indication(&UE->ul_indication); UE->if_inst->ul_indication(&UE->ul_indication);
} }
} }
*/
} }
/*! /*!
......
...@@ -237,9 +237,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -237,9 +237,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t Tbslbrm = 950984; uint32_t Tbslbrm = 950984;
uint16_t nb_rb = 30; uint16_t nb_rb = 30;
double Coderate = 0.0; double Coderate = 0.0;
nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config; //nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value; //uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4; uint8_t nb_re_dmrs = 6; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value; uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint32_t i,j; uint32_t i,j;
......
...@@ -594,19 +594,25 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -594,19 +594,25 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
} }
#endif #endif
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance nr_downlink_indication_t dl_indication;
ue->dl_indication.proc=proc; fapi_nr_rx_indication_t rx_ind;
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB; dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
ue->rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; dl_indication.dci_ind = NULL;
ue->rx_ind.rx_indication_body[0].mib_pdu.additional_bits = xtra_byte; dl_indication.proc=proc; // needed to signal back the frame number -> FIXME
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_index = i_ssb; // confirm with TCL dl_indication.module_id=proc->proc_id;
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL dl_indication.cc_id=proc->CC_id;
ue->rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->rx_ind.number_pdus = 1; rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0];
rx_ind.rx_indication_body[0].mib_pdu.additional_bits = xtra_byte;
rx_ind.rx_indication_body[0].mib_pdu.ssb_index = i_ssb; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
rx_ind.number_pdus = 1;
if (ue->if_inst && ue->if_inst->dl_indication) if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&ue->dl_indication); ue->if_inst->dl_indication(&dl_indication);
return 0; return 0;
} }
...@@ -918,18 +918,22 @@ typedef struct { ...@@ -918,18 +918,22 @@ typedef struct {
NR_UE_COMMON common_vars; NR_UE_COMMON common_vars;
nr_ue_if_module_t *if_inst; nr_ue_if_module_t *if_inst;
nfapi_nr_config_request_t nrUE_config;
nr_downlink_indication_t dl_indication; //nfapi_nr_config_request_t nrUE_config; <-- don't use config type for gNB!!!
nr_uplink_indication_t ul_indication; fapi_nr_config_request_t nrUE_config;
// the following structures are not part of PHY_vars_UE anymore as it is not thread safe. They are now on the stack of the functions that actually need them
//nr_downlink_indication_t dl_indication;
//nr_uplink_indication_t ul_indication;
/// UE FAPI DCI request /// UE FAPI DCI request
nr_dcireq_t dcireq; //nr_dcireq_t dcireq;
// pointers to the next 2 strcutres are also included in dl_indictation // pointers to the next 2 strcutres are also included in dl_indictation
/// UE FAPI indication for DLSCH reception /// UE FAPI indication for DLSCH reception
fapi_nr_rx_indication_t rx_ind; //fapi_nr_rx_indication_t rx_ind;
/// UE FAPI indication for DCI reception /// UE FAPI indication for DCI reception
fapi_nr_dci_indication_t dci_ind; //fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index // point to the current rxTx thread index
uint8_t current_thread_id[40]; uint8_t current_thread_id[40];
......
...@@ -123,7 +123,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e ...@@ -123,7 +123,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying @param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables @param phy_vars_rn pointer to RN variables
*/ */
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode,fapi_nr_pbch_config_t pbch_config); int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type); int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
......
...@@ -49,10 +49,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -49,10 +49,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
uint8_t cc_id = scheduled_response->CC_id; uint8_t cc_id = scheduled_response->CC_id;
uint32_t i; uint32_t i;
int slot = scheduled_response->slot; int slot = scheduled_response->slot;
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
if(scheduled_response != NULL){ if(scheduled_response != NULL){
// Note: we have to handle the thread IDs for this. To be revisited completely. // Note: we have to handle the thread IDs for this. To be revisited completely.
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0]; NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0]; NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0]; NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
...@@ -213,6 +213,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -213,6 +213,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
fapi_nr_config_request_t nrUE_config = PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->nrUE_config;
if(phy_config != NULL){ if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
LOG_I(MAC,"[L1][IF module][PHY CONFIG]\n"); LOG_I(MAC,"[L1][IF module][PHY CONFIG]\n");
...@@ -227,6 +229,8 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){ ...@@ -227,6 +229,8 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
LOG_I(MAC,"half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit); LOG_I(MAC,"half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
LOG_I(MAC,"-------------------------------\n"); LOG_I(MAC,"-------------------------------\n");
memcpy(&nrUE_config.pbch_config,&phy_config->config_req.pbch_config,sizeof(fapi_nr_pbch_config_t));
} }
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
......
...@@ -2828,7 +2828,7 @@ void nr_ue_pbch_procedures(uint8_t eNB_id, ...@@ -2828,7 +2828,7 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,
ue->pbch_vars[eNB_id], ue->pbch_vars[eNB_id],
&ue->frame_parms, &ue->frame_parms,
eNB_id, eNB_id,
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_index, ue->nrUE_config.pbch_config.ssb_index,
SISO, SISO,
ue->high_speed_flag); ue->high_speed_flag);
...@@ -3406,165 +3406,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id, ...@@ -3406,165 +3406,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
#endif #endif
#if 0
void ue_pmch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,int eNB_id,int abstraction_flag) {
int nr_tti_rx = proc->nr_tti_rx;
int frame_rx = proc->frame_rx;
int pmch_mcs=-1;
#if defined(Rel10) || defined(Rel14)
int CC_id = ue->CC_id;
#endif
uint8_t sync_area=255;
uint8_t mcch_active;
int l;
int ret=0;
if (is_pmch_subframe(frame_rx,nr_tti_rx,&ue->frame_parms)) {
LOG_D(PHY,"ue calling pmch nr_tti_rx ..\n ");
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Querying for PMCH demodulation\n",
ue->Mod_id,(nr_tti_rx==9?-1:0)+frame_rx,nr_tti_rx);
#if defined(Rel10) || defined(Rel14)
/*pmch_mcs = mac_xface->ue_query_mch(ue->Mod_id,
CC_id,
frame_rx,
nr_tti_rx,
eNB_id,
&sync_area,
&mcch_active);*/
#else
pmch_mcs=-1;
#endif
if (pmch_mcs>=0) {
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Programming PMCH demodulation for mcs %d\n",ue->Mod_id,frame_rx,nr_tti_rx,pmch_mcs);
fill_UE_dlsch_MCH(ue,pmch_mcs,1,0,0);
if (abstraction_flag == 0 ) {
for (l=2; l<12; l++) {
slot_fep_mbsfn(ue,
l,
nr_tti_rx,
0,0);//ue->rx_offset,0);
}
for (l=2; l<12; l++) {
rx_pmch(ue,
0,
nr_tti_rx,
l);
}
ue->dlsch_MCH[0]->harq_processes[0]->G = get_G(&ue->frame_parms,
ue->dlsch_MCH[0]->harq_processes[0]->nb_rb,
ue->dlsch_MCH[0]->harq_processes[0]->rb_alloc_even,
ue->dlsch_MCH[0]->harq_processes[0]->Qm,
1,
2,
frame_rx,
nr_tti_rx,
0);
dlsch_unscrambling(&ue->frame_parms,1,ue->dlsch_MCH[0],
ue->dlsch_MCH[0]->harq_processes[0]->G,
ue->pdsch_vars_MCH[0]->llr[0],0,nr_tti_rx<<1);
#ifdef UE_DLSCH_PARALLELISATION
ret = dlsch_decoding_mthread(ue,proc, eNB_id,
ue->pdsch_vars_MCH[0]->llr[0],
&ue->frame_parms,
ue->dlsch_MCH[0],
ue->dlsch_MCH[0]->harq_processes[0],
frame_rx,
nr_tti_rx,
0,
0,1);
#else
ret = dlsch_decoding(ue,
ue->pdsch_vars_MCH[0]->llr[0],
&ue->frame_parms,
ue->dlsch_MCH[0],
ue->dlsch_MCH[0]->harq_processes[0],
frame_rx,
nr_tti_rx,
0,
0,1);
printf("start pmch dlsch decoding\n");
#endif
} else { // abstraction
#ifdef PHY_ABSTRACTION
ret = dlsch_decoding_emul(ue,
nr_tti_rx,
5, // PMCH
eNB_id);
#endif
}
if (mcch_active == 1)
ue->dlsch_mcch_trials[sync_area][0]++;
else
ue->dlsch_mtch_trials[sync_area][0]++;
if (ret == (1+ue->dlsch_MCH[0]->max_turbo_iterations)) {
if (mcch_active == 1)
ue->dlsch_mcch_errors[sync_area][0]++;
else
ue->dlsch_mtch_errors[sync_area][0]++;
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: PMCH in error (%d,%d), not passing to L2 (TBS %d, iter %d,G %d)\n",
ue->Mod_id,
frame_rx,nr_tti_rx,
ue->dlsch_mcch_errors[sync_area][0],
ue->dlsch_mtch_errors[sync_area][0],
ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3,
ue->dlsch_MCH[0]->max_turbo_iterations,
ue->dlsch_MCH[0]->harq_processes[0]->G);
dump_mch(ue,0,ue->dlsch_MCH[0]->harq_processes[0]->G,nr_tti_rx);
#ifdef DEBUG_DLSCH
for (int i=0; i<ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3; i++) {
LOG_T(PHY,"%02x.",ue->dlsch_MCH[0]->harq_processes[0]->c[0][i]);
}
LOG_T(PHY,"\n");
#endif
if (nr_tti_rx==9)
//mac_xface->macphy_exit("Why are we exiting here?");
} else { // decoding successful
#if defined(Rel10) || defined(Rel14)
if (mcch_active == 1) {
/*mac_xface->ue_send_mch_sdu(ue->Mod_id,
CC_id,
frame_rx,
ue->dlsch_MCH[0]->harq_processes[0]->b,
ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3,
eNB_id,// not relevant in eMBMS context
sync_area);*/
ue->dlsch_mcch_received[sync_area][0]++;
if (ue->dlsch_mch_received_sf[nr_tti_rx%5][0] == 1 ) {
ue->dlsch_mch_received_sf[nr_tti_rx%5][0]=0;
} else {
ue->dlsch_mch_received[0]+=1;
ue->dlsch_mch_received_sf[nr_tti_rx][0]=1;
}
}
#endif // Rel10 || Rel14
} // decoding sucessful
} // pmch_mcs>=0
} // is_pmch_subframe=true
}
#endif
void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t *current_harq_processes) void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t *current_harq_processes)
{ {
...@@ -3795,9 +3636,9 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -3795,9 +3636,9 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
NR_UE_PDSCH *pdsch_vars; NR_UE_PDSCH *pdsch_vars;
uint8_t is_cw0_active = 0; uint8_t is_cw0_active = 0;
uint8_t is_cw1_active = 0; uint8_t is_cw1_active = 0;
nfapi_nr_config_request_t *cfg = &ue->nrUE_config; //nfapi_nr_config_request_t *cfg = &ue->nrUE_config;
uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value; //uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4; uint8_t nb_re_dmrs = 6; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value; uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint16_t nb_symb_sch = 9; uint16_t nb_symb_sch = 9;
...@@ -4336,20 +4177,20 @@ void *UE_thread_slot1_dl_processing(void *arg) { ...@@ -4336,20 +4177,20 @@ void *UE_thread_slot1_dl_processing(void *arg) {
#endif #endif
int is_pbch_in_slot(fapi_nr_pbch_config_t pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame) { int is_pbch_in_slot(fapi_nr_pbch_config_t *pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame) {
int ssb_slot_decoded = (pbch_config.ssb_index)/2; int ssb_slot_decoded = (pbch_config->ssb_index)/2;
if (periodicity == 5) { if (periodicity == 5) {
// check for pbch in corresponding slot each half frame // check for pbch in corresponding slot each half frame
if (pbch_config.half_frame_bit) if (pbch_config->half_frame_bit)
return(slot == ssb_slot_decoded || slot == ssb_slot_decoded - slots_per_frame/2); return(slot == ssb_slot_decoded || slot == ssb_slot_decoded - slots_per_frame/2);
else else
return(slot == ssb_slot_decoded || slot == ssb_slot_decoded + slots_per_frame/2); return(slot == ssb_slot_decoded || slot == ssb_slot_decoded + slots_per_frame/2);
} }
else { else {
// if the current frame is supposed to contain ssb // if the current frame is supposed to contain ssb
if (!((frame-(pbch_config.system_frame_number))%(periodicity/10))) if (!((frame-(pbch_config->system_frame_number))%(periodicity/10)))
return(slot == ssb_slot_decoded); return(slot == ssb_slot_decoded);
else else
return 0; return 0;
...@@ -4358,8 +4199,7 @@ int is_pbch_in_slot(fapi_nr_pbch_config_t pbch_config, int frame, int slot, int ...@@ -4358,8 +4199,7 @@ int is_pbch_in_slot(fapi_nr_pbch_config_t pbch_config, int frame, int slot, int
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
uint8_t do_pdcch_flag,runmode_t mode, uint8_t do_pdcch_flag,runmode_t mode) {
fapi_nr_pbch_config_t pbch_config) {
...@@ -4376,6 +4216,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN ...@@ -4376,6 +4216,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
uint8_t nb_symb_pdcch = pdcch_vars->coreset[0].duration; uint8_t nb_symb_pdcch = pdcch_vars->coreset[0].duration;
uint8_t ssb_periodicity = 10;// ue->ssb_periodicity; // initialized to 5ms in nr_init_ue for scenarios where UE is not configured (otherwise acquired by cell configuration from gNB or LTE) uint8_t ssb_periodicity = 10;// ue->ssb_periodicity; // initialized to 5ms in nr_init_ue for scenarios where UE is not configured (otherwise acquired by cell configuration from gNB or LTE)
uint8_t dci_cnt = 0; uint8_t dci_cnt = 0;
fapi_nr_pbch_config_t *pbch_config = &ue->nrUE_config.pbch_config;
LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx); LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
...@@ -4558,7 +4399,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN ...@@ -4558,7 +4399,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats); start_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
nr_pbch_channel_estimation(ue,0,nr_tti_rx,(ue->symbol_offset+i)%(ue->frame_parms.symbols_per_slot),i-1,(pbch_config.ssb_index)&7,pbch_config.half_frame_bit); nr_pbch_channel_estimation(ue,0,nr_tti_rx,(ue->symbol_offset+i)%(ue->frame_parms.symbols_per_slot),i-1,(pbch_config->ssb_index)&7,pbch_config->half_frame_bit);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
......
...@@ -72,14 +72,15 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr ...@@ -72,14 +72,15 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr
// L2 Abstraction Layer // L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){ int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){
// return 0; return 0;
/*
return nr_ue_process_dlsch( module_id, return nr_ue_process_dlsch( module_id,
cc_id, cc_id,
gNB_index, gNB_index,
dci_ind, dci_ind,
pduP, pduP,
pdu_len); pdu_len);
*/
} }
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
...@@ -156,6 +157,9 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){ ...@@ -156,6 +157,9 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
(dl_info->dci_ind->dci_list+i)->rnti, (dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND; (dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){ /*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0: case FAPI_NR_DCI_TYPE_0_0:
...@@ -242,9 +246,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){ ...@@ -242,9 +246,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
dl_info->rx_ind = NULL; dl_info->rx_ind = NULL;
dl_info->dci_ind = NULL; dl_info->dci_ind = NULL;
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
return 0; return 0;
} }
......
...@@ -65,6 +65,7 @@ typedef struct { ...@@ -65,6 +65,7 @@ typedef struct {
frame_t frame; frame_t frame;
/// slot /// slot
int slot; int slot;
/// proc is needed to signal back decoded frame number to PHY. However, this is not really FAPI procedure and should be done differently
UE_nr_rxtx_proc_t * proc; UE_nr_rxtx_proc_t * proc;
/// NR UE FAPI-like P7 message, direction: L1 to L2 /// NR UE FAPI-like P7 message, direction: L1 to L2
......
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