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Commit 4cc81b00 authored by Xue Song's avatar Xue Song
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fix the problem that DL failed after merge 'master' branch

parent 52edf0c1
x2_handle_sctp_shutdown NRUE_usedlschparallel NR_2port_CSIRS NR_CSIRS_tomerge NR_F1C_F1U_extensions NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_w5GCN_new_gtpu NR_UE_SA NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_gNB_initial_MIB_fix NR_phytest_bugfixes NR_reworking_UL_antennaports Test_SA_5GREC bandwidth-testing ci-fix-module-ul-iperf ci_test_5GREC ci_test_nsa_on_develop ci_testinfra_as_code debug-UL-5GRECORDS develop develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-SA-CBRA-CUDU develop-aw2sori develop-wf-du dongzhanyi-zte-develop1 episys-merge fix-retransmission-rbg hack-bch-no-sched-sf-0 integration_2021_wk27 integration_w5GC_CBRA_test nfapi_nr_arch_mod nr-dl-mimo-2layer nr-pdcp-benchmarking nr_improve_chanest phy-asan-fixes rh_ci_test_rfsim_sa scs_60_iisc test-5GREC 2021.w27 2021.w26
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openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
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......@@ -427,7 +427,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedules the DCI for Downlink and PDSCH
if (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd)
&& slot < 10 && slot == 2) {
&& slot < 10) {
nr_schedule_ue_spec(module_idP, frame, slot, num_slots_per_tdd);
}
......
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