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Commit 5e924893 authored by Florian Kaltenberger's avatar Florian Kaltenberger Committed by hardy
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applying new TDA to benetel config file

parent 2e9ac367
xw2 512-dataplane-bug-in-l2nfapi_nos1 FR2_NSA Fix_SA_SIB1 NRUE_usedlschparallel NR_2port_CSIRS NR_CSIRS_tomerge NR_F1C_F1U_extensions NR_FR2_initsync_fixes NR_MAC_SSB NR_MCS_BLER NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR3_tmp NR_UE_CONFIG_REQ_FIXES NR_UE_PUCCH_bugfixes NR_UE_SA NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_cleanup_PUCCH_resources NR_gNB_initial_MIB_fix NR_multiplexing_HARQ_CSI_PUCCH NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request RFquality Test_SA_5GREC add-ru-docker-image avxllr bandwidth-testing benetel_config_file_fix benetel_dpdk20 bugfix-free-ra-process bugfix-nr-t-reordering bugfix_gnb_rt_stats_html ci-fix-module-ul-iperf ci_benetel_longrun_limits ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_testinfra_as_code debug-UL-5GRECORDS debug_UL_signal detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-SA-CBRA develop-SA-CBRA-Msg5 develop-aw2sori develop-wf-du disable_CSI_measrep docker-improvements-2021-april docker-no-cache-option dongzhanyi-zte-develop1 episys-merge episys/nsa_development fedora-gen-kernel-fix fix-check fix-compile fix-physim-deploy fix-realtime fix-retransmission-rbg fix-x2-without-gnb fix_coreset_dmrs_idx fix_nr_ulsim fixgtpu flexran-rtc-repo-is-public git-dashboard gnb-freerun-txru gnb-realtime-hotfix gnb-realtime-quickfix hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa integ-w13-test-rt-issue integration_2020_wk15 integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_2021_wk20_a integration_2021_wk22 integration_2021_wk23 integration_2021_wk27 integration_w5GC_CBRA_test ldpc_offload_t1 migrate-cpp-check-container migrate-vm-pipeline-to-bionic multiple_ssb_sib1_bugfix new-gtpu nfapi_nr_arch_mod nr-dl-mimo-2layer nr-dmrs-fixes nr-pdcp-benchmarking nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-stats-print nr_improve_chanest nr_ue_pdcp_fix oairu phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases prb_based_dl_channel_estimation rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_gsheet_rt_monitoring rh_ci_nsa_test_n310 rh_ci_phy_test_improve rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_test_rfsim_sa sanitize-v1 sanitize-v1-tmp scs_60_iisc sim-channels small_nr_bugfixes test-5GREC test-nsa-benetel test-panos test_nsa_gtpu_fix test_rt-fix_phy-test ue-pdsch-pusch-parallel usrp_stop_cleanly wf_testc x2_handle_sctp_shutdown 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w27 2021.w26 2021.w25 2021.w24 2021.w23 2021.w22 2021.w20 2021.w19 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a benetel_gnb_rel_2.0 benetel_enb_rel_2.0
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Showing with 16 additions and 31 deletions
targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf
View file @ 5e924893
...@@ -60,27 +60,14 @@ gNBs = ...@@ -60,27 +60,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0; initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon #pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries) #pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; initialDLBWPk0_0 = 0; #for DL slot
#initialULBWPmappingType initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
#0=typeA,1=typeB initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13 initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
...@@ -137,20 +124,18 @@ gNBs = ...@@ -137,20 +124,18 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B # 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements) # pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1 initialULBWPmappingType_0 = 1
# this is SS=0 L=11 initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1; initialULBWPmappingType_1 = 1;
# this is SS=0 L=12 initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7; initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1; initialULBWPmappingType_2 = 1;
# this is SS=10 L=4 initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1; msg3_DeltaPreamble = 1;
#p0_NominalWithGrant =-90; #p0_NominalWithGrant =-90;
......
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