Commit 78b90146 authored by Florian Kaltenberger's avatar Florian Kaltenberger

Merge branch 'nr_pdsch' into 'develop-nr'

Nr pdsch

See merge request oai/openairinterface5g!475
parents 2fe82053 0a183d0e
dev 1 128-ues 256_QAM_demod 408-reworked 408-ue-main-threads 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu 512-dataplane-bug-in-l2nfapi_nos1 5g_fapi_scf FR2_NSA Fix_SA_SIB1 LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_2port_CSIRS NR_CSIRS_tomerge NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_F1C_F1U_extensions NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_CONFIG_REQ_FIXES NR_UE_MAC_scheduler NR_UE_PUCCH_bugfixes NR_UE_RA_fixes NR_UE_SA NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_beamforming_test NR_cleanup_PUCCH_resources NR_gNB_SCF_Indication NR_gNB_initial_MIB_fix NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_multiplexing_HARQ_CSI_PUCCH NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm OpInConnect_ISIP PBCHNRTCFIX PUSCH_TA_update RA_CI_test RFquality Saankhya_NRPRACH_HighSpeed Test_SA_5GREC UE_DL_DCI_hotfix add-dmrs-test add-ru-docker-image addoptions_nr_USRPdevice avxllr bandwidth-testing bch-fixes-bitmap benetel_5g_prach_fix benetel_config_file_fix benetel_dpdk20 benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes benetel_phase_rotation benetel_phase_rotation_old bsr-fix bugfix-free-ra-process bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-fix-module-ul-iperf ci-new-docker-pipeline ci-rd-july-improvements ci-reduce-nb-vms ci-test ci-ul-iperf-from-trf-container ci_benetel_longrun_limits ci_benetel_test ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_test_ra_fr2 ci_testinfra_as_code ci_vm_resource_fix clean-5G-scope-round2 cleanup_softmodem_main constant_power debug-UL-5GRECORDS debug_UL_signal debug_branch_init_sync detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aw2sori develop-ci develop-nr develop-nr-fr2 develop-nr-fr2-rework develop-nr_cppcheck develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-wf-du develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_stable dfts_alternatives disable_CSI_measrep dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel docker-improvements-2021-april docker-no-cache-option docupdate_tools dongzhanyi-zte-develop dongzhanyi-zte-develop1 dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch dual-connectivity edrx enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feat-mac-sock feature-4g-sched feature-nr-4g-nfapi-modifications feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fedora-gen-kernel-fix fembms-enb-ue fft_bench_hotfix finalize-oaicn-integration firas fix-check fix-ci-tun fix-clock-source fix-compile fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-quectel fix-realtime fix-retransmission-rbg fix-softmodem-restart fix-warnings fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_pdsch_low_prb fix_rb_corruption fix_reestablishment fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun fixgtpu flexran-apps flexran-improvements flexran-repair-mme-mgmt flexran-rtc-repo-is-public fr2-hw-test fujitsu_lte_contribution fujitsu_lte_contribution-128 gNB-nrUE-USRP generate_push_ptrs git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation hotfix_usrp_lib improve_build_nr_lte_merge improve_nr_modulation improve_ue_stability integ-w13-test-rt-issue integration-develop-nr-2019w45 integration_2020_wk15 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_2021_wk20_a integration_2021_wk22 integration_2021_wk23 integration_2021_wk27 integration_w5GC_CBRA_test inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE interoperability-test isip_nr itti-enhancement l2-fixes ldpc-dec-layering ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_offload_t1 ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mbms-fix-develop-nr merging-2019-w51-to-develop-nr migrate-cpp-check-container migrate-vm-pipeline-to-bionic minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-bsr-fix nr-coreset-bug-fix nr-dl-mimo-2layer nr-dlsch-multi-thread nr-dlsch-thread nr-dmrs-fixes nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-multiple-ssb nr-pdcp nr-pdcp-benchmarking nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-pdsch-extraction-bugfix nr-physim-update nr-ra-fix nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-ssb-measurements nr-stats-print nr-timing-measurement nr-timing-measurement-merge nr-ue-buffer-status nr-ue-slot-based nr-uldci nrPBCHTCFix nrPbchTcFix nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_ci_dlsim nr_csi_newbranch nr_demo_wsa2019 nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_dlsch_parallel_measurements nr_dlsim_plot nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_flexible_NRBDL nr_improve_build_procedures nr_improve_chanest nr_increase_tp nr_pdcch_testing nr_pdcch_updates nr_polar_decoder_improvement nr_power_measurement_fixes nr_prach nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_sim_fix nr_tdd_configuration nr_ue_msg3 nr_ue_pdcp_fix nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark pdsch-ch-est phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases polar8 prb_based_dl_channel_estimation ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul recursive-cmake reduce_memory_footprint remove-ci-workaround remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert-f5c94279 revert_memcpy rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_oc rh_ci_phy_test_improve rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_test_rfsim_sa rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rohan_ulsim2RxFix rrc-enb-phy-testmode ru-parallel-beamforming runel runel-reverse-test s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-demo-hs sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai scs_60_iisc sim-channels small-bugfixes-w40 small-config-change small_nr_bugfixes smallcleanup softmodem_cleanup split73 t-gnb-tracer test-5GREC test-nsa-benetel test-panos test-x310-perf test_nsa_gtpu_fix test_rt-fix_phy-test testing_2symb_pdcch testing_with_external_txdata thread-pool tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-dci-false-detection ue-fixes ue-fixes-ota ue-pdsch-pusch-parallel ue-race-fix ue-updates-runel-test ue_adjust_gain ue_beam_selection ue_dlsch-multi-threading ue_dlsch_decoding_ldpc_offload ue_nfapi_mch uhd_priority_set_cleanup ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes update-to-2019-march-june-release usrp_fix_adc_shift_and_pps_sync usrp_gpio_test usrp_stop_cleanly usrp_x400 wf-sa-rrc wf_testc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest x2-endc-processing x2_handle_sctp_shutdown xiangwab xiangwan xw2 yihongzheng_srb zzs 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w27 2021.w26 2021.w25 2021.w24 2021.w23 2021.w22 2021.w20 2021.w19 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 nr-ip-over-lte nr-ip-over-lte-v.1.5 nr-ip-over-lte-v.1.4 nr-ip-over-lte-v.1.3 nr-ip-over-lte-v.1.2 nr-ip-over-lte-v.1.1 nr-ip-over-lte-v.1.0 develop-nr-pdcch develop-nr-2020w03 develop-nr-2020w02 develop-nr-2019w51 develop-nr-2019w50 develop-nr-2019w48 develop-nr-2019w47 develop-nr-2019w45 develop-nr-2019w43 develop-nr-2019w42 develop-nr-2019w40 develop-nr-2019w28 develop-nr-2019w23 benetel_phase_rotation benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
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...@@ -252,7 +252,7 @@ case $key in ...@@ -252,7 +252,7 @@ case $key in
VM_NAME=ci-phy-sim VM_NAME=ci-phy-sim
ARCHIVES_LOC=phy_sim ARCHIVES_LOC=phy_sim
LOG_PATTERN=.Rel15.txt LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=6 NB_PATTERN_FILES=7
BUILD_OPTIONS="--phy_simulators" BUILD_OPTIONS="--phy_simulators"
RUN_OPTIONS="./run_exec_autotests.bash -g \"01510*\" -q -np -b" RUN_OPTIONS="./run_exec_autotests.bash -g \"01510*\" -q -np -b"
NBARGS=$[$NBARGS+256] NBARGS=$[$NBARGS+256]
...@@ -330,7 +330,7 @@ case $key in ...@@ -330,7 +330,7 @@ case $key in
VM_NAME=ci-phy-sim VM_NAME=ci-phy-sim
ARCHIVES_LOC=phy_sim ARCHIVES_LOC=phy_sim
LOG_PATTERN=.Rel15.txt LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=6 NB_PATTERN_FILES=7
BUILD_OPTIONS="--phy_simulators" BUILD_OPTIONS="--phy_simulators"
RUN_OPTIONS="./run_exec_autotests.bash -g \"01510*\" -q -np -b" RUN_OPTIONS="./run_exec_autotests.bash -g \"01510*\" -q -np -b"
NBARGS=$[$NBARGS+256] NBARGS=$[$NBARGS+256]
......
...@@ -411,6 +411,10 @@ function report_build { ...@@ -411,6 +411,10 @@ function report_build {
then then
summary_table_row "PBCH Test - Release 15" ./archives/phy_sim/nr_pbchsim.Rel15.txt "Built target nr_pbchsim" ./phy_sim_row6.html summary_table_row "PBCH Test - Release 15" ./archives/phy_sim/nr_pbchsim.Rel15.txt "Built target nr_pbchsim" ./phy_sim_row6.html
fi fi
if [ -f ./archives/phy_sim/nr_dlschsim.Rel15.txt ]
then
summary_table_row "DLSCH Test - Release 15" ./archives/phy_sim/nr_dlschsim.Rel15.txt "Built target nr_dlschsim" ./phy_sim_row7.html
fi
summary_table_footer summary_table_footer
......
...@@ -290,6 +290,8 @@ set(protobuf_generated_dir ${OPENAIR_BIN_DIR}) ...@@ -290,6 +290,8 @@ set(protobuf_generated_dir ${OPENAIR_BIN_DIR})
add_list2_option(RRC_ASN1_VERSION "Rel15" "ASN.1 version of RRC interface" "Rel8" "Rel10" "Rel14" "CBA") add_list2_option(RRC_ASN1_VERSION "Rel15" "ASN.1 version of RRC interface" "Rel8" "Rel10" "Rel14" "CBA")
Message("RRC_ASN1_VERSION is ${RRC_ASN1_VERSION}")
if (${RRC_ASN1_VERSION} STREQUAL "Rel8") if (${RRC_ASN1_VERSION} STREQUAL "Rel8")
make_version(RRC_VERSION 8 6 0) make_version(RRC_VERSION 8 6 0)
set (RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1c/ASN1_files/EUTRA-RRC-Definitions-86.asn) set (RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1c/ASN1_files/EUTRA-RRC-Definitions-86.asn)
...@@ -366,9 +368,9 @@ execute_process(COMMAND mkdir -p ${NR_RRC_FULL_DIR} ...@@ -366,9 +368,9 @@ execute_process(COMMAND mkdir -p ${NR_RRC_FULL_DIR}
OUTPUT_QUIET OUTPUT_QUIET
ERROR_QUIET) ERROR_QUIET)
if (NOT ${ret} STREQUAL 0) #if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error") # message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0) #endif (NOT ${ret} STREQUAL 0)
file(GLOB nr_rrc_source ${NR_RRC_FULL_DIR}/*.c) file(GLOB nr_rrc_source ${NR_RRC_FULL_DIR}/*.c)
file(GLOB nr_rrc_h ${NR_RRC_FULL_DIR}/*.h) file(GLOB nr_rrc_h ${NR_RRC_FULL_DIR}/*.h)
...@@ -1184,6 +1186,7 @@ set(PHY_SRC_COMMON ...@@ -1184,6 +1186,7 @@ set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c ${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_segmentation.c ${OPENAIR1_DIR}/PHY/CODING/nr_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_compute_tbs.c ${OPENAIR1_DIR}/PHY/CODING/nr_compute_tbs.c
${OPENAIR1_DIR}/PHY/CODING/nr_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c ${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c ${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/3gpplte_sse.c ${OPENAIR1_DIR}/PHY/CODING/3gpplte_sse.c
...@@ -1304,6 +1307,11 @@ set(PHY_SRC_UE ...@@ -1304,6 +1307,11 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_pbch.c ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_pbch.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci.c ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci_tools.c ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci_tools.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dlsch.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dlsch_tools.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dlsch_coding.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_tbs_tools.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_sch_dmrs.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c ${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c ${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
...@@ -1333,6 +1341,10 @@ set(PHY_SRC_UE ...@@ -1333,6 +1341,10 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dmrs_nr.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dmrs_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_initial_sync.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_pbch.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_pbch.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_tbs_tools.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/ ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_prach.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_prach.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
...@@ -1343,6 +1355,7 @@ set(PHY_SRC_UE ...@@ -1343,6 +1355,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold_ue.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold_ue.c
${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c ${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c ${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c ${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c ${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
...@@ -1523,14 +1536,6 @@ set(NR_L2_SRC_UE ...@@ -1523,14 +1536,6 @@ set(NR_L2_SRC_UE
${NR_UE_RRC_DIR}/L2_interface_ue.c ${NR_UE_RRC_DIR}/L2_interface_ue.c
${NR_UE_RRC_DIR}/main_ue.c ${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c ${NR_UE_RRC_DIR}/rrc_UE.c
# ${NR_UE_RRC_DIR}/mac_vars.c
#${RRC_DIR}/rrc_UE.c
)
set(L2_NR_SRC_UE
${NR_UE_RRC_DIR}/L2_interface_ue.c
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
) )
set (MAC_SRC set (MAC_SRC
...@@ -1636,26 +1641,26 @@ set ( NR_LTE_UE_REUSE_SRC ...@@ -1636,26 +1641,26 @@ set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/SCHED/phy_procedures_lte_common.c ${OPENAIR1_DIR}/SCHED/phy_procedures_lte_common.c
#${OPENAIR1_DIR}/SCHED_UE/phy_procedures_lte_ue.c #${OPENAIR1_DIR}/SCHED_UE/phy_procedures_lte_ue.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pmch_common.c #${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pmch_common.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_cell_spec.c #${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_cell_spec.c
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c #${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c #${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c
# ${OPENAIR1_DIR}/PHY/INIT/lte_init_ue.c # ${OPENAIR1_DIR}/PHY/INIT/lte_init_ue.c
${OPENAIR1_DIR}/PHY/CODING/crc_byte.c ${OPENAIR1_DIR}/PHY/CODING/crc_byte.c
${OPENAIR1_DIR}/PHY/CODING/viterbi_lte.c ${OPENAIR1_DIR}/PHY/CODING/viterbi_lte.c
${OPENAIR1_DIR}/PHY/CODING/viterbi.c ${OPENAIR1_DIR}/PHY/CODING/viterbi.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich_common.c #${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich_common.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c #${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c ${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c ${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_gold.c ${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_gold.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_est_freq_offset.c ${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_est_freq_offset.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c ${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c ${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c #${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
#${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c #${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
) )
...@@ -2555,6 +2560,9 @@ target_link_libraries(polartest SIMU PHY PHY_NR PHY_COMMON m ${ATLAS_LIBRARIES}) ...@@ -2555,6 +2560,9 @@ target_link_libraries(polartest SIMU PHY PHY_NR PHY_COMMON m ${ATLAS_LIBRARIES})
add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c) add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES}) target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES})
add_executable(nr_dlschsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c ${T_SOURCE})
target_link_libraries(nr_dlschsim -Wl,--start-group UTIL SIMU PHY PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE}) add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE})
target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl) target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
......
...@@ -692,7 +692,7 @@ function main() { ...@@ -692,7 +692,7 @@ function main() {
echo_info "Compiling unitary tests simulators" echo_info "Compiling unitary tests simulators"
# TODO: fix: dlsim_tm4 pucchsim prachsim pdcchsim pbchsim mbmssim # TODO: fix: dlsim_tm4 pucchsim prachsim pdcchsim pbchsim mbmssim
#simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim" #simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim"
simlist="dlsim ulsim polartest ldpctest nr_pbchsim" simlist="dlsim ulsim polartest ldpctest nr_pbchsim nr_dlschsim"
for f in $simlist ; do for f in $simlist ; do
compilations \ compilations \
phy_simulators $f \ phy_simulators $f \
......
...@@ -194,6 +194,27 @@ typedef struct { ...@@ -194,6 +194,27 @@ typedef struct {
#define NFAPI_NR_SCH_CONFIG_SS_PBCH_BLOCK_POWER 0x5023 #define NFAPI_NR_SCH_CONFIG_SS_PBCH_BLOCK_POWER 0x5023
#define NFAPI_NR_SCH_CONFIG_N_SSB_CRB 0x5024 #define NFAPI_NR_SCH_CONFIG_N_SSB_CRB 0x5024
typedef struct {
nfapi_uint16_tlv_t data_scrambling_id;
nfapi_uint16_tlv_t dmrs_typeA_position;
nfapi_uint16_tlv_t dmrs_additional_position;
nfapi_uint16_tlv_t dmrs_type;
nfapi_uint16_tlv_t dmrs_max_length;
nfapi_uint16_tlv_t mapping_type;
nfapi_uint16_tlv_t resource_allocation;
nfapi_uint16_tlv_t time_allocation_list;
nfapi_uint16_tlv_t mcs_table;
nfapi_uint16_tlv_t aggregation_factor;
nfapi_uint16_tlv_t prb_bundling_type;
nfapi_uint16_tlv_t rbg_size;
nfapi_uint16_tlv_t vrb_to_prb_interleaver;
nfapi_uint16_tlv_t code_block_groug_transmission;
nfapi_uint16_tlv_t x_overhead;
nfapi_uint16_tlv_t max_dci_codewords;
} nfapi_nr_pdsch_config_t;
#define NFAPI_NR_PDSCH_CONFIG_TAG
typedef struct { typedef struct {
nfapi_uint16_tlv_t prach_RootSequenceIndex; ///// L1 parameter 'PRACHRootSequenceIndex' nfapi_uint16_tlv_t prach_RootSequenceIndex; ///// L1 parameter 'PRACHRootSequenceIndex'
...@@ -208,12 +229,6 @@ typedef struct { ...@@ -208,12 +229,6 @@ typedef struct {
nfapi_uint16_tlv_t preambleReceivedTargetPower; nfapi_uint16_tlv_t preambleReceivedTargetPower;
} nfapi_nr_rach_config_t; } nfapi_nr_rach_config_t;
typedef struct {
nfapi_uint16_tlv_t dmrs_TypeA_Position; ///// Position of (first) DL DM-RS
nfapi_uint16_tlv_t TimeDomainResourceAllocation_k0; ///// L1 parameter 'K0'
nfapi_uint16_tlv_t TimeDomainResourceAllocation_mappingType; ///// L1 parameter 'Mapping-type'
} nfapi_nr_pdsch_config_t;
typedef struct { typedef struct {
nfapi_uint16_tlv_t groupHoppingEnabledTransformPrecoding; ///// L1 parameter 'Group-hopping-enabled-Transform-precoding' nfapi_uint16_tlv_t groupHoppingEnabledTransformPrecoding; ///// L1 parameter 'Group-hopping-enabled-Transform-precoding'
nfapi_uint16_tlv_t msg3_DeltaPreamble; ///// L1 parameter 'Delta-preamble-msg3' nfapi_uint16_tlv_t msg3_DeltaPreamble; ///// L1 parameter 'Delta-preamble-msg3'
...@@ -272,8 +287,8 @@ typedef struct { ...@@ -272,8 +287,8 @@ typedef struct {
nfapi_nr_subframe_config_t subframe_config; nfapi_nr_subframe_config_t subframe_config;
nfapi_nr_rf_config_t rf_config; nfapi_nr_rf_config_t rf_config;
nfapi_nr_sch_config_t sch_config; nfapi_nr_sch_config_t sch_config;
nfapi_nr_rach_config_t rach_config;
nfapi_nr_pdsch_config_t pdsch_config; nfapi_nr_pdsch_config_t pdsch_config;
nfapi_nr_rach_config_t rach_config;
nfapi_nr_pusch_config_t pusch_config; nfapi_nr_pusch_config_t pusch_config;
nfapi_nr_pucch_config_t pucch_config; nfapi_nr_pucch_config_t pucch_config;
nfapi_nr_pdcch_config_t pdcch_config; nfapi_nr_pdcch_config_t pdcch_config;
...@@ -324,6 +339,13 @@ typedef enum { ...@@ -324,6 +339,13 @@ typedef enum {
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
} nfapi_nr_search_space_type_e; } nfapi_nr_search_space_type_e;
typedef enum {
NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_0=0,
NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_0A,
NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_1,
NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_2
} nfapi_nr_common_search_space_type_e;
typedef enum { typedef enum {
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=0, NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=0,
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2, NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2,
...@@ -345,6 +367,44 @@ typedef enum { ...@@ -345,6 +367,44 @@ typedef enum {
NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS
} nfapi_nr_coreset_precoder_granularity_type_e; } nfapi_nr_coreset_precoder_granularity_type_e;
typedef enum {
NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A=0,
NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_B,
NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C,
NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_ALLOC_LIST
} nfapi_nr_pdsch_time_domain_alloc_type_e;
typedef enum {
NFAPI_NR_PDSCH_MAPPING_TYPE_A=0,
NFAPI_NR_PDSCH_MAPPING_TYPE_B
} nfapi_nr_pdsch_mapping_type_e;
typedef enum {
NFAPI_NR_PDSCH_RBG_CONFIG_TYPE1=0,
NFAPI_NR_PDSCH_RBG_CONFIG_TYPE2
} nfapi_nr_pdsch_rbg_config_type_e;
typedef enum {
NFAPI_NR_PRG_GRANULARITY_2=2,
NFAPI_NR_PRG_GRANULARITY_4=4,
NFAPI_NR_PRG_GRANULARITY_WIDEBAND
} nfapi_nr_prg_granularity_e;
typedef enum {
NFAPI_NR_PRB_BUNDLING_TYPE_STATIC=0,
NFAPI_NR_PRB_BUNDLING_TYPE_DYNAMIC
} nfapi_nr_prb_bundling_type_e;
typedef enum {
NFAPI_NR_MCS_TABLE_QAM64_LOW_SE=0,
NFAPI_NR_MCS_TABLE_QAM256
} nfapi_nr_pdsch_mcs_table_e;
typedef enum {
NFAPI_NR_DMRS_TYPE1=0,
NFAPI_NR_DMRS_TYPE2
} nfapi_nr_dmrs_type_e;
// P7 Sub Structures // P7 Sub Structures
typedef struct { typedef struct {
...@@ -448,11 +508,12 @@ typedef struct{ ...@@ -448,11 +508,12 @@ typedef struct{
typedef struct { typedef struct {
nfapi_tl_t tl; nfapi_tl_t tl;
uint8_t rnti; uint16_t rnti;
uint8_t rnti_type; uint8_t rnti_type;
uint8_t dci_format; uint8_t dci_format;
uint8_t config_type; uint8_t config_type;
uint8_t search_space_type; uint8_t search_space_type;
uint8_t common_search_space_type;
uint8_t aggregation_level; uint8_t aggregation_level;
uint8_t n_rb; uint8_t n_rb;
uint8_t n_symb; uint8_t n_symb;
...@@ -485,14 +546,50 @@ typedef struct { ...@@ -485,14 +546,50 @@ typedef struct {
} nfapi_nr_dl_config_bch_pdu; } nfapi_nr_dl_config_bch_pdu;
typedef struct { typedef struct {
nfapi_tl_t tl; nfapi_tl_t tl;
nfapi_nr_search_space_t sib1searchSpace; uint16_t length;
nfapi_nr_coreset_t sib1ControlResourceSets; uint8_t pdu_index;
nfapi_nr_search_space_t sibssearchSpace; uint16_t rnti;
nfapi_nr_coreset_t sibsControlResourceSets; uint16_t nb_mod_symbols;
nfapi_nr_search_space_t ra_SearchSpace; uint8_t time_allocation_type;
nfapi_nr_coreset_t ra_ControlResourceSets; uint8_t freq_allocation_type;
uint8_t start_prb;
uint8_t n_prb;
uint8_t start_symbol;
uint8_t nb_symbols;
uint8_t mcs_idx;
uint8_t ndi;
uint8_t nb_codewords;
uint8_t nb_layers;
uint16_t coding_rate;
uint8_t modulation;
uint8_t modulation_order;
uint16_t transport_block_size;
uint8_t nb_re_dmrs;
uint8_t time_alloc_list_flag;
uint8_t time_alloc_list;
uint8_t rbg_list;
uint8_t virtual_resource_block_assignment_flag;
uint32_t resource_block_coding;
uint8_t redundancy_version;
uint8_t transport_blocks;
uint8_t transmission_scheme;
uint8_t number_of_subbands;
uint8_t codebook_index[NFAPI_MAX_NUM_SUBBANDS];
uint8_t ue_category_capacity;
uint8_t pa;
uint8_t delta_power_offset_index;
uint8_t ngap;
uint8_t transmission_mode;
uint8_t num_bf_prb_per_subband;
uint8_t num_bf_vector;
nfapi_bf_vector_t bf_vector[NFAPI_MAX_BF_VECTORS];
}nfapi_nr_dl_config_dlsch_pdu_rel15_t; }nfapi_nr_dl_config_dlsch_pdu_rel15_t;
#define NFAPI_NR_DL_CONFIG_REQUEST_DLSCH_PDU_REL15_TAG
typedef struct {
nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_pdu_rel15;
} nfapi_nr_dl_config_dlsch_pdu;
typedef struct { typedef struct {
nfapi_tl_t tl; nfapi_tl_t tl;
...@@ -502,15 +599,15 @@ typedef struct { ...@@ -502,15 +599,15 @@ typedef struct {
typedef struct { typedef struct {
} nfapi_nr_dl_config_nbch_pdu; } nfapi_nr_dl_config_nbch_pdu_rel15_t;
typedef struct { typedef struct {
} nfapi_nr_dl_config_npdcch_pdu; } nfapi_nr_dl_config_npdcch_pdu_rel15_t;
typedef struct { typedef struct {
} nfapi_nr_dl_config_ndlsch_pdu; } nfapi_nr_dl_config_ndlsch_pdu_rel15_t;
typedef struct { typedef struct {
nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15; nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15;
...@@ -525,11 +622,11 @@ typedef struct { ...@@ -525,11 +622,11 @@ typedef struct {
union { union {
nfapi_nr_dl_config_dci_dl_pdu dci_dl_pdu; nfapi_nr_dl_config_dci_dl_pdu dci_dl_pdu;
nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15; nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_pdu_rel15; nfapi_nr_dl_config_dlsch_pdu dlsch_pdu;
nfapi_nr_dl_config_pch_pdu_rel15_t pch_pdu_rel15; nfapi_nr_dl_config_pch_pdu_rel15_t pch_pdu_rel15;
//nfapi_nr_dl_config_nbch_pdu_rel15_t nbch_pdu_rel15; nfapi_nr_dl_config_nbch_pdu_rel15_t nbch_pdu_rel15;
//nfapi_nr_dl_config_npdcch_pdu_rel15_t npdcch_pdu_rel15; nfapi_nr_dl_config_npdcch_pdu_rel15_t npdcch_pdu_rel15;
//nfapi_nr_dl_config_ndlsch_pdu_rel15_t ndlsch_pdu_rel15; nfapi_nr_dl_config_ndlsch_pdu_rel15_t ndlsch_pdu_rel15;
}; };
} nfapi_nr_dl_config_request_pdu_t; } nfapi_nr_dl_config_request_pdu_t;
......
...@@ -18,6 +18,6 @@ alias oailte='cd $OPENAIR_TARGETS/RT/USER' ...@@ -18,6 +18,6 @@ alias oailte='cd $OPENAIR_TARGETS/RT/USER'
alias oais='cd $OPENAIR_TARGETS/SIMU/USER' alias oais='cd $OPENAIR_TARGETS/SIMU/USER'
alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES' alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES'
#export IIOD_REMOTE=192.168.121.32 export IIOD_REMOTE=192.168.121.32
export IIOD_REMOTE=192.168.1.11 #export IIOD_REMOTE=192.168.1.11
This diff is collapsed.
...@@ -7,6 +7,8 @@ ...@@ -7,6 +7,8 @@
#include <time.h> #include <time.h>
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h" #include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_uci_defs.h"
#include "PHY/CODING/coding_defs.h" #include "PHY/CODING/coding_defs.h"
#include "SIMULATION/TOOLS/sim.h" #include "SIMULATION/TOOLS/sim.h"
......
...@@ -38,6 +38,11 @@ ...@@ -38,6 +38,11 @@
#define MAX_TURBO_ITERATIONS_MBSFN 8 #define MAX_TURBO_ITERATIONS_MBSFN 8
#define MAX_TURBO_ITERATIONS max_turbo_iterations #define MAX_TURBO_ITERATIONS max_turbo_iterations
#define MAX_LDPC_ITERATIONS 4
#define MAX_LDPC_ITERATIONS_MBSFN 4
#define LTE_NULL 2
#define NR_NULL 2
typedef struct { typedef struct {
unsigned short nb_bits; unsigned short nb_bits;
unsigned short f1; unsigned short f1;
...@@ -443,16 +448,11 @@ unsigned int crcbit (unsigned char * inputptr, int octetlen, unsigned int poly); ...@@ -443,16 +448,11 @@ unsigned int crcbit (unsigned char * inputptr, int octetlen, unsigned int poly);
int16_t reverseBits(int32_t ,int32_t); int16_t reverseBits(int32_t ,int32_t);
void phy_viterbi_dot11(int8_t *,uint8_t *,uint16_t); void phy_viterbi_dot11(int8_t *,uint8_t *,uint16_t);
decoder_if_t phy_threegpplte_turbo_decoder;
decoder_if_t phy_threegpplte_turbo_decoder8;
decoder_if_t phy_threegpplte_turbo_decoder16;
int32_t nr_segmentation(unsigned char *input_buffer, int32_t nr_segmentation(unsigned char *input_buffer,
unsigned char **output_buffers, unsigned char **output_buffers,
unsigned int B, unsigned int B,
unsigned int *C, unsigned int *C,
unsigned int *Kplus, unsigned int *K,
unsigned int *Kminus,
unsigned int *Zout, unsigned int *Zout,
unsigned int *F); unsigned int *F);
...@@ -463,4 +463,40 @@ uint32_t nr_compute_tbs(uint8_t mcs, ...@@ -463,4 +463,40 @@ uint32_t nr_compute_tbs(uint8_t mcs,
uint16_t length_dmrs, uint16_t length_dmrs,
uint8_t Nl); uint8_t Nl);
void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f);
void nr_deinterleaving_ldpc(uint32_t E, uint8_t Qm, int16_t *e,int16_t *f);
uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
uint32_t Tbslbrm,
uint8_t BG,
uint16_t Z,
uint32_t G,
uint8_t *w,
uint8_t *e,
uint8_t C,
uint8_t rvidx,
uint8_t Qm,
uint8_t Nl,
uint8_t r);
int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
uint32_t Tbslbrm,
uint8_t BG,
uint16_t Z,
uint32_t G,
int16_t *w,
int16_t *soft_input,
uint8_t C,
uint8_t rvidx,
uint8_t clear,
uint8_t Qm,
uint8_t Nl,
uint8_t r,
uint32_t *E_out);
decoder_if_t phy_threegpplte_turbo_decoder;
decoder_if_t phy_threegpplte_turbo_decoder8;
decoder_if_t phy_threegpplte_turbo_decoder16;
#endif #endif
...@@ -35,12 +35,14 @@ ...@@ -35,12 +35,14 @@
/*ref 36-212 v8.6.0 , pp 8-9 */ /*ref 36-212 v8.6.0 , pp 8-9 */
/* the highest degree is set by default */ /* the highest degree is set by default */
unsigned int poly24a = 0x864cfb00; // 1000 0110 0100 1100 1111 1011 unsigned int poly24a = 0x864cfb00; // 1000 0110 0100 1100 1111 1011
// D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1 // D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011 unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011
// D^24 + D^23 + D^6 + D^5 + D + 1 // D^24 + D^23 + D^6 + D^5 + D + 1
unsigned int poly24c = 0xb2b11700; // 1011 0010 1011 0001 0001 0111 unsigned int poly24c = 0xb2b11700; // 1011 0010 1011 0001 0001 0111
// D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1 // D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1
unsigned int poly16 = 0x10210000; // 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1 unsigned int poly16 = 0x10210000; // 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1
unsigned int poly12 = 0x80F00000; // 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1 unsigned int poly12 = 0x80F00000; // 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1
unsigned int poly8 = 0x9B000000; // 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1 unsigned int poly8 = 0x9B000000; // 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1
...@@ -255,6 +257,68 @@ unsigned int crcPayload(unsigned char * inptr, int bitlen, uint32_t* crc256Table ...@@ -255,6 +257,68 @@ unsigned int crcPayload(unsigned char * inptr, int bitlen, uint32_t* crc256Table
return crc; return crc;
} }
int check_crc(uint8_t* decoded_bytes, uint32_t n, uint32_t F, uint8_t crc_type)
{
uint32_t crc=0,oldcrc=0;
uint8_t crc_len,temp;
switch (crc_type) {
case CRC24_A:
case CRC24_B:
crc_len=3;
break;
case CRC16:
crc_len=2;
break;
case CRC8:
crc_len=1;
break;
default:
crc_len=3;
}
for (int i=0; i<crc_len; i++)
oldcrc |= (decoded_bytes[(n>>3)-crc_len+i])<<((crc_len-1-i)<<3);
switch (crc_type) {
case CRC24_A:
oldcrc&=0x00ffffff;
crc = crc24a(decoded_bytes,
n-24)>>8;
break;
case CRC24_B:
oldcrc&=0x00ffffff;
crc = crc24b(decoded_bytes,
n-24)>>8;
break;
case CRC16:
oldcrc&=0x0000ffff;
crc = crc16(decoded_bytes,
n-16)>>16;
break;
case CRC8:
oldcrc&=0x000000ff;
crc = crc8(decoded_bytes,
n-8)>>24;
break;
}
if (crc == oldcrc)
return(1);
else
return(0);
}
#ifdef DEBUG_CRC #ifdef DEBUG_CRC
......
...@@ -38,6 +38,9 @@ ...@@ -38,6 +38,9 @@
#include "nrLDPC_cnProc.h" #include "nrLDPC_cnProc.h"
#include "nrLDPC_bnProc.h" #include "nrLDPC_bnProc.h"
#define NR_LDPC_ENABLE_PARITY_CHECK
//#define NR_LDPC_PROFILER_DETAIL
#ifdef NR_LDPC_DEBUG_MODE #ifdef NR_LDPC_DEBUG_MODE
#include "nrLDPC_tools/nrLDPC_debug.h" #include "nrLDPC_tools/nrLDPC_debug.h"
#endif #endif
......
...@@ -38,6 +38,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh ...@@ -38,6 +38,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh
void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb); void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb);
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput); int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput); int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **channel_input,short block_length, short BG, int n_segments,unsigned int macro_num, time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
/*ldpc_generate_coefficient.c*/ /*ldpc_generate_coefficient.c*/
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,unsigned char gen_code); int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,unsigned char gen_code);
......
...@@ -68,7 +68,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh ...@@ -68,7 +68,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh
printf("problem with BG\n"); printf("problem with BG\n");
return(-1); return(-1);
} }
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc; no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
......
...@@ -361,7 +361,7 @@ short *choose_generator_matrix(short BG,short Zc) ...@@ -361,7 +361,7 @@ short *choose_generator_matrix(short BG,short Zc)
return Gen_shift_values; return Gen_shift_values;
} }
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,unsigned char gen_code) int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length, short BG,unsigned char gen_code)
{ {
unsigned char c[22*384]; //padded input, unpacked, max size unsigned char c[22*384]; //padded input, unpacked, max size
unsigned char d[68*384]; //coded output, unpacked, max size unsigned char d[68*384]; //coded output, unpacked, max size
...@@ -378,26 +378,30 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho ...@@ -378,26 +378,30 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
int indlist2[1000]; int indlist2[1000];
//determine number of bits in codeword //determine number of bits in codeword
if (BG==1) //if (block_length>3840)
{ if (BG==1)
Kb = 22; {
nrows=46; //parity check bits //BG=1;
ncols=22; //info bits Kb = 22;
} nrows=46; //parity check bits
else if (BG==2) ncols=22; //info bits
{ }
nrows=42; //parity check bits //else if (block_length<=3840)
ncols=10; // info bits else if (BG==2)
{
if (block_length>640) //BG=2;
Kb = 10; nrows=42; //parity check bits
else if (block_length>560) ncols=10; // info bits
Kb = 9;
else if (block_length>192) if (block_length>640)
Kb = 8; Kb = 10;
else else if (block_length>560)
Kb = 6; Kb = 9;
} else if (block_length>192)
Kb = 8;
else
Kb = 6;
}
//find minimum value in all sets of lifting size //find minimum value in all sets of lifting size
Zc=0; Zc=0;
...@@ -415,8 +419,6 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho ...@@ -415,8 +419,6 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
return(-1); return(-1);
} }
int K = ncols*Zc;
Gen_shift_values=choose_generator_matrix(BG,Zc); Gen_shift_values=choose_generator_matrix(BG,Zc);
if (Gen_shift_values==NULL) { if (Gen_shift_values==NULL) {
printf("ldpc_encoder_orig: could not find generator matrix\n"); printf("ldpc_encoder_orig: could not find generator matrix\n");
...@@ -438,15 +440,9 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho ...@@ -438,15 +440,9 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
} }
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc; no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
//nrows - no_punctured_columns = 2 +2*block_length/Zc
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*3); removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*3);
// ((nrows-no_punctured_columns) * Zc-removed_bit) =
// 2Zc + 2*block_length
//printf("%d\n",no_punctured_columns); //printf("%d\n",no_punctured_columns);
//printf("%d\n",removed_bit); //printf("%d\n",removed_bit);
//printf("%d\n",nrows-no_punctured_columns);
//printf("%d\n",((nrows-no_punctured_columns) * Zc-removed_bit));
// unpack input // unpack input
memset(c,0,sizeof(unsigned char) * ncols * Zc); memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc); memset(d,0,sizeof(unsigned char) * nrows * Zc);
...@@ -614,8 +610,8 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho ...@@ -614,8 +610,8 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
} }
// information part and puncture columns // information part and puncture columns
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); //systematic bits memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); //systematic bits 2Zc + 2*block_length memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char));
//memcpy(channel_input,c,Kb*Zc*sizeof(unsigned char)); //memcpy(channel_input,c,Kb*Zc*sizeof(unsigned char));
return 0; return 0;
} }
...@@ -35,5 +35,27 @@ ...@@ -35,5 +35,27 @@
#define NR_POLAR_UCI_MESSAGE_TYPE -1 //int8_t #define NR_POLAR_UCI_MESSAGE_TYPE -1 //int8_t
#define NR_POLAR_UCI_CRC_ERROR_CORRECTION_BITS 3 #define NR_POLAR_UCI_CRC_ERROR_CORRECTION_BITS 3
#define NR_POLAR_PUCCH_PAYLOAD_BITS 32
#define NR_POLAR_PUCCH_E 32
//Ref. 38-212, Section 6.3.1.2.1
#define NR_POLAR_PUCCH_CRC_PARITY_BITS_SHORT 6
#define NR_POLAR_PUCCH_CRC_PARITY_BITS_LONG 11
#define NR_POLAR_PUCCH_I_SEG_LONG 1
#define NR_POLAR_PUCCH_I_SEG_SHORT 0
//Ref. 38-212, Section 6.3.1.3.1
#define NR_POLAR_PUCCH_N_MAX 10
#define NR_POLAR_PUCCH_I_IL 0
#define NR_POLAR_PUCCH_N_PC_SHORT 3
#define NR_POLAR_PUCCH_N_PC_LONG 0
#define NR_POLAR_PUCCH_N_PC_WM_LONG 0
#define NR_POLAR_PUCCH_N_PC_WM_SHORT 1
//Ref. 38-212, Section 6.3.1.4.1
#define NR_POLAR_PUCCH_I_BIL 1
#endif #endif
...@@ -28,35 +28,8 @@ ...@@ -28,35 +28,8 @@
#define INDEX_MAX_TBS_TABLE (93) #define INDEX_MAX_TBS_TABLE (93)
//Table 5.1.3.1-1 //Table 5.1.3.1-1
uint16_t Mcsindextable1[29][3] = {{2,120,0.2344}, uint16_t Mcsindextable1[29][2] = {{2,120},{2,157},{2,193},{2,251},{2,308},{2,379},{2,449},{2,526},{2,602},{2,679},{4,340},{4,378},{4,434},{4,490},{4,553},{4,616},
{2,157,0.3066}, {4,658},{6,438},{6,466},{6,517},{6,567},{6,616},{6,666},{6,719},{6,772},{6,822},{6,873}, {6,910}, {6,948}};
{2,193,0.3770},
{2,251,0.4902},
{2,308,0.6016},
{2,379,0.7402},
{2,449,0.8770},
{2,526,1.0273},
{2,602,1.1758},
{2,679,1.3262},
{4,340,1.3281},
{4,378,1.4766},
{4,434,1.6953},
{4,490,1.9141},
{4,553,2.1602},
{4,616,2.4063},
{4,658,2.5703},
{6,438,2.5664},
{6,466,2.7305},
{6,517,3.0293},
{6,567,3.3223},
{6,616,3.6094},
{6,666,3.9023},
{6,719,4.2129},
{6,772,4.5234},
{6,822,4.8164},
{6,873,5.1152},
{6,910,5.3320},
{6,948,5.5547}};
//Table 5.1.2.2-2 //Table 5.1.2.2-2
uint16_t Tbstable_nr[INDEX_MAX_TBS_TABLE] = {24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,208,224,240,256,272,288,304,320,336,352,368,384,408,432,456,480,504,528,552,576,608,640,672,704,736,768,808,848,888,928,984,1032,1064,1128,1160,1192,1224,1256,1288,1320,1352,1416,1480,1544,1608,1672,1736,1800,1864,1928,2024,2088,2152,2216,2280,2408,2472,2536,2600,2664,2728,2792,2856,2976,3104,3240,3368,3496,3624,3752,3824}; uint16_t Tbstable_nr[INDEX_MAX_TBS_TABLE] = {24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,208,224,240,256,272,288,304,320,336,352,368,384,408,432,456,480,504,528,552,576,608,640,672,704,736,768,808,848,888,928,984,1032,1064,1128,1160,1192,1224,1256,1288,1320,1352,1416,1480,1544,1608,1672,1736,1800,1864,1928,2024,2088,2152,2216,2280,2408,2472,2536,2600,2664,2728,2792,2856,2976,3104,3240,3368,3496,3624,3752,3824};
...@@ -67,8 +40,9 @@ uint32_t nr_compute_tbs(uint8_t mcs, ...@@ -67,8 +40,9 @@ uint32_t nr_compute_tbs(uint8_t mcs,
uint16_t length_dmrs, uint16_t length_dmrs,
uint8_t Nl) uint8_t Nl)
{ {
uint16_t nbp_re, nb_re, nb_dmrs_prb, nb_rb_oh, Ninfo,Np_info,n,Qm,R,C; uint16_t nbp_re, nb_re, nb_dmrs_prb, nb_rb_oh,Qm,R;
uint32_t nr_tbs=0; uint32_t nr_tbs=0;
double Ninfo,Np_info,n,C;
nb_rb_oh = 0; //set to 0 if not configured by higher layer nb_rb_oh = 0; //set to 0 if not configured by higher layer
Qm = Mcsindextable1[mcs][0]; Qm = Mcsindextable1[mcs][0];
...@@ -80,17 +54,17 @@ uint32_t nr_compute_tbs(uint8_t mcs, ...@@ -80,17 +54,17 @@ uint32_t nr_compute_tbs(uint8_t mcs,
nb_re = min(156, nbp_re) * nb_rb; nb_re = min(156, nbp_re) * nb_rb;
// Intermediate number of information bits // Intermediate number of information bits
Ninfo = (nb_re * R * Qm * Nl)/1024; Ninfo = (double)((nb_re * R * Qm * Nl)/1024);
//printf("Ninfo %d nbp_re %d nb_re %d Qm %d, R %d\n", Ninfo, nbp_re, nb_re, Qm, R); //printf("Ninfo %lf nbp_re %d nb_re %d mcs %d Qm %d, R %d\n", Ninfo, nbp_re, nb_re,mcs, Qm, R);
if (Ninfo <=3824) { if (Ninfo <=3824) {
n = max(3, floor(log2(Ninfo)) - 6); n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, pow(n,2) * floor(Ninfo/pow(n,2))); Np_info = max(24, pow(2,n) * floor(Ninfo/pow(2,n)));
for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) { for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
if (Tbstable_nr[i] >= Np_info){ if ((double)Tbstable_nr[i] >= Np_info){
nr_tbs = Tbstable_nr[i]; nr_tbs = Tbstable_nr[i];
break; break;
} }
...@@ -98,19 +72,21 @@ uint32_t nr_compute_tbs(uint8_t mcs, ...@@ -98,19 +72,21 @@ uint32_t nr_compute_tbs(uint8_t mcs,
} }
else { else {
n = floor(log2(Ninfo-24)) - 5; n = floor(log2(Ninfo-24)) - 5;
Np_info = max(3840, pow(n,2) * round((Ninfo - 24)/pow(n,2))); Np_info = max(3840, pow(2,n) * round((Ninfo - 24)/pow(2,n)));
if (R <= 1024/4) { if (R <= 256) { //1/4
C = ceil( (Np_info + 24)/3816 ); C = ceil( (Np_info + 24)/3816 );
nr_tbs = 8 * C * ceil( (Np_info + 24)/(8*C) ) - 24; nr_tbs = (uint32_t)(8 * C * ceil( (Np_info + 24)/(8*C) ) - 24);
} }
else { else {
if (Np_info > 8424){ if (Np_info > 8424){
C = ceil( (Np_info + 24)/8424 ); C = ceil( (Np_info + 24)/8424 );
nr_tbs = 8 * C * ceil( (Np_info + 24)/(8*C) ) - 24; nr_tbs = (uint32_t)(8 * C * ceil( (Np_info + 24)/(8*C) ) - 24);
}
else {
nr_tbs = (uint32_t)(8 * ceil( (Np_info + 24)/8 ) - 24);
//printf("n %lf Np_info %f pow %f ceil %f \n",n, Np_info,pow(2,6),ceil( (Np_info + 24)/8 ));
} }
else
nr_tbs = 8 * ceil( (Np_info + 24)/8 ) - 24;
} }
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* file: nr_rate_matching.c
purpose: Procedures for rate matching/interleaving for NR LDPC
author: hongzhi.wang@tcl.com
*/
#include "PHY/defs_gNB.h"
#include "PHY/defs_nr_UE.h"
//#define RM_DEBUG 1
uint8_t index_k0[2][4] = {{0,17,33,56},{0,13,25,43}};
void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f)
{
uint32_t EQm;
EQm = E/Qm;
memset(f,0,E*sizeof(uint8_t));
for (int j = 0; j< EQm; j++){
for (int i = 0; i< Qm; i++){
f[(i+j*Qm)] = e[(i*EQm + j)];
}
}
}
void nr_deinterleaving_ldpc(uint32_t E, uint8_t Qm, int16_t *e,int16_t *f)
{
uint32_t EQm;
EQm = E/Qm;
for (int j = 0; j< EQm; j++){
for (int i = 0; i< Qm; i++){
e[(i*EQm + j)] = f[(i+j*Qm)];
}
}
}
uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
uint32_t Tbslbrm,
uint8_t BG,
uint16_t Z,
uint32_t G,
uint8_t *w,
uint8_t *e,
uint8_t C,
uint8_t rvidx,
uint8_t Qm,
uint8_t Nl,
uint8_t r)
{
uint8_t Cprime;
uint32_t Ncb,E,ind,k,Nref,N;
uint8_t *e2;
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
//Bit selection
N = (BG==1)?(66*Z):(50*Z);
if (Ilbrm == 0)
Ncb = N;
else {
Nref = 3*Tbslbrm/(2*C); //R_LBRM = 2/3
Ncb = min(N, Nref);
}
#ifdef RM_DEBUG
printf("nr_rate_matching: Ncb %d, rvidx %d, G %d, Qm %d, Nl%d, r %d\n",Ncb,rvidx, G, Qm,Nl,r);
#endif
Cprime = C; //assume CBGTI not present
if (r <= Cprime - ((G/(Nl*Qm))%Cprime) - 1)
E = Nl*Qm*(G/(Nl*Qm*Cprime));
else
E = Nl*Qm*((G/(Nl*Qm*Cprime))+1);
ind = (index_k0[BG-1][rvidx]*Ncb/N)*Z;
#ifdef RM_DEBUG
printf("nr_rate_matching: E %d, k0 %d Cprime %d modcprime %d\n",E,ind, Cprime,((G/(Nl*Qm))%Cprime));
#endif
e2 = e;
k=0;
for (; (ind<Ncb)&&(k<E); ind++) {
#ifdef RM_DEBUG
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
if (w[ind] != NR_NULL) e2[k++]=w[ind];
}
while(k<E) {
for (ind=0; (ind<Ncb)&&(k<E); ind++) {
#ifdef RM_DEBUG
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
if (w[ind] != NR_NULL) e2[k++]=w[ind];
}
}
return(E);
}
int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
uint32_t Tbslbrm,
uint8_t BG,
uint16_t Z,
uint32_t G,
int16_t *w,
int16_t *soft_input,
uint8_t C,
uint8_t rvidx,
uint8_t clear,
uint8_t Qm,
uint8_t Nl,
uint8_t r,
uint32_t *E_out)
{
uint8_t Cprime;
uint32_t Ncb,E,ind,k,Nref,N;
int16_t *soft_input2;
#ifdef RM_DEBUG
int nulled=0;
#endif
if (C==0 || Qm==0 || Nl==0) {
printf("nr_rate_matching: invalid parameters (C %d, Qm %d, Nl %d\n",C,Qm,Nl);
return(-1);
}
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
//Bit selection
N = (BG==1)?(66*Z):(50*Z);
if (Ilbrm == 0)
Ncb = N;
else {
Nref = (3*Tbslbrm/(2*C)); //R_LBRM = 2/3
Ncb = min(N, Nref);
}
Cprime = C; //assume CBGTI not present
if (r <= Cprime - ((G/(Nl*Qm))%Cprime) - 1)
E = Nl*Qm*(G/(Nl*Qm*Cprime));
else
E = Nl*Qm*((G/(Nl*Qm*Cprime))+1);
ind = (index_k0[BG-1][rvidx]*Ncb/N)*Z;
#ifdef RM_DEBUG
printf("nr_rate_matching_ldpc_rx: Clear %d, E %d, Ncb %d,rvidx %d, G %d, Qm %d, Nl%d, r %d\n",clear,E,Ncb,rvidx, G, Qm,Nl,r);
#endif
if (clear==1)
memset(w,0,Ncb*sizeof(int16_t));
soft_input2 = soft_input;
k=0;
for (; (ind<Ncb)&&(k<E); ind++) {
if (soft_input2[ind] != NR_NULL) {
w[ind] += soft_input2[k++];
#ifdef RM_DEBUG
printf("RM_RX k%d Ind: %d (%d)\n",k-1,ind,w[ind]);
#endif
}
#ifdef RM_DEBUG
else {
printf("RM_RX Ind: %d NULL %d\n",ind,nulled);
nulled++;
}
#endif
}
while(k<E) {
for (ind=0; (ind<Ncb)&&(k<E); ind++) {
if (soft_input2[ind] != NR_NULL) {
w[ind] += soft_input2[k++];
#ifdef RM_DEBUG
printf("RM_RX k%d Ind: %d (%d)(soft in %d)\n",k-1,ind,w[ind],soft_input2[k-1]);
#endif
}
#ifdef RM_DEBUG
else {
printf("RM_RX Ind: %d NULL %d\n",ind,nulled);
nulled++;
}
#endif
}
}
*E_out = E;
return(0);
}
...@@ -33,13 +33,12 @@ int32_t nr_segmentation(unsigned char *input_buffer, ...@@ -33,13 +33,12 @@ int32_t nr_segmentation(unsigned char *input_buffer,
unsigned char **output_buffers, unsigned char **output_buffers,
unsigned int B, unsigned int B,
unsigned int *C, unsigned int *C,
unsigned int *Kplus, unsigned int *K,
unsigned int *Kminus,
unsigned int *Zout, unsigned int *Zout,
unsigned int *F) unsigned int *F)
{ {
unsigned int L,Bprime,Bprime_by_C,Z,r,Kb,k,s,Kprime; unsigned int L,Bprime,Bprime_by_C,Z,r,Kb,k,s,crc,Kprime;
if (B<=8448) { if (B<=8448) {
L=0; L=0;
...@@ -59,13 +58,13 @@ int32_t nr_segmentation(unsigned char *input_buffer, ...@@ -59,13 +58,13 @@ int32_t nr_segmentation(unsigned char *input_buffer,
} }
if ((*C)>MAX_NUM_DLSCH_SEGMENTS) { if ((*C)>MAX_NUM_DLSCH_SEGMENTS) {
LOG_E(PHY,"lte_segmentation.c: too many segments %d, B %d, L %d, Bprime %d\n",*C,B,L,Bprime); LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d, L %d, Bprime %d\n",*C,B,L,Bprime);
return(-1); return(-1);
} }
// Find K+ // Find K+
Bprime_by_C = Bprime/(*C); Bprime_by_C = Bprime/(*C);
/*if (Bprime <=192) { if (Bprime <=192) {
Kb = 6; Kb = 6;
} else if (Bprime <=560) { } else if (Bprime <=560) {
Kb = 8; Kb = 8;
...@@ -73,9 +72,9 @@ int32_t nr_segmentation(unsigned char *input_buffer, ...@@ -73,9 +72,9 @@ int32_t nr_segmentation(unsigned char *input_buffer,
Kb = 9; Kb = 9;
} else if (Bprime <=3840) { } else if (Bprime <=3840) {
Kb = 10;; Kb = 10;;
} else {*/ } else {
Kb = 22; Kb = 22;
//} }
if ((Bprime_by_C%Kb) > 0) if ((Bprime_by_C%Kb) > 0)
...@@ -88,97 +87,85 @@ else ...@@ -88,97 +87,85 @@ else
#endif #endif
if (Z <= 2) { if (Z <= 2) {
*Kplus = 2; *K = 2;
*Kminus = 0;
} else if (Z<=16) { // increase by 1 byte til here } else if (Z<=16) { // increase by 1 byte til here
*Kplus = Z; *K = Z;
*Kminus = Z-1;
} else if (Z <=32) { // increase by 2 bytes til here } else if (Z <=32) { // increase by 2 bytes til here
*Kplus = (Z>>1)<<1; *K = (Z>>1)<<1;
if (*Kplus < Z) if (*K < Z)
*Kplus = *Kplus + 2; *K = *K + 2;
*Kminus = (*Kplus - 2);
} else if (Z <= 64) { // increase by 4 bytes til here } else if (Z <= 64) { // increase by 4 bytes til here
*Kplus = (Z>>2)<<2; *K = (Z>>2)<<2;
if (*Kplus < Z) if (*K < Z)
*Kplus = *Kplus + 4; *K = *K + 4;
*Kminus = (*Kplus - 4);
} else if (Z <=128 ) { // increase by 8 bytes til here } else if (Z <=128 ) { // increase by 8 bytes til here
*Kplus = (Z>>3)<<3; *K = (Z>>3)<<3;
if (*Kplus < Z) if (*K < Z)
*Kplus = *Kplus + 8; *K = *K + 8;
#ifdef DEBUG_SEGMENTATION #ifdef DEBUG_SEGMENTATION
printf("Z_by_C %d , Kplus2 %d\n",Z,*Kplus); printf("Z_by_C %d , K2 %d\n",Z,*K);
#endif #endif
*Kminus = (*Kplus - 8);
} else if (Z <= 256) { // increase by 4 bytes til here } else if (Z <= 256) { // increase by 4 bytes til here
*Kplus = (Z>>4)<<4; *K = (Z>>4)<<4;
if (*Kplus < Z) if (*K < Z)
*Kplus = *Kplus + 16; *K = *K + 16;
*Kminus = (*Kplus - 16);
} else if (Z <= 384) { // increase by 4 bytes til here } else if (Z <= 384) { // increase by 4 bytes til here
*Kplus = (Z>>5)<<5; *K = (Z>>5)<<5;
if (*Kplus < Z) if (*K < Z)
*Kplus = *Kplus + 32; *K = *K + 32;
*Kminus = (*Kplus - 32);
} else { } else {
//msg("nr_segmentation.c: Illegal codeword size !!!\n"); //msg("nr_segmentation.c: Illegal codeword size !!!\n");
return(-1); return(-1);
} }
*Zout = *Kplus; *Zout = *K;
*Kplus = *Kplus*Kb; *K = *K*Kb;
*Kminus = *Kminus*Kb;
*F = ((*K) - Bprime_by_C);
*F = ((*C)*(*Kplus) - (Bprime));
#ifdef DEBUG_SEGMENTATION #ifdef DEBUG_SEGMENTATION
printf("final nr seg output Z %d Kplus %d F %d \n", *Zout, *Kplus, *F); printf("final nr seg output Z %d K %d F %d \n", *Zout, *K, *F);
printf("C %d, Kplus %d, Kminus %d, Bprime_bytes %d, Bprime %d, F %d\n",*C,*Kplus,*Kminus,Bprime>>3,Bprime,*F); printf("C %d, K %d, Bprime_bytes %d, Bprime %d, F %d\n",*C,*K,Bprime>>3,Bprime,*F);
#endif #endif
if ((input_buffer) && (output_buffers)) { if ((input_buffer) && (output_buffers)) {
for (k=0; k<*F>>3; k++) {
output_buffers[0][k] = 0;
}
s=0; s=0;
for (r=0; r<*C; r++) { for (r=0; r<*C; r++) {
//if (r<(B%(*C))) Kprime = Bprime_by_C;
Kprime = *Kplus;
//else
// Kprime = *Kminus;
while (k<((Kprime - L)>>3)) { while (k<((Kprime - L)>>3)) {
output_buffers[r][k] = input_buffer[s]; output_buffers[r][k] = input_buffer[s];
// printf("encoding segment %d : byte %d (%d) => %d\n",r,k,Kr>>3,input_buffer[s]); //printf("encoding segment %d : byte %d (%d) => %d\n",r,k,(Kprime-L)>>3,input_buffer[s]);
k++; k++;
s++; s++;
} }
/* if (*F>0)
for (k=Kprime>>3; k<(*K)>>3; k++) {
output_buffers[r][k] = NR_NULL;
//printf("r %d filler bits [%d] = %d Kprime %d \n", r,k, output_buffers[r][k], Kprime);
}
if (*C > 1) { // add CRC if (*C > 1) { // add CRC
crc = crc24b(output_buffers[r],Kprime-24)>>8; crc = crc24b(output_buffers[r],Kprime-L)>>8;
output_buffers[r][(Kprime-24)>>3] = ((uint8_t*)&crc)[2]; output_buffers[r][(Kprime-L)>>3] = ((uint8_t*)&crc)[2];
output_buffers[r][1+((Kprime-24)>>3)] = ((uint8_t*)&crc)[1]; output_buffers[r][1+((Kprime-L)>>3)] = ((uint8_t*)&crc)[1];
output_buffers[r][2+((Kprime-24)>>3)] = ((uint8_t*)&crc)[0]; output_buffers[r][2+((Kprime-L)>>3)] = ((uint8_t*)&crc)[0];
} }
*/
k=0; k=0;
} }
} }
...@@ -192,12 +179,12 @@ else ...@@ -192,12 +179,12 @@ else
main() main()
{ {
unsigned int Kplus,Kminus,C,F,Bbytes; unsigned int K,C,F,Bbytes, Zout;
for (Bbytes=5; Bbytes<8; Bbytes++) { for (Bbytes=5; Bbytes<8; Bbytes++) {
nr_segmentation(0,0,Bbytes<<3,&C,&Kplus,&Kminus, &F); nr_segmentation(0,0,Bbytes<<3,&C,&K,&Zout, &F);
printf("Bbytes %d : C %d, Kplus %d, Kminus %d, F %d\n", printf("Bbytes %d : C %d, K %d, F %d\n",
Bbytes, C, Kplus, Kminus, F); Bbytes, C, K, F);
} }
} }
#endif #endif
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
#include "PHY/NR_REFSIG/nr_refsig.h" #include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/INIT/phy_init.h" #include "PHY/INIT/phy_init.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h" #include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "PHY/NR_TRANSPORT/nr_transport.h"
#include "RadioResourceConfigCommonSIB.h" #include "RadioResourceConfigCommonSIB.h"
#include "RadioResourceConfigDedicated.h" #include "RadioResourceConfigDedicated.h"
#include "TDD-Config.h" #include "TDD-Config.h"
...@@ -145,6 +146,27 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -145,6 +146,27 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value); nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver); nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
//PDSCH DMRS init
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t***));
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t**));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++){
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_MAX_NB_CODEWORDS*sizeof(uint32_t*));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t*)malloc16(NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
}
}
}
nr_init_pdsch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
/// Transport init necessary for NR synchro
init_nr_transport(gNB);
/* /*
lte_gold(fp,gNB->lte_gold_table,fp->Nid_cell); lte_gold(fp,gNB->lte_gold_table,fp->Nid_cell);
generate_pcfich_reg_mapping(fp); generate_pcfich_reg_mapping(fp);
...@@ -459,3 +481,69 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) ...@@ -459,3 +481,69 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config)
} }
void init_nr_transport(PHY_VARS_gNB *gNB) {
int i;
int j;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
LOG_I(PHY, "Initialise nr transport\n");
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffers for DLSCH, UE %d\n",i);
for (j=0; j<2; j++) {
gNB->dlsch[i][j] = new_gNB_dlsch(1,16,NSOFT,0,fp,cfg);
if (!gNB->dlsch[i][j]) {
LOG_E(PHY,"Can't get gNB dlsch structures for UE %d \n", i);
exit(-1);
}/* else {
gNB->dlsch[i][j]->rnti=0;
LOG_D(PHY,"dlsch[%d][%d] => %p rnti:%d\n",i,j,gNB->dlsch[i][j], gNB->dlsch[i][j]->rnti);
}*/
}
//LOG_I(PHY,"Allocating Transport Channel Buffer for ULSCH, UE %d\n",i);
//gNB->ulsch[1+i] = new_gNB_ulsch(MAX_TURBO_ITERATIONS,fp->N_RB_UL, 0);
/*if (!gNB->ulsch[1+i]) {
LOG_E(PHY,"Can't get gNB ulsch structures\n");
exit(-1);
}*/
// this is the transmission mode for the signalling channels
// this will be overwritten with the real transmission mode by the RRC once the UE is connected
//gNB->transmission_mode[i] = fp->nb_antenna_ports_gNB==1 ? 1 : 2;
}
// ULSCH for RA
//gNB->ulsch[0] = new_gNB_ulsch(MAX_TURBO_ITERATIONS, fp->N_RB_UL, 0);
/*if (!gNB->ulsch[0]) {
LOG_E(PHY,"Can't get gNB ulsch structures\n");
exit(-1);
}*/
gNB->dlsch_SI = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
LOG_D(PHY,"gNB %d.%d : SI %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_SI);
gNB->dlsch_ra = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
LOG_D(PHY,"gNB %d.%d : RA %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_ra);
gNB->dlsch_MCH = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
LOG_D(PHY,"gNB %d.%d : MCH %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_MCH);
gNB->rx_total_gain_dB=130;
for(i=0; i<NUMBER_OF_UE_MAX; i++)
gNB->mu_mimo_mode[i].dl_pow_off = 2;
gNB->check_for_total_transmissions = 0;
gNB->check_for_MUMIMO_transmissions = 0;
gNB->FULL_MUMIMO_transmissions = 0;
gNB->check_for_SUMIMO_transmissions = 0;
//fp->pucch_config_common.deltaPUCCH_Shift = 1;
}
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
#include <math.h> #include <math.h>
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/LTE_REFSIG/lte_refsig.h" //#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h" #include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "PHY/INIT/phy_init.h" #include "PHY/INIT/phy_init.h"
#include "PHY/NR_REFSIG/pss_nr.h" #include "PHY/NR_REFSIG/pss_nr.h"
...@@ -912,7 +912,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -912,7 +912,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
} }
/*
void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) { void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) {
int i,j,k; int i,j,k;
...@@ -920,25 +919,25 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) { ...@@ -920,25 +919,25 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) {
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) { for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
for (j=0; j<2; j++) { for (j=0; j<2; j++) {
for (k=0; k<2; k++) { for (k=0; k<2; k++) {
AssertFatal((ue->dlsch[k][i][j] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n"); AssertFatal((ue->dlsch[k][i][j] = new_nr_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n");
LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[i][j]); LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[i][j]);
} }
} }
AssertFatal((ue->ulsch[i] = new_ue_ulsch(ue->frame_parms.N_RB_UL, abstraction_flag))!=NULL,"Can't get ue ulsch structures\n"); //AssertFatal((ue->ulsch[i] = new_ue_ulsch(ue->frame_parms.N_RB_UL, abstraction_flag))!=NULL,"Can't get ue ulsch structures\n");
ue->dlsch_SI[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag); ue->dlsch_SI[i] = new_nr_ue_dlsch(1,1,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag);
ue->dlsch_ra[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag); ue->dlsch_ra[i] = new_nr_ue_dlsch(1,1,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag);
ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_eNB==1 ? 1 : 2; ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_eNB==1 ? 1 : 2;
} }
//ue->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1; //ue->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
ue->dlsch_MCH[0] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS_MBSFN,ue->frame_parms.N_RB_DL,0); ue->dlsch_MCH[0] = new_nr_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_LDPC_ITERATIONS_MBSFN,ue->frame_parms.N_RB_DL,0);
}*/ }
void phy_init_nr_top(PHY_VARS_NR_UE *ue) void phy_init_nr_top(PHY_VARS_NR_UE *ue)
{ {
......
...@@ -385,6 +385,7 @@ void nr_phy_config_request(NR_PHY_Config_t *gNB); ...@@ -385,6 +385,7 @@ void nr_phy_config_request(NR_PHY_Config_t *gNB);
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu); void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu);
void phy_free_nr_gNB(PHY_VARS_gNB *gNB); void phy_free_nr_gNB(PHY_VARS_gNB *gNB);
int l1_north_init_gNB(void); int l1_north_init_gNB(void);
void init_nr_transport(PHY_VARS_gNB *gNB);
void init_dfts(void); void init_dfts(void);
......
...@@ -58,9 +58,6 @@ char lte_cqi_snr_dB[15] = { -2, ...@@ -58,9 +58,6 @@ char lte_cqi_snr_dB[15] = { -2,
unsigned char ue_power_offsets[25] = {14,11,9,8,7,6,6,5,4,4,4,3,3,3,2,2,2,1,1,1,1,1,0,0,0}; unsigned char ue_power_offsets[25] = {14,11,9,8,7,6,6,5,4,4,4,3,3,3,2,2,2,1,1,1,1,1,0,0,0};
short conjugate[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
int qam64_table[8],qam16_table[4],qpsk_table[2]; int qam64_table[8],qam16_table[4],qpsk_table[2];
unsigned char cs_ri_normal[4] = {1,4,7,10}; unsigned char cs_ri_normal[4] = {1,4,7,10};
......
...@@ -44,7 +44,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -44,7 +44,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned char symbol = l;//+((7-frame_parms->Ncp)*(Ns&1)); ///symbol within sub-frame unsigned char symbol = l;//+((7-frame_parms->Ncp)*(Ns&1)); ///symbol within sub-frame
unsigned int nb_prefix_samples = (no_prefix ? 0 : frame_parms->nb_prefix_samples); unsigned int nb_prefix_samples = (no_prefix ? 0 : frame_parms->nb_prefix_samples);
unsigned int nb_prefix_samples0 = (no_prefix ? 0 : frame_parms->nb_prefix_samples0); unsigned int nb_prefix_samples0 = (no_prefix ? 0 : frame_parms->nb_prefix_samples0);
unsigned int subframe_offset;//,subframe_offset_F; //unsigned int subframe_offset;//,subframe_offset_F;
unsigned int slot_offset; unsigned int slot_offset;
//int i; //int i;
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10; unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
...@@ -52,13 +52,10 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -52,13 +52,10 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
//NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0]; //NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+516; uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+516;
uint16_t nb_rb_coreset = 24; uint16_t nb_rb_coreset = 24;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset; uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset+516;
uint16_t nb_rb_pdsch = 100; uint16_t nb_rb_pdsch = 50;
uint8_t p=0;
/*LTE_UE_DLSCH_t **dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id]; uint8_t l0 = 2;
unsigned char harq_pid = dlsch_ue[0]->current_harq_pid;
LTE_DL_UE_HARQ_t *dlsch0_harq = dlsch_ue[0]->harq_processes[harq_pid];
int uespec_pilot[9][1200];*/
void (*dft)(int16_t *,int16_t *, int); void (*dft)(int16_t *,int16_t *, int);
int tmp_dft_in[8192] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs int tmp_dft_in[8192] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
...@@ -102,11 +99,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -102,11 +99,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
} }
if (no_prefix) { if (no_prefix) {
subframe_offset = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_tti * (Ns>>1); slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot*frame_parms->slots_per_subframe) * (Ns>>1);
slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_tti>>1) * (Ns%2);
} else { } else {
subframe_offset = frame_parms->samples_per_tti * (Ns>>1); slot_offset = (frame_parms->samples_per_subframe) * (Ns>>1);
slot_offset = (frame_parms->samples_per_tti>>1) * (Ns%2);
} }
/*if (l<0 || l>=7-frame_parms->Ncp) { /*if (l<0 || l>=7-frame_parms->Ncp) {
...@@ -124,7 +119,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -124,7 +119,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) { for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int)); memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset + nb_prefix_samples0 + subframe_offset - SOFFSET; rx_offset = sample_offset + slot_offset + nb_prefix_samples0 - SOFFSET;
// Align with 256 bit // Align with 256 bit
// rx_offset = rx_offset&0xfffffff8; // rx_offset = rx_offset&0xfffffff8;
...@@ -156,11 +151,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -156,11 +151,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// + rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// +
// (frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1); // (frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1);
#ifdef DEBUG_FEP //#ifdef DEBUG_FEP
// if (ue->frame <100) // if (ue->frame <100)
LOG_I(PHY,"slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol, LOG_D(PHY,"slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples); nb_prefix_samples,nb_prefix_samples0,slot_offset,sample_offset,rx_offset,frame_length_samples);
#endif //#endif
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size)) if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((void *)&common_vars->rxdata[aa][frame_length_samples], memcpy((void *)&common_vars->rxdata[aa][frame_length_samples],
...@@ -190,7 +185,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -190,7 +185,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#ifdef DEBUG_FEP #ifdef DEBUG_FEP
// if (ue->frame <100) // if (ue->frame <100)
printf("slot_fep: frame %d: symbol %d rx_offset %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx, symbol,rx_offset); printf("slot_fep: frame %d: symbol %d rx_offset %d\n", ue->proc.proc_rxtx[(Ns)&1].frame_rx, symbol,rx_offset);
#endif #endif
} }
...@@ -266,12 +261,18 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -266,12 +261,18 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats); start_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
ue->frame_parms.nushift = (p>>1)&1;;
if (symbol ==l0)
nr_pdsch_channel_estimation(ue,eNB_id,0, nr_pdsch_channel_estimation(ue,eNB_id,0,
Ns, Ns,
p,
l, l,
symbol, symbol,
bwp_start_subcarrier, bwp_start_subcarrier,
nb_rb_pdsch); nb_rb_pdsch);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
......
...@@ -30,19 +30,11 @@ ...@@ -30,19 +30,11 @@
* \warning * \warning
*/ */
//#define DEBUG_DL_DMRS
//#define NR_PBCH_DMRS_LENGTH_DWORD 5 //#define NR_PBCH_DMRS_LENGTH_DWORD 5
//#define NR_PBCH_DMRS_LENGTH 144 //#define NR_PBCH_DMRS_LENGTH 144
#ifdef USER_MODE
#include <stdio.h>
#include <stdlib.h>
#endif
#include "refsig_defs_ue.h" #include "refsig_defs_ue.h"
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
//#include "nr_mod_table.h"
#include "common/utils/LOG/log.h"
/*Table 7.4.1.1.2-1/2 from 38.211 */ /*Table 7.4.1.1.2-1/2 from 38.211 */
int wf1[8][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,1}}; int wf1[8][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,1}};
...@@ -51,102 +43,27 @@ int wf2[12][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,1},{1,1},{1,-1 ...@@ -51,102 +43,27 @@ int wf2[12][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,1},{1,1},{1,-1
int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1}}; int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1}};
short nr_rx_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170}; short nr_rx_mod_table[14] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170};
short nr_rx_nmod_table[14] = {0,0,-23170,23170,23170,-23170,-23170,23170,-23170,-23170,23170,23170,23170,-23170};
/*int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset, int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned int Ns, unsigned int Ns,
unsigned int nr_gold_pdcch[7][20][3][10], unsigned int *nr_gold_pdsch,
int32_t *output, int32_t *output,
unsigned short p, unsigned short p,
int length_dmrs, unsigned char lp,
unsigned short nb_rb_coreset) unsigned short nb_pdsch_rb)
{ {
int32_t qpsk[4],n; int8_t w,config_type;
int w,ind,l,ind_dword,ind_qpsk_symb,kp,k; short *mod_table;
short pamp; unsigned char idx=0;
pamp = ONE_OVER_SQRT2_Q15;
// This includes complex conjugate for channel estimation
((short *)&qpsk[0])[0] = pamp;
((short *)&qpsk[0])[1] = -pamp;
((short *)&qpsk[1])[0] = -pamp;
((short *)&qpsk[1])[1] = -pamp;
((short *)&qpsk[2])[0] = pamp;
((short *)&qpsk[2])[1] = pamp;
((short *)&qpsk[3])[0] = -pamp;
((short *)&qpsk[3])[1] = pamp;
if (p==2000) {
for (n=0; n<nb_rb_coreset*3; n++) {
for (l =0; l<length_dmrs; l++){
for (kp=0; kp<3; kp++){
ind = 3*n+kp;
ind_dword = ind>>4;
ind_qpsk_symb = ind&0xf;
output[k] = qpsk[(nr_gold_pdcch[eNB_offset][Ns][l][ind_dword]>>(2*ind_qpsk_symb))&3];
#ifdef DEBUG_DL_DMRS
LOG_I(PHY,"Ns %d, p %d, ind_dword %d, ind_qpsk_symbol %d\n",
Ns,p,idx_dword,idx_qpsk_symb);
LOG_I(PHY,"index = %d\n",(nr_gold_pdsch[0][Ns][lprime][ind_dword]>>(2*ind_qpsk_symb))&3);
#endif
k++;
}
}
}
} else {
LOG_E(PHY,"Illegal PDCCH DMRS port %d\n",p);
}
return(0);
}*/
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdsch[2][20][2][21],
int32_t *output,
unsigned short p,
int length_dmrs,
unsigned short nb_rb_pdsch)
{
int32_t qpsk[4],nqpsk[4],*qpsk_p, n;
//int w,mprime,ind,l,ind_dword,ind_qpsk_symb,kp,lp, config_type, k;
int w,ind,ind_dword,ind_qpsk_symb,kp,lp, config_type, k=0;
short pamp;
typedef int array_of_w[2]; typedef int array_of_w[2];
array_of_w *wf; array_of_w *wf;
array_of_w *wt; array_of_w *wt;
config_type = 1; config_type = 0; //to be updated by higher layer
printf("dmrs config type %d port %d\n", config_type, p);
// Compute the correct pilot amplitude, sqrt_rho_b = Q3.13
pamp = ONE_OVER_SQRT2_Q15;
// This includes complex conjugate for channel estimation
((short *)&qpsk[0])[0] = pamp;
((short *)&qpsk[0])[1] = -pamp;
((short *)&qpsk[1])[0] = -pamp;
((short *)&qpsk[1])[1] = -pamp;
((short *)&qpsk[2])[0] = pamp;
((short *)&qpsk[2])[1] = pamp;
((short *)&qpsk[3])[0] = -pamp;
((short *)&qpsk[3])[1] = pamp;
((short *)&nqpsk[0])[0] = -pamp;
((short *)&nqpsk[0])[1] = pamp;
((short *)&nqpsk[1])[0] = pamp;
((short *)&nqpsk[1])[1] = pamp;
((short *)&nqpsk[2])[0] = -pamp;
((short *)&nqpsk[2])[1] = -pamp;
((short *)&nqpsk[3])[0] = pamp;
((short *)&nqpsk[3])[1] = -pamp;
wf = (config_type==0) ? wf1 : wf2; wf = (config_type==0) ? wf1 : wf2;
wt = (config_type==0) ? wt1 : wt2; wt = (config_type==0) ? wt1 : wt2;
...@@ -155,31 +72,26 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue, ...@@ -155,31 +72,26 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type); LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
if ((p>=1000) && (p<((config_type==0) ? 1008 : 1012))) { if ((p>=1000) && (p<((config_type==0) ? 1008 : 1012))) {
if (ue->frame_parms.Ncp == NORMAL) {
// r_n from 38.211 7.4.1.1 for (int i=0; i<nb_pdsch_rb*((config_type==0) ? 6:4); i++) {
for (n=0; n<nb_rb_pdsch*((config_type==0) ? 3:2); n++) {
for (lp =0; lp<length_dmrs; lp++){
for (kp=0; kp<2; kp++){
w = (wf[p-1000][kp])*(wt[p-1000][lp]);
qpsk_p = (w==1) ? qpsk : nqpsk;
ind = 2*n+kp;
ind_dword = ind>>4;
ind_qpsk_symb = ind&0xf;
output[k] = qpsk_p[(nr_gold_pdsch[0][Ns][lp][ind_dword]>>(2*ind_qpsk_symb))&3]; w = (wf[p-1000][i&1])*(wt[p-1000][lp]);
mod_table = (w==1) ? nr_rx_mod_table : nr_rx_nmod_table;
idx = ((((nr_gold_pdsch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdsch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
#ifdef DEBUG_DL_DMRS ((int16_t*)output)[i<<1] = mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
LOG_I(PHY,"Ns %d, p %d, ind_dword %d, ind_qpsk_symbol %d\n", ((int16_t*)output)[(i<<1)+1] = mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
Ns,p,idx_dword,idx_qpsk_symb); #ifdef DEBUG_PDSCH
LOG_I(PHY,"index = %d\n",(nr_gold_pdsch[0][Ns][lprime][ind_dword]>>(2*ind_qpsk_symb))&3); printf("nr_pdsch_dmrs_rx dmrs config type %d port %d nb_pdsch_rb %d\n", config_type, p, nb_pdsch_rb);
printf("wf[%d] = %d wt[%d]= %d\n", i&1, wf[p-1000][i&1], lp, wt[p-1000][lp]);
printf("i %d idx %d pdsch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdsch[(i<<1)>>5], (((nr_gold_pdsch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pdsch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1]);
#endif #endif
}
k++; } else {
} LOG_E(PHY,"extended cp not supported for PDSCH DMRS yet\n");
} }
}
} else { } else {
LOG_E(PHY,"Illegal p %d PDSCH DMRS port\n",p); LOG_E(PHY,"Illegal p %d PDSCH DMRS port\n",p);
} }
...@@ -251,3 +163,5 @@ int nr_pbch_dmrs_rx(int symbol,unsigned int *nr_gold_pbch,int32_t *output ) ...@@ -251,3 +163,5 @@ int nr_pbch_dmrs_rx(int symbol,unsigned int *nr_gold_pbch,int32_t *output )
return(0); return(0);
} }
...@@ -3,12 +3,38 @@ ...@@ -3,12 +3,38 @@
% 0 .. "0" % 0 .. "0"
% 1,2 .. BPSK(0),BPSK(1) % 1,2 .. BPSK(0),BPSK(1)
K = 1/sqrt(2);
% Amplitude for BPSK (\f$ 2^15 \times 1/\sqrt{2}\f$) % Amplitude for BPSK (\f$ 2^15 \times 1/\sqrt{2}\f$)
BPSK = 23170; BPSK = 23170;
% Amplitude for QPSK (\f$ 2^15 \times 1/\sqrt{2}\f$) % Amplitude for QPSK (\f$ 2^15 \times 1/\sqrt{2}\f$)
QPSK = 23170; QPSK = 23170;
% First Amplitude for QAM16 (\f$ 2^15 \times 2/\sqrt{10}\f$)
QAM16_n1 = 20724;
% Second Amplitude for QAM16 (\f$ 2^15 \times 1/\sqrt{10}\f$)
QAM16_n2 = 10362;
% First Amplitude for QAM64 (\f$ 2^15 \times 4/\sqrt{42}\f$)
QAM64_n1 = 20225;
% Second Amplitude for QAM64 (\f$ 2^15 \times 2/\sqrt{42}\f$)
QAM64_n2 = 10112;
% Third Amplitude for QAM64 (\f$ 2^15 \times 1/\sqrt{42}\f$)
QAM64_n3 = 5056;
% First Amplitude for QAM256 (\f$ 2^15 \times 8/\sqrt{170}\f$)
QAM256_n1 = 20105;
% Second Amplitude for QAM256 (\f$ 2^15 \times 4/\sqrt{170}\f$)
QAM256_n2 = 10052;
% Third Amplitude for QAM256 (\f$ 2^15 \times 2/\sqrt{170}\f$)
QAM256_n3 = 5026;
% Third Amplitude for QAM256 (\f$ 2^15 \times 1/\sqrt{170}\f$)
QAM256_n4 = 2513;
% BPSK % BPSK
for b = 0:1 for b = 0:1
bpsk_table(b+1) = (1 - 2*b)*BPSK + 1j*(1-2*b)*BPSK; bpsk_table(b+1) = (1 - 2*b)*BPSK + 1j*(1-2*b)*BPSK;
...@@ -17,12 +43,91 @@ end ...@@ -17,12 +43,91 @@ end
%% QPSK %% QPSK
for r=0:1 %0 -- 1 LS for r=0:1 %0 -- 1 LS
for j=0:1 %0 -- 1 MS for j=0:1 %0 -- 1 MS
%% Formula is dispalayed
qpsk_table(2*r+j+1) = ((1-r*2)*QPSK + 1j*(1-2*j)*QPSK); qpsk_table(2*r+j+1) = ((1-r*2)*QPSK + 1j*(1-2*j)*QPSK);
end end
end end
table = [ 0; bpsk_table(:); qpsk_table(:) ]; %% QAM16
for a=-1:2:1
for b=-1:2:1
index = (1+a) + (1+b)/2;
qam16_table(index+1) = -a*(QAM16_n1 + (b*QAM16_n2));
end
end
for b0=0:1
for b1=0:1
for b2=0:1
for b3=0:1
qam16_table2(b0*8+b1*4+b2*2+b3*1+1) = qam16_table(b0*2+b2*1+1) + 1j*qam16_table(b1*2+b3*1+1);
end
end
end
end
%% QAM64
for a=-1:2:1
for b=-1:2:1
for c=-1:2:1
index = (1+a)*2 + (1+b) + (1+c)/2;
qam64_table(index+1) = -a*(QAM64_n1 + b*(QAM64_n2 + (c*QAM64_n3)));
end
end
end
for b0=0:1
for b1=0:1
for b2=0:1
for b3=0:1
for b4=0:1
for b5=0:1
qam64_table2(b0*32+b1*16+b2*8+b3*4+b4*2+b5*1+1) = qam64_table(b0*4+b2*2+b4*1+1) + 1j*qam64_table(b1*4+b3*2+b5*1+1);
end
end
end
end
end
end
%%256QAM
%% QAM256 *******************************************************************************************
for a=-1:2:1
for b=-1:2:1
for c=-1:2:1
for d = -1:2:1
index = (1+a)*4 + (1+b)*2 + (1+c)+(1+d)/2;
qam256_table(index+1) = -a*(QAM256_n1 + b*(QAM256_n2 + (c*(QAM256_n3+d*QAM256_n4))));
end
end
end
end
for b0=0:1
for b1=0:1
for b2=0:1
for b3=0:1
for b4=0:1
for b5=0:1
for b6=0:1
for b7=0:1
%%qam64_table2(b0*32+b1*16+b2*8+b3*4+b4*2+b5*1+1) = qam64_table(b0*4+b2*2+b4*1+1) + 1j*qam64_table(b1*4+b3*2+b5*1+1);
qam256_table2(b0*128+b1*64+b2*32+b3*16+b4*8+b5*4+b6*2+b7*1+1) = qam256_table(b0*8+b2*4+b4*2+b6*1+1) + 1j*qam256_table(b1*8+b3*4+b5*2+b7*1+1);
end
end
end
end
end
end
end
end
table = round(K * [ 0; bpsk_table(:); qpsk_table(:);qam16_table2(:); qam64_table2(:);qam256_table2(:) ]);
%scatter (real(qam256_table2), imag(qam256_table2), 'x');
save mod_table.mat table save mod_table.mat table
table2 = zeros(1,length(table)*2); table2 = zeros(1,length(table)*2);
...@@ -33,7 +138,10 @@ fd = fopen("nr_mod_table.h","w"); ...@@ -33,7 +138,10 @@ fd = fopen("nr_mod_table.h","w");
fprintf(fd,"#define NR_MOD_TABLE_SIZE_SHORT %d\n", length(table)*2); fprintf(fd,"#define NR_MOD_TABLE_SIZE_SHORT %d\n", length(table)*2);
fprintf(fd,"#define NR_MOD_TABLE_BPSK_OFFSET %d\n", 1); fprintf(fd,"#define NR_MOD_TABLE_BPSK_OFFSET %d\n", 1);
fprintf(fd,"#define NR_MOD_TABLE_QPSK_OFFSET %d\n", 3); fprintf(fd,"#define NR_MOD_TABLE_QPSK_OFFSET %d\n", 3);
fprintf(fd,"short nr_mod_table[MOD_TABLE_SIZE_SHORT] = {"); fprintf(fd,"#define NR_MOD_TABLE_QAM16_OFFSET %d\n", 7);
fprintf(fd,"#define NR_MOD_TABLE_QAM64_OFFSET %d\n", 23);
fprintf(fd,"#define NR_MOD_TABLE_QAM256_OFFSET %d\n", 87);
fprintf(fd,"short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {");
fprintf(fd,"%d,",table2(1:end-1)); fprintf(fd,"%d,",table2(1:end-1));
fprintf(fd,"%d};\n",table2(end)); fprintf(fd,"%d};\n",table2(end));
fclose(fd); fclose(fd);
...@@ -65,7 +65,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid) ...@@ -65,7 +65,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) { for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1; reset = 1;
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1))&(((uint32_t)1<<31)-1); x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1));
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) { for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset); pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
...@@ -75,3 +75,30 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid) ...@@ -75,3 +75,30 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
} }
} }
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
{
uint32_t x1, x2;
uint8_t reset;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
uint16_t N_n_scid[NR_MAX_NB_CODEWORDS]={Nid, Nid}; // Not correct, appropriate scrambling IDs have to be updated to support DCI 1_1
uint8_t n_scid=0; // again works only for 1_0
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
for (uint8_t q=0; q<NR_MAX_NB_CODEWORDS; q++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
for (uint32_t n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdsch_dmrs[slot][symb][q][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
}
...@@ -123,6 +123,8 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDM ...@@ -123,6 +123,8 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDM
nid = n_idDMRS[nscid]; nid = n_idDMRS[nscid];
else else
nid = ue->frame_parms.Nid_cell; nid = ue->frame_parms.Nid_cell;
//printf("gold pdsch nid %d lbar %d\n",nid,lbar);
for (ns=0; ns<20; ns++) { for (ns=0; ns<20; ns++) {
...@@ -130,6 +132,8 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDM ...@@ -130,6 +132,8 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDM
x2tmp0 = ((14*ns+(lbar+l)+1)*((nid<<1)+1))<<17; x2tmp0 = ((14*ns+(lbar+l)+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit
//printf("ns %d gold pdsch x2 %d\n",ns,x2);
x1 = 1+ (1<<31); x1 = 1+ (1<<31);
x2=x2 ^ ((x2 ^ (x2>>1) ^ (x2>>2) ^ (x2>>3))<<31); x2=x2 ^ ((x2 ^ (x2>>1) ^ (x2>>2) ^ (x2>>3))<<31);
...@@ -143,12 +147,13 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDM ...@@ -143,12 +147,13 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDM
//printf("x1 : %x, x2 : %x\n",x1,x2); //printf("x1 : %x, x2 : %x\n",x1,x2);
} }
for (n=0; n<14; n++) { for (n=0; n<52; n++) {
x1 = (x1>>1) ^ (x1>>4); x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28); x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4); x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28); x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
ue->nr_gold_pdsch[nscid][ns][l][n] = x1^x2; ue->nr_gold_pdsch[nscid][ns][l][n] = x1^x2;
// if ((ns==2)&&(l==0))
//printf("n=%d : c %x\n",n,x1^x2); //printf("n=%d : c %x\n",n,x1^x2);
} }
......
#define NR_MOD_TABLE_SIZE_SHORT 14 #define NR_MOD_TABLE_SIZE_SHORT 686
#define NR_MOD_TABLE_BPSK_OFFSET 1 #define NR_MOD_TABLE_BPSK_OFFSET 1
#define NR_MOD_TABLE_QPSK_OFFSET 3 #define NR_MOD_TABLE_QPSK_OFFSET 3
short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,23170,-23170,-23170,23170,23170,23170,-23170,-23170,23170,-23170,-23170}; #define NR_MOD_TABLE_QAM16_OFFSET 7
#define NR_MOD_TABLE_QAM64_OFFSET 23
#define NR_MOD_TABLE_QAM256_OFFSET 87
short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,16384,16384,-16384,-16384,16384,16384,16384,-16384,-16384,16384,-16384,-16384,7327,7327,7327,21981,21981,7327,21981,21981,7327,-7327,7327,-21981,21981,-7327,21981,-21981,-7327,7327,-7327,21981,-21981,7327,-21981,21981,-7327,-7327,-7327,-21981,-21981,-7327,-21981,-21981,10726,10726,10726,3576,3576,10726,3576,3576,10726,17876,10726,25027,3576,17876,3576,25027,17876,10726,17876,3576,25027,10726,25027,3576,17876,17876,17876,25027,25027,17876,25027,25027,10726,-10726,10726,-3576,3576,-10726,3576,-3576,10726,-17876,10726,-25027,3576,-17876,3576,-25027,17876,-10726,17876,-3576,25027,-10726,25027,-3576,17876,-17876,17876,-25027,25027,-17876,25027,-25027,-10726,10726,-10726,3576,-3576,10726,-3576,3576,-10726,17876,-10726,25027,-3576,17876,-3576,25027,-17876,10726,-17876,3576,-25027,10726,-25027,3576,-17876,17876,-17876,25027,-25027,17876,-25027,25027,-10726,-10726,-10726,-3576,-3576,-10726,-3576,-3576,-10726,-17876,-10726,-25027,-3576,-17876,-3576,-25027,-17876,-10726,-17876,-3576,-25027,-10726,-25027,-3576,-17876,-17876,-17876,-25027,-25027,-17876,-25027,-25027,8886,8886,8886,12439,12439,8886,12439,12439,8886,5332,8886,1778,12439,5332,12439,1778,5332,8886,5332,12439,1778,8886,1778,12439,5332,5332,5332,1778,1778,5332,1778,1778,8886,19547,8886,15993,12439,19547,12439,15993,8886,23101,8886,26655,12439,23101,12439,26655,5332,19547,5332,15993,1778,19547,1778,15993,5332,23101,5332,26655,1778,23101,1778,26655,19547,8886,19547,12439,15993,8886,15993,12439,19547,5332,19547,1778,15993,5332,15993,1778,23101,8886,23101,12439,26655,8886,26655,12439,23101,5332,23101,1778,26655,5332,26655,1778,19547,19547,19547,15993,15993,19547,15993,15993,19547,23101,19547,26655,15993,23101,15993,26655,23101,19547,23101,15993,26655,19547,26655,15993,23101,23101,23101,26655,26655,23101,26655,26655,8886,-8886,8886,-12439,12439,-8886,12439,-12439,8886,-5332,8886,-1778,12439,-5332,12439,-1778,5332,-8886,5332,-12439,1778,-8886,1778,-12439,5332,-5332,5332,-1778,1778,-5332,1778,-1778,8886,-19547,8886,-15993,12439,-19547,12439,-15993,8886,-23101,8886,-26655,12439,-23101,12439,-26655,5332,-19547,5332,-15993,1778,-19547,1778,-15993,5332,-23101,5332,-26655,1778,-23101,1778,-26655,19547,-8886,19547,-12439,15993,-8886,15993,-12439,19547,-5332,19547,-1778,15993,-5332,15993,-1778,23101,-8886,23101,-12439,26655,-8886,26655,-12439,23101,-5332,23101,-1778,26655,-5332,26655,-1778,19547,-19547,19547,-15993,15993,-19547,15993,-15993,19547,-23101,19547,-26655,15993,-23101,15993,-26655,23101,-19547,23101,-15993,26655,-19547,26655,-15993,23101,-23101,23101,-26655,26655,-23101,26655,-26655,-8886,8886,-8886,12439,-12439,8886,-12439,12439,-8886,5332,-8886,1778,-12439,5332,-12439,1778,-5332,8886,-5332,12439,-1778,8886,-1778,12439,-5332,5332,-5332,1778,-1778,5332,-1778,1778,-8886,19547,-8886,15993,-12439,19547,-12439,15993,-8886,23101,-8886,26655,-12439,23101,-12439,26655,-5332,19547,-5332,15993,-1778,19547,-1778,15993,-5332,23101,-5332,26655,-1778,23101,-1778,26655,-19547,8886,-19547,12439,-15993,8886,-15993,12439,-19547,5332,-19547,1778,-15993,5332,-15993,1778,-23101,8886,-23101,12439,-26655,8886,-26655,12439,-23101,5332,-23101,1778,-26655,5332,-26655,1778,-19547,19547,-19547,15993,-15993,19547,-15993,15993,-19547,23101,-19547,26655,-15993,23101,-15993,26655,-23101,19547,-23101,15993,-26655,19547,-26655,15993,-23101,23101,-23101,26655,-26655,23101,-26655,26655,-8886,-8886,-8886,-12439,-12439,-8886,-12439,-12439,-8886,-5332,-8886,-1778,-12439,-5332,-12439,-1778,-5332,-8886,-5332,-12439,-1778,-8886,-1778,-12439,-5332,-5332,-5332,-1778,-1778,-5332,-1778,-1778,-8886,-19547,-8886,-15993,-12439,-19547,-12439,-15993,-8886,-23101,-8886,-26655,-12439,-23101,-12439,-26655,-5332,-19547,-5332,-15993,-1778,-19547,-1778,-15993,-5332,-23101,-5332,-26655,-1778,-23101,-1778,-26655,-19547,-8886,-19547,-12439,-15993,-8886,-15993,-12439,-19547,-5332,-19547,-1778,-15993,-5332,-15993,-1778,-23101,-8886,-23101,-12439,-26655,-8886,-26655,-12439,-23101,-5332,-23101,-1778,-26655,-5332,-26655,-1778,-19547,-19547,-19547,-15993,-15993,-19547,-15993,-15993,-19547,-23101,-19547,-26655,-15993,-23101,-15993,-26655,-23101,-19547,-23101,-15993,-26655,-19547,-26655,-15993,-23101,-23101,-23101,-26655,-26655,-23101,-26655,-26655};
...@@ -37,6 +37,6 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB); ...@@ -37,6 +37,6 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID @param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
*/ */
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid); void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
#endif #endif
...@@ -43,13 +43,12 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue, ...@@ -43,13 +43,12 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_corset); unsigned short nb_rb_corset);
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue, int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns, unsigned int Ns,
unsigned int nr_gold_pdsch[2][20][2][21], unsigned int *nr_gold_pdsch,
int32_t *output, int32_t *output,
unsigned short p, unsigned short p,
int length_dmrs, unsigned char lp,
unsigned short nb_rb_pdsch); unsigned short nb_pdsch_rb);
void nr_gold_pbch(PHY_VARS_NR_UE* ue); void nr_gold_pbch(PHY_VARS_NR_UE* ue);
......
...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
*/ */
/*! \file PHY/NR_TRANSPORT/nr_dci.c /*! \file PHY/NR_TRANSPORT/nr_dci.c
* \brief Implements DCI encoding/decoding and PDCCH TX/RX procedures (38.212/38.213/38.214). V15.2.0 2018-06. * \brief Implements DCI encoding and PDCCH TX procedures (38.212/38.213/38.214). V15.2.0 2018-06.
* \author Guy De Souza * \author Guy De Souza
* \date 2018 * \date 2018
* \version 0.1 * \version 0.1
...@@ -331,9 +331,5 @@ printf("\n"); ...@@ -331,9 +331,5 @@ printf("\n");
} }
} }
#ifdef DEBUG_DCI
write_output("txdataF_dci.m", "txdataF_dci", txdataF[0], frame_parms.samples_per_frame_wCP>>1, 1, 1);
#endif
return 0; return 0;
} }
...@@ -51,7 +51,8 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB, ...@@ -51,7 +51,8 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
int subframe, int subframe,
gNB_L1_rxtx_proc_t *proc, gNB_L1_rxtx_proc_t *proc,
NR_gNB_DCI_ALLOC_t *dci_alloc, NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_request_pdu_t *pdu); nfapi_nr_dl_config_dci_dl_pdu *pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu);
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m); void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m);
......
This diff is collapsed.
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/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/LTE_TRANSPORT/defs.h
* \brief data structures for PDSCH/DLSCH/PUSCH/ULSCH physical and transport channel descriptors (TX/RX)
* \author R. Knopp
* \date 2011
* \version 0.1
* \company Eurecom
* \email: raymond.knopp@eurecom.fr, florian.kaltenberger@eurecom.fr, oscar.tonelli@yahoo.it
* \note
* \warning
*/
#include "PHY/defs_gNB.h"
extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu);
void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config);
uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB);
uint16_t get_SLIV(uint8_t S, uint8_t L);
uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position);
void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type);
void nr_get_rbg_list(uint32_t bitmap, uint8_t n_rbg, uint8_t* rbg_list);
void nr_get_PRG_parms(NR_BWP_PARMS* bwp, NR_gNB_DCI_ALLOC_t dci_alloc, uint8_t prb_bundling_type);
uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx);
void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_config_request_t config);
void nr_pdsch_codeword_scrambling(uint8_t *in,
uint16_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out);
void nr_pdsch_codeword_modulation(uint32_t *in,
uint8_t Qm,
uint32_t length,
int16_t *out);
void nr_pdsch_layer_mapping(int16_t **mod_symbs,
uint8_t n_layers,
uint16_t n_symbs,
int16_t **tx_layers);
uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
NR_gNB_DCI_ALLOC_t dci_alloc,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
uint8_t subframe,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config);
/** \brief Computes available bits G.
@param nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs,uint8_t Qm, uint8_t Nl);
int nr_dlsch_encoding(unsigned char *a,
uint8_t subframe,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms);
void nr_emulate_dlsch_payload(uint8_t* payload, uint16_t size);
This diff is collapsed.
This diff is collapsed.
...@@ -40,7 +40,7 @@ ...@@ -40,7 +40,7 @@
//#define DEBUG_PBCH_ENCODING //#define DEBUG_PBCH_ENCODING
//#define DEBUG_PBCH_DMRS //#define DEBUG_PBCH_DMRS
#include "PHY/NR_REFSIG/nr_mod_table.h" extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4, uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4,
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31}; 9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
...@@ -445,11 +445,5 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -445,11 +445,5 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
} }
#ifdef DEBUG_PBCH
write_output("txdataF_pbch.m", "txdataF_pbch", txdataF[0], frame_parms->samples_per_frame_wCP>>1, 1, 1);
#endif
return 0; return 0;
} }
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/NR_TRANSPORT/nr_sch_dmrs.c
* \brief
* \author
* \date
* \version
* \company Eurecom
* \email:
* \note
* \warning
*/
#include "nr_sch_dmrs.h"
/*Table 7.4.1.1.2-1 and 7.4.1.1.2-2 38211 Columns: ap - CDM group - Delta - Wf(0) - Wf(1) - Wt(0) - Wt(1)*/
int8_t pdsch_dmrs_1[8][7] = {{0,0,0,1,1,1,1},
{1,0,0,1,-1,1,1},
{2,1,1,1,1,1,1},
{3,1,1,1,-1,1,1},
{4,0,0,1,1,1,-1},
{5,0,0,1,-1,1,-1},
{6,1,1,1,1,1,-1},
{7,1,1,1,-1,1,-1}};
int8_t pdsch_dmrs_2[12][7] = {{0,0,0,1,1,1,1},
{1,0,0,1,-1,1,1},
{2,1,2,1,1,1,1},
{3,1,2,1,-1,1,1},
{4,2,4,1,1,1,1},
{5,2,4,1,-1,1,1},
{6,0,0,1,1,1,-1},
{7,0,0,1,-1,1,-1},
{8,1,2,1,1,1,-1},
{9,1,2,1,-1,1,-1},
{10,2,4,1,1,1,-1},
{11,2,4,1,-1,1,-1}};
void get_l_prime(uint8_t *l_prime, uint8_t n_symbs) {
for (int i=0; i<n_symbs; i++)
*(l_prime+i) = i;
}
void get_antenna_ports(uint8_t *ap, uint8_t n_symbs, uint8_t config) {
if (config == NFAPI_NR_DMRS_TYPE1)
for (int i=0; i<(4+((n_symbs-1)<<2)); i++)
*(ap+i) = i;
else
for (int i=0; i<(7+((n_symbs-1)<<2)); i++)
*(ap+i) = i;
}
void get_Wt(int8_t *Wt, uint8_t ap, uint8_t config) {
for (int i=0; i<2; i++)
*(Wt+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][3+i]):(pdsch_dmrs_2[ap][3+i]);
}
void get_Wf(int8_t *Wf, uint8_t ap, uint8_t config) {
for (int i=0; i<2; i++)
*(Wf+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][5+i]):(pdsch_dmrs_2[ap][5+i]);
}
uint8_t get_delta(uint8_t ap, uint8_t config) {
return ((config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][2]):(pdsch_dmrs_2[ap][2]));
}
uint8_t get_l0(uint8_t config, uint8_t dmrs_typeA_position) {
return ((config==NFAPI_NR_DMRS_TYPE1)?dmrs_typeA_position:0);
}
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/NR_TRANSPORT/nr_sch_dmrs.c
* \brief
* \author
* \date
* \version
* \company Eurecom
* \email:
* \note
* \warning
*/
#include "PHY/defs_gNB.h"
#define NR_PDSCH_DMRS_ANTENNA_PORT0 1000
#define NR_PDSCH_DMRS_NB_ANTENNA_PORTS 12
void get_l_prime(uint8_t *l_prime, uint8_t n_symbs);
void get_antenna_ports(uint8_t *ap, uint8_t n_symbs, uint8_t config);
void get_Wt(int8_t *Wt, uint8_t ap, uint8_t config);
void get_Wf(int8_t *Wf, uint8_t ap, uint8_t config);
uint8_t get_delta(uint8_t ap, uint8_t config);
uint8_t get_l0(uint8_t config, uint8_t dmrs_typeA_position);
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.0 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/LTE_TRANSPORT/dlsch_coding.c
* \brief Top-level routines for implementing LDPC-coded (DLSCH) transport channels from 38-212, 15.2
* \author H.Wang
* \date 2018
* \version 0.1
* \company Eurecom
* \email:
* \note
* \warning
*/
#include "nr_dlsch.h"
/// Target code rate tables indexed by Imcs
uint16_t nr_target_code_rate_table1[29] = {120, 157, 193, 251, 308, 379, 449, 526, 602, 679, 340, 378, 434, 490, 553, \
616, 658, 438, 466, 517, 567, 616, 666, 719, 772, 822, 873, 910, 948};
// Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point
uint16_t nr_target_code_rate_table2[28] = {120, 193, 308, 449, 602, 378, 434, 490, 553, 616, 658, 466, 517, 567, \
616, 666, 719, 772, 822, 873, 1365, 711, 754, 797, 841, 885, 1833, 948};
uint16_t nr_target_code_rate_table3[29] = {30, 40, 50, 64, 78, 99, 120, 157, 193, 251, 308, 379, 449, 526, 602, 340, \
378, 434, 490, 553, 616, 438, 466, 517, 567, 616, 666, 719, 772};
uint16_t nr_tbs_table[93] = {24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128, 136, 144, 152, 160, 168, 176, 184, 192, 208, 224, 240, 256, 272, 288, 304, 320, \
336, 352, 368, 384, 408, 432, 456, 480, 504, 528, 552, 576, 608, 640, 672, 704, 736, 768, 808, 848, 888, 928, 984, 1032, 1064, 1128, 1160, 1192, 1224, 1256, \
1288, 1320, 1352, 1416, 1480, 1544, 1608, 1672, 1736, 1800, 1864, 1928, 2024, 2088, 2152, 2216, 2280, 2408, 2472, 2536, 2600, 2664, 2728, 2792, 2856, 2976, \
3104, 3240, 3368, 3496, 3624, 3752, 3824};
uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 1:
return (((Imcs<10)||(Imcs==29))?2:((Imcs<17)||(Imcs==30))?4:((Imcs<29)||(Imcs==31))?6:-1);
break;
case 2:
return (((Imcs<5)||(Imcs==28))?2:((Imcs<11)||(Imcs==29))?4:((Imcs<20)||(Imcs==30))?6:((Imcs<28)||(Imcs==31))?8:-1);
break;
case 3:
return (((Imcs<15)||(Imcs==29))?2:((Imcs<21)||(Imcs==30))?4:((Imcs<29)||(Imcs==31))?6:-1);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
}
}
uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 1:
return (nr_target_code_rate_table1[Imcs]);
break;
case 2:
return (nr_target_code_rate_table2[Imcs]);
break;
case 3:
return (nr_target_code_rate_table3[Imcs]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
}
}
static inline uint8_t is_codeword_disabled(uint8_t format, uint8_t Imcs, uint8_t rv) {
return ((format==NFAPI_NR_DL_DCI_FORMAT_1_1)&&(Imcs==26)&&(rv==1));
}
static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8_t rnti_type, uint8_t ss_type) {
if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM256) && (dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1) && ((rnti_type==NFAPI_NR_RNTI_C)||(rnti_type==NFAPI_NR_RNTI_CS)))
return 2;
else if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM64_LOW_SE) && (rnti_type!=NFAPI_NR_RNTI_new) && (rnti_type==NFAPI_NR_RNTI_C) && (ss_type==NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC))
return 3;
else if (rnti_type==NFAPI_NR_RNTI_new)
return 3;
else if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM256) && (rnti_type==NFAPI_NR_RNTI_CS) && (dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1))
return 2; // Condition mcs_table not configured in sps_config necessary here but not yet implemented
/*else if((mcs_table == NFAPI_NR_MCS_TABLE_QAM64_LOW_SE) && (rnti_type==NFAPI_NR_RNTI_CS))
* table_idx = 3;
* Note: the commented block refers to the case where the mcs_table is from sps_config*/
else
return 1;
}
void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_config_request_t config) {
LOG_I(MAC, "TBS calculation\n");
nfapi_nr_dl_config_pdcch_parameters_rel15_t params_rel15 = dci_pdu.pdcch_params_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_rel15 = &dlsch_pdu->dlsch_pdu_rel15;
uint8_t rnti_type = params_rel15.rnti_type;
uint8_t dci_format = params_rel15.dci_format;
uint8_t ss_type = params_rel15.search_space_type;
uint8_t N_PRB_oh = ((rnti_type==NFAPI_NR_RNTI_SI)||(rnti_type==NFAPI_NR_RNTI_RA)||(rnti_type==NFAPI_NR_RNTI_P))? 0 : \
(config.pdsch_config.x_overhead.value);
uint8_t N_PRB_DMRS = (config.pdsch_config.dmrs_type.value == NFAPI_NR_DMRS_TYPE1)?6:4; //This only works for antenna port 1000
uint8_t mcs_table = config.pdsch_config.mcs_table.value;
uint8_t N_sh_symb = dlsch_rel15->nb_symbols;
uint8_t Imcs = dlsch_rel15->mcs_idx;
uint16_t N_RE_prime = NR_NB_SC_PER_RB*N_sh_symb - N_PRB_DMRS - N_PRB_oh;
LOG_I(MAC, "N_RE_prime %d for %d symbols %d DMRS per PRB and %d overhead\n", N_RE_prime, N_sh_symb, N_PRB_DMRS, N_PRB_oh);
uint16_t N_RE, Ninfo, Ninfo_prime, C, TBS=0, R;
uint8_t table_idx, Qm, n, scale;
table_idx = get_table_idx(mcs_table, dci_format, rnti_type, ss_type);
scale = ((table_idx==2)&&((Imcs==20)||(Imcs==26)))?11:10;
N_RE = min(156, N_RE_prime)*dlsch_rel15->n_prb;
R = nr_get_code_rate(Imcs, table_idx);
Qm = nr_get_Qm(Imcs, table_idx);
Ninfo = (N_RE*R*Qm*dlsch_rel15->nb_layers)>>scale;
if (Ninfo <= 3824) {
n = max(3, (log2(Ninfo)-6));
Ninfo_prime = max(24, (Ninfo>>n)<<n);
for (int i=0; i<93; i++)
if (nr_tbs_table[i] >= Ninfo_prime) {
TBS = nr_tbs_table[i];
break;
}
}
else {
n = log2(Ninfo-24)-5;
Ninfo_prime = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
if (R<256) {
C = CEILIDIV((Ninfo_prime+24),3816);
TBS = (C<<3)*CEILIDIV((Ninfo_prime+24),(C<<3)) - 24;
}
else {
if (Ninfo_prime>8424) {
C = CEILIDIV((Ninfo_prime+24),8424);
TBS = (C<<3)*CEILIDIV((Ninfo_prime+24),(C<<3)) - 24;
}
else
TBS = ((CEILIDIV((Ninfo_prime+24),8))<<3) - 24;
}
}
dlsch_rel15->coding_rate = R;
dlsch_rel15->modulation_order = Qm;
dlsch_rel15->transport_block_size = TBS;
dlsch_rel15->nb_re_dmrs = N_PRB_DMRS;
dlsch_rel15->nb_mod_symbols = N_RE_prime*dlsch_rel15->n_prb*dlsch_rel15->nb_codewords;
LOG_I(MAC, "TBS %d : N_RE %d N_PRB_DMRS %d N_sh_symb %d N_PRB_oh %d Ninfo %d Ninfo_prime %d R %d Qm %d table %d scale %d nb_symbols %d\n",
TBS, N_RE, N_PRB_DMRS, N_sh_symb, N_PRB_oh, Ninfo, Ninfo_prime, R, Qm, table_idx, scale, dlsch_rel15->nb_mod_symbols);
}
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs, uint8_t Qm, uint8_t Nl) {
uint32_t G;
G = ((NR_NB_SC_PER_RB*nb_symb_sch)-(nb_re_dmrs*length_dmrs))*nb_rb*Qm*Nl;
return(G);
}
...@@ -106,4 +106,11 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -106,4 +106,11 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
*/ */
void nr_init_pbch_interleaver(uint8_t *interleaver); void nr_init_pbch_interleaver(uint8_t *interleaver);
NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
unsigned char Mdlharq,
uint32_t Nsoft,
uint8_t abstraction_flag,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_config_request_t *config);
#endif /*__NR_TRANSPORT__H__*/ #endif /*__NR_TRANSPORT__H__*/
...@@ -33,6 +33,15 @@ ...@@ -33,6 +33,15 @@
#ifndef __NR_TRANSPORT_COMMON_PROTO__H__ #ifndef __NR_TRANSPORT_COMMON_PROTO__H__
#define __NR_TRANSPORT_COMMON_PROTO__H__ #define __NR_TRANSPORT_COMMON_PROTO__H__
#define MAX_NUM_NR_DLSCH_SEGMENTS 32
#define MAX_NUM_NR_ULSCH_SEGMENTS MAX_NUM_NR_DLSCH_SEGMENTS
#define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
#define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
#define MAX_NUM_NR_CHANNEL_BITS (14*273*12*6) // 14 symbols, 273 RB
#define MAX_NUM_NR_RE (14*273*12)
// Functions below implement minor procedures from 38-214 // Functions below implement minor procedures from 38-214
/** \brief Computes Q based on I_MCS PDSCH and when 'MCS-Table-PDSCH' is set to "256QAM". Implements Table 5.1.3.1-2 from 38.214. /** \brief Computes Q based on I_MCS PDSCH and when 'MCS-Table-PDSCH' is set to "256QAM". Implements Table 5.1.3.1-2 from 38.214.
......
...@@ -90,7 +90,7 @@ short filt8_l0[8] = { ...@@ -90,7 +90,7 @@ short filt8_l0[8] = {
16384,8192,0,0,0,0,0,0}; 16384,8192,0,0,0,0,0,0};
short filt8_mr0[8] = { short filt8_mr0[8] = {
0,8192,16384,8192,0,-8192,0,0}; 0,0,0,8192,16384,8192,0,-8192};
short filt8_r0[8] = { short filt8_r0[8] = {
0,8192,16384,24576,0,0,0,0}; 0,8192,16384,24576,0,0,0,0};
...@@ -98,6 +98,9 @@ short filt8_r0[8] = { ...@@ -98,6 +98,9 @@ short filt8_r0[8] = {
short filt8_m0[8] = { short filt8_m0[8] = {
0,8192,16384,8192,0,0,0,0}; 0,8192,16384,8192,0,0,0,0};
short filt8_mm0[8]= {
0,0,0,8192,16384,8192,0,0};
short filt8_l1[8] = { short filt8_l1[8] = {
24576,16384,0,0,0,0,0,0}; 24576,16384,0,0,0,0,0,0};
...@@ -109,3 +112,6 @@ short filt8_r1[8] = { ...@@ -109,3 +112,6 @@ short filt8_r1[8] = {
short filt8_m1[8] = { short filt8_m1[8] = {
0,0,8192,16384,8192,0,0,0}; 0,0,8192,16384,8192,0,0,0};
short filt8_mm1[8]= {
0,0,0,0,8192,16384,8192,0};
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