Commit 7cbc0dc1 authored by WEI-TAI CHEN's avatar WEI-TAI CHEN

fix some warning

parent b0bc5e65
...@@ -45,7 +45,7 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB, ...@@ -45,7 +45,7 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
AssertFatal(dl_config_pdu->bch_pdu_rel15.length == 3, "BCH PDU has length %d != 3\n", AssertFatal(dl_config_pdu->bch_pdu_rel15.length == 3, "BCH PDU has length %d != 3\n",
dl_config_pdu->bch_pdu_rel15.length); dl_config_pdu->bch_pdu_rel15.length);
//LOG_D(PHY,"bch_pdu: %x,%x,%x\n",sdu[0],sdu[1],sdu[2]); LOG_D(PHY,"bch_pdu: %x,%x,%x\n",sdu[0],sdu[1],sdu[2]);
gNB->pbch_pdu[0] = sdu[2]; gNB->pbch_pdu[0] = sdu[2];
gNB->pbch_pdu[1] = sdu[1]; gNB->pbch_pdu[1] = sdu[1];
gNB->pbch_pdu[2] = sdu[0]; gNB->pbch_pdu[2] = sdu[0];
......
This diff is collapsed.
...@@ -45,7 +45,7 @@ extern RAN_CONTEXT_t RC; ...@@ -45,7 +45,7 @@ extern RAN_CONTEXT_t RC;
void mac_top_init_gNB(void) void mac_top_init_gNB(void)
{ {
module_id_t i; module_id_t i,j;
int list_el; int list_el;
UE_list_t *UE_list; UE_list_t *UE_list;
gNB_MAC_INST *nrmac; gNB_MAC_INST *nrmac;
...@@ -73,7 +73,7 @@ void mac_top_init_gNB(void) ...@@ -73,7 +73,7 @@ void mac_top_init_gNB(void)
RC.nrmac[i]->Mod_id = i; RC.nrmac[i]->Mod_id = i;
/*
for (j = 0; j < MAX_NUM_CCs; j++) { for (j = 0; j < MAX_NUM_CCs; j++) {
RC.nrmac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.nrmac[i]->dl_config_pdu_list[j]; RC.nrmac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.nrmac[i]->dl_config_pdu_list[j];
RC.nrmac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.nrmac[i]->ul_config_pdu_list[j]; RC.nrmac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.nrmac[i]->ul_config_pdu_list[j];
...@@ -85,7 +85,7 @@ void mac_top_init_gNB(void) ...@@ -85,7 +85,7 @@ void mac_top_init_gNB(void)
RC.nrmac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.nrmac[i]->tx_request_pdu[j]; RC.nrmac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.nrmac[i]->tx_request_pdu[j];
RC.nrmac[i]->ul_handle = 0; RC.nrmac[i]->ul_handle = 0;
} }
*/
}//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++) }//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
......
...@@ -263,7 +263,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) ...@@ -263,7 +263,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
// clear DL/UL info for new scheduling round // clear DL/UL info for new scheduling round
clear_nfapi_information(RC.nrmac[module_id],CC_id,UL_info->frame,UL_info->subframe); clear_nr_nfapi_information(RC.nrmac[module_id],CC_id,UL_info->frame,UL_info->subframe);
handle_nr_rach(UL_info); handle_nr_rach(UL_info);
......
...@@ -20,9 +20,9 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP, ...@@ -20,9 +20,9 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
uint8_t *const buffer_pP ){ uint8_t *const buffer_pP ){
asn_enc_rval_t enc_rval; asn_enc_rval_t enc_rval;
SRB_INFO *Srb_info; //SRB_INFO *Srb_info;
uint8_t Sdu_size = 0; //uint8_t Sdu_size = 0;
uint8_t sfn = (uint8_t)((frameP>>2)&0xff); uint8_t sfn = (uint8_t)((frameP>>4)&0xff);
#ifdef DEBUG_RRC #ifdef DEBUG_RRC
int i; int i;
......
...@@ -205,7 +205,7 @@ uint8_t do_MIB_NR(rrc_gNB_carrier_data_t *carrier, ...@@ -205,7 +205,7 @@ uint8_t do_MIB_NR(rrc_gNB_carrier_data_t *carrier,
mib->message.choice.mib = CALLOC(1,sizeof(struct NR_MIB)); mib->message.choice.mib = CALLOC(1,sizeof(struct NR_MIB));
memset(mib->message.choice.mib,0,sizeof(struct NR_MIB)); memset(mib->message.choice.mib,0,sizeof(struct NR_MIB));
//36.331 SFN BIT STRING (SIZE (8) , 38.331 SFN BIT STRING (SIZE (6)) //36.331 SFN BIT STRING (SIZE (8) , 38.331 SFN BIT STRING (SIZE (6))
uint8_t sfn = (uint8_t)((frame>>2)&0x3f); uint8_t sfn = (uint8_t)((frame>>4)&0xff);
mib->message.choice.mib->systemFrameNumber.buf = &sfn; mib->message.choice.mib->systemFrameNumber.buf = &sfn;
mib->message.choice.mib->systemFrameNumber.size = 1; mib->message.choice.mib->systemFrameNumber.size = 1;
mib->message.choice.mib->systemFrameNumber.bits_unused=0; mib->message.choice.mib->systemFrameNumber.bits_unused=0;
......
...@@ -197,12 +197,12 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam ...@@ -197,12 +197,12 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam
return 0; return 0;
} }
/// NR disabling /// NR disabling
/*
// **************************************** // ****************************************
// Common RX procedures subframe n // Common RX procedures subframe n
T(T_gNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->subframe_tx)); T(T_gNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->subframe_tx));
/*
// if this is IF5 or 3GPP_gNB // if this is IF5 or 3GPP_gNB
if (gNB && gNB->RU_list && gNB->RU_list[0] && gNB->RU_list[0]->function < NGFI_RAU_IF4p5) { if (gNB && gNB->RU_list && gNB->RU_list[0] && gNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->subframe_rx); wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->subframe_rx);
...@@ -212,7 +212,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam ...@@ -212,7 +212,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam
if (nfapi_mode == 0 || nfapi_mode == 1) { if (nfapi_mode == 0 || nfapi_mode == 1) {
phy_procedures_gNB_uespec_RX(gNB, proc, no_relay ); phy_procedures_gNB_uespec_RX(gNB, proc, no_relay );
} }
*/
pthread_mutex_lock(&gNB->UL_INFO_mutex); pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = proc->frame_rx; gNB->UL_INFO.frame = proc->frame_rx;
...@@ -220,10 +220,10 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam ...@@ -220,10 +220,10 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam
gNB->UL_INFO.module_id = gNB->Mod_id; gNB->UL_INFO.module_id = gNB->Mod_id;
gNB->UL_INFO.CC_id = gNB->CC_id; gNB->UL_INFO.CC_id = gNB->CC_id;
gNB->if_inst->UL_indication(&gNB->UL_INFO); gNB->if_inst->NR_UL_indication(&gNB->UL_INFO);
pthread_mutex_unlock(&gNB->UL_INFO_mutex); pthread_mutex_unlock(&gNB->UL_INFO_mutex);
*/
/// end /// end
// ***************************************** // *****************************************
// TX processing for subframe n+sf_ahead // TX processing for subframe n+sf_ahead
......
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