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常顺宇
OpenXG-RAN
Commits
972749b3
Commit
972749b3
authored
Apr 19, 2016
by
Rohit Gupta
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updates to USRP timing after changing master clock
parent
cac9ac40
Changes
1
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-2
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+2
-2
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targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
View file @
972749b3
...
...
@@ -619,7 +619,7 @@ extern "C" {
case
15360000
:
s
->
usrp
->
set_master_clock_rate
(
30.72e06
);
openair0_cfg
[
0
].
samples_per_packet
=
2048
;
openair0_cfg
[
0
].
tx_sample_advance
=
1
5
3
;
openair0_cfg
[
0
].
tx_sample_advance
=
1
0
3
;
openair0_cfg
[
0
].
tx_bw
=
20e6
;
openair0_cfg
[
0
].
rx_bw
=
20e6
;
openair0_cfg
[
0
].
tx_scheduling_advance
=
10240
;
...
...
@@ -627,7 +627,7 @@ extern "C" {
case
7680000
:
s
->
usrp
->
set_master_clock_rate
(
30.72e6
);
openair0_cfg
[
0
].
samples_per_packet
=
1024
;
openair0_cfg
[
0
].
tx_sample_advance
=
153
;
openair0_cfg
[
0
].
tx_sample_advance
=
90
;
openair0_cfg
[
0
].
tx_bw
=
20e6
;
openair0_cfg
[
0
].
rx_bw
=
20e6
;
openair0_cfg
[
0
].
tx_scheduling_advance
=
5
*
openair0_cfg
[
0
].
samples_per_packet
;
...
...
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