Commit 9ec1bea7 authored by Rahul Gottipati's avatar Rahul Gottipati

Add option for 256 qam mcs table in nr_dlsim

parent a7229204
...@@ -153,7 +153,7 @@ void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dm ...@@ -153,7 +153,7 @@ void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dm
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of /* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of
dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */ dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */
int g_mcsIndex = -1, g_rbStart = -1, g_rbSize = -1; int g_mcsIndex = -1, g_mcsTableIdx = 0, g_rbStart = -1, g_rbSize = -1;
void nr_dlsim_preprocessor(module_id_t module_id, void nr_dlsim_preprocessor(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
...@@ -181,10 +181,11 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -181,10 +181,11 @@ void nr_dlsim_preprocessor(module_id_t module_id,
sched_ctrl->rbSize = g_rbSize; sched_ctrl->rbSize = g_rbSize;
sched_ctrl->mcs = g_mcsIndex; sched_ctrl->mcs = g_mcsIndex;
sched_ctrl->time_domain_allocation = 2; sched_ctrl->time_domain_allocation = 2;
sched_ctrl->mcsTableIdx = 0; sched_ctrl->mcsTableIdx = g_mcsTableIdx;
AssertFatal(sched_ctrl->rbStart >= 0, "invalid rbStart %d\n", sched_ctrl->rbStart); AssertFatal(sched_ctrl->rbStart >= 0, "invalid rbStart %d\n", sched_ctrl->rbStart);
AssertFatal(sched_ctrl->rbSize > 0, "invalid rbSize %d\n", sched_ctrl->rbSize); AssertFatal(sched_ctrl->rbSize > 0, "invalid rbSize %d\n", sched_ctrl->rbSize);
AssertFatal(sched_ctrl->mcs >= 0, "invalid sched_ctrl->mcs %d\n", sched_ctrl->mcs); AssertFatal(sched_ctrl->mcs >= 0, "invalid sched_ctrl->mcs %d\n", sched_ctrl->mcs);
AssertFatal(sched_ctrl->mcsTableIdx >= 0 && sched_ctrl->mcsTableIdx <= 2, "invalid sched_ctrl->mcsTableIdx %d\n", sched_ctrl->mcsTableIdx);
sched_ctrl->numDmrsCdmGrpsNoData = 1; sched_ctrl->numDmrsCdmGrpsNoData = 1;
} }
...@@ -280,7 +281,7 @@ int main(int argc, char **argv) ...@@ -280,7 +281,7 @@ int main(int argc, char **argv)
FILE *scg_fd=NULL; FILE *scg_fd=NULL;
while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:m:w:T:U:")) != -1) { while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:m:w:T:U:q")) != -1) {
switch (c) { switch (c) {
case 'f': case 'f':
scg_fd = fopen(optarg,"r"); scg_fd = fopen(optarg,"r");
...@@ -452,6 +453,11 @@ int main(int argc, char **argv) ...@@ -452,6 +453,11 @@ int main(int argc, char **argv)
g_mcsIndex = atoi(optarg); g_mcsIndex = atoi(optarg);
break; break;
case 'q':
g_mcsTableIdx = 1;
get_softmodem_params()->use_256qam_table = 1;
break;
case 'm': case 'm':
mu = atoi(optarg); mu = atoi(optarg);
break; break;
...@@ -507,6 +513,7 @@ int main(int argc, char **argv) ...@@ -507,6 +513,7 @@ int main(int argc, char **argv)
printf("-c Start symbol for PDSCH (fixed for now)\n"); printf("-c Start symbol for PDSCH (fixed for now)\n");
printf("-j Number of symbols for PDSCH (fixed for now)\n"); printf("-j Number of symbols for PDSCH (fixed for now)\n");
printf("-e MSC index\n"); printf("-e MSC index\n");
printf("-q Use 2nd MCS table (256 QAM table) for PDSCH\n");
printf("-t Acceptable effective throughput (in percentage)\n"); printf("-t Acceptable effective throughput (in percentage)\n");
printf("-T Enable PTRS, arguments list L_PTRS{0,1,2} K_PTRS{2,4}, e.g. -T 2 0 2 \n"); printf("-T Enable PTRS, arguments list L_PTRS{0,1,2} K_PTRS{2,4}, e.g. -T 2 0 2 \n");
printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2}, e.g. -U 2 0 2 \n"); printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2}, e.g. -U 2 0 2 \n");
......
...@@ -3859,8 +3859,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3859,8 +3859,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->rate_matching_ind = dci->rate_matching_indicator.val; dlsch_config_pdu_1_1->rate_matching_ind = dci->rate_matching_indicator.val;
/* ZP_CSI_RS_TRIGGER */ /* ZP_CSI_RS_TRIGGER */
dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val; dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val;
/* MCS TABLE INDEX */
dlsch_config_pdu_1_1->mcs_table = (pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0;
/* MCS (for transport block 1)*/ /* MCS (for transport block 1)*/
dlsch_config_pdu_1_1->mcs = dci->mcs; dlsch_config_pdu_1_1->mcs = dci->mcs;
// Basic sanity check for MCS value to check for a false or erroneous DCI // Basic sanity check for MCS value to check for a false or erroneous DCI
...@@ -4014,7 +4012,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -4014,7 +4012,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dl_config->number_pdus = dl_config->number_pdus + 1; dl_config->number_pdus = dl_config->number_pdus + 1;
/* TODO same calculation for MCS table as done in UL */ /* TODO same calculation for MCS table as done in UL */
dlsch_config_pdu_1_1->mcs_table = 0; dlsch_config_pdu_1_1->mcs_table = (pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0;
/*PTRS configuration */ /*PTRS configuration */
if(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) { if(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) {
valid_ptrs_setup = set_dl_ptrs_values(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup, valid_ptrs_setup = set_dl_ptrs_values(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup,
......
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