Commit c51cb3f4 authored by ChiehChun's avatar ChiehChun Committed by Robert Schmidt

Enable 2 UL slots

parent dcd591bd
...@@ -363,7 +363,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -363,7 +363,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
#define BIT(x) (1 << (x)) #define BIT(x) (1 << (x))
const uint64_t dlsch_in_slot_bitmap = BIT( 1) | BIT( 2) | BIT( 3) | BIT( 4) | BIT( 5) | BIT( 6) const uint64_t dlsch_in_slot_bitmap = BIT( 1) | BIT( 2) | BIT( 3) | BIT( 4) | BIT( 5) | BIT( 6)
| BIT(11) | BIT(12) | BIT(13) | BIT(14) | BIT(15) | BIT(16); | BIT(11) | BIT(12) | BIT(13) | BIT(14) | BIT(15) | BIT(16);
const uint64_t ulsch_in_slot_bitmap = BIT(8); const uint64_t ulsch_in_slot_bitmap = BIT( 8) | BIT(18);
memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0 memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1 memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1
...@@ -425,7 +425,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -425,7 +425,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
// This schedules the DCI for Uplink and subsequently PUSCH // This schedules the DCI for Uplink and subsequently PUSCH
if (slot < 10) { {
nr_schedule_ulsch(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, ulsch_in_slot_bitmap); nr_schedule_ulsch(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, ulsch_in_slot_bitmap);
} }
......
...@@ -401,8 +401,8 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, ...@@ -401,8 +401,8 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id,
tda, tda,
tdaList->list.count); tdaList->list.count);
int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu); int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu);
const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
const int sched_slot = (slot + K2) % num_slots_per_tdd; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
/* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE /* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE
* limitations). Note that if K2 or the TDD configuration is changed, below * limitations). Note that if K2 or the TDD configuration is changed, below
* conditions might exclude each other and never be true */ * conditions might exclude each other and never be true */
......
...@@ -781,8 +781,8 @@ bool nr_simple_ulsch_preprocessor(module_id_t module_id, ...@@ -781,8 +781,8 @@ bool nr_simple_ulsch_preprocessor(module_id_t module_id,
tdaList->list.count); tdaList->list.count);
int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu); int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu);
const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
const int sched_slot = (slot + K2) % num_slots_per_tdd; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
if (!is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot)) if (!is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot))
return false; return false;
......
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