Commit c9e28a2b authored by Guy De Souza's avatar Guy De Souza

pdcch_dmrs malloc fix

parent c34e33bf
...@@ -121,8 +121,11 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -121,8 +121,11 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
nr_polar_init(&fp->pbch_polar_params, 1); nr_polar_init(&fp->pbch_polar_params, 1);
//PDCCH DMRS init //PDCCH DMRS init
pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**)); pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
for (int slot=0; slot<fp->slots_per_frame; slot++) for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot); pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++)
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_LENGTH_DWORD);
}
nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value); nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
...@@ -278,7 +281,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB) ...@@ -278,7 +281,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{ {
// NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms; // NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
nfapi_config_request_t *cfg = &gNB->gNB_config; nfapi_config_request_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
NR_gNB_COMMON* const common_vars = &gNB->common_vars; NR_gNB_COMMON* const common_vars = &gNB->common_vars;
LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars; LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS* const srs_vars = gNB->srs_vars; LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
...@@ -297,9 +299,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB) ...@@ -297,9 +299,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(common_vars->rxdataF); free_and_zero(common_vars->rxdataF);
// PDCCH DMRS sequences // PDCCH DMRS sequences
pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
for (int slot=0; slot<fp->slots_per_frame; slot++)
free_and_zero(pdcch_dmrs[slot]);
free_and_zero(pdcch_dmrs); free_and_zero(pdcch_dmrs);
// Channel estimates for SRS // Channel estimates for SRS
......
...@@ -56,7 +56,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB) ...@@ -56,7 +56,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid) void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
{ {
uint32_t n, x1, x2; uint32_t x1, x2;
uint8_t reset = 1; uint8_t reset = 1;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs; uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
......
...@@ -291,7 +291,7 @@ typedef struct PHY_VARS_gNB_s { ...@@ -291,7 +291,7 @@ typedef struct PHY_VARS_gNB_s {
uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD]; uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PDCCH DMRS sequence /// PDCCH DMRS sequence
uint32_t **nr_gold_pdcch_dmrs[NR_MAX_PDCCH_DMRS_LENGTH_DWORD]; uint32_t ***nr_gold_pdcch_dmrs;
/// Indicator set to 0 after first SR /// Indicator set to 0 after first SR
uint8_t first_sr[NUMBER_OF_UE_MAX]; uint8_t first_sr[NUMBER_OF_UE_MAX];
......
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