Commit f47dcb19 authored by Thomas Schlichter's avatar Thomas Schlichter

enable TA update in phy-test mode

parent 2029cb93
...@@ -412,38 +412,40 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -412,38 +412,40 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
rnti = 0;//UE_RNTI(module_idP, i); rnti = 0;//UE_RNTI(module_idP, i);
CC_id = 0;//UE_PCCID(module_idP, i); CC_id = 0;//UE_PCCID(module_idP, i);
} //END if (UE_list->active[i]) } //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++) } //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
*/ */
// This schedules MIB
if((slot_txP == 0) && (frame_txP & 7) == 0){
schedule_nr_mib(module_idP, frame_txP, slot_txP);
}
// TbD once RACH is available, start ta_timer when UE is connected // This schedules MIB
#if 0 if((slot_txP == 0) && (frame_txP & 7) == 0){
NR_UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id]; schedule_nr_mib(module_idP, frame_txP, slot_txP);
if (ue_sched_ctl->ta_timer) ue_sched_ctl->ta_timer--; }
if (ue_sched_ctl->ta_timer == 0) {
gNB->ta_command = ue_sched_ctl->ta_update;
/* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */
ue_sched_ctl->ta_timer = 100;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
/* MAC CE flag indicating TA length */
gNB->ta_len = 2;
}
#endif
// Phytest scheduling // Phytest scheduling
if (get_softmodem_params()->phy_test && slot_txP==1){ if (get_softmodem_params()->phy_test) {
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, pucch_sched, NULL); NR_UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
// TbD once RACH is available, start ta_timer when UE is connected
if (ue_sched_ctl->ta_timer)
ue_sched_ctl->ta_timer--;
if (ue_sched_ctl->ta_timer == 0) {
gNB->ta_command = ue_sched_ctl->ta_update;
/* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */
ue_sched_ctl->ta_timer = 100;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
/* MAC CE flag indicating TA length */
gNB->ta_len = 2;
}
if (slot_txP == 1){
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, pucch_sched, NULL);
// resetting ta flag // resetting ta flag
gNB->ta_len = 0; gNB->ta_len = 0;
} }
}
/* /*
// Allocate CCEs for good after scheduling is done // Allocate CCEs for good after scheduling is done
......
...@@ -276,7 +276,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -276,7 +276,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
#endif #endif
if (sduP != NULL){ if (sduP != NULL){
//UE_scheduling_control->ta_update = timing_advance; UE_scheduling_control->ta_update = timing_advance;
LOG_D(MAC, "Received PDU at MAC gNB \n"); LOG_D(MAC, "Received PDU at MAC gNB \n");
nr_process_mac_pdu(gnb_mod_idP, CC_idP, frameP, sduP, sdu_lenP); nr_process_mac_pdu(gnb_mod_idP, CC_idP, frameP, sduP, sdu_lenP);
} }
......
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