Commit 31cc7a07 authored by Jaroslava Fiedlerova's avatar Jaroslava Fiedlerova

Merge remote-tracking branch 'origin/fix-ue-rx-tx-thread-synchro' into integration_2024_w02

parents 40d24a09 4a12bdc3
......@@ -44,6 +44,37 @@
#define NR_NB_SC_PER_RB 12
#define NR_MAX_NUM_LCID 32
#define NR_MAX_NUM_QFI 64
#define RNTI_NAMES /* see 38.321 Table 7.1-2 RNTI usage */ \
R(TYPE_C_RNTI_) /* Cell RNTI */ \
R(TYPE_CS_RNTI_) /* Configured Scheduling RNTI */ \
R(TYPE_TC_RNTI_) /* Temporary C-RNTI */ \
R(TYPE_P_RNTI_) /* Paging RNTI */ \
R(TYPE_SI_RNTI_) /* System information RNTI */ \
R(TYPE_RA_RNTI_) /* Random Access RNTI */ \
R(TYPE_SP_CSI_RNTI_) /* Semipersistent CSI reporting on PUSCH */ \
R(TYPE_SFI_RNTI_) /* Slot Format Indication on the given cell */ \
R(TYPE_INT_RNTI_) /* Indication pre-emption in DL */ \
R(TYPE_TPC_PUSCH_RNTI_) /* PUSCH power control */ \
R(TYPE_TPC_PUCCH_RNTI_) /* PUCCH power control */ \
R(TYPE_TPC_SRS_RNTI_) \
R(TYPE_MCS_C_RNTI_)
#define R(k) k ,
typedef enum { RNTI_NAMES } nr_rnti_type_t;
#undef R
#define R(k) \
case k: \
return #k;
static inline const char *rnti_types(nr_rnti_type_t rr)
{
switch (rr) {
RNTI_NAMES
default:
return "Not existing RNTI type";
}
}
#undef R
typedef enum {
nr_FR1 = 0,
......
......@@ -494,7 +494,7 @@ static void UE_synch(void *arg) {
static void RU_write(nr_rxtx_thread_data_t *rxtxD) {
PHY_VARS_NR_UE *UE = rxtxD->UE;
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
const UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
void *txp[NB_ANTENNAS_TX];
int slot = proc->nr_slot_tx;
......@@ -541,19 +541,48 @@ static void RU_write(nr_rxtx_thread_data_t *rxtxD) {
void processSlotTX(void *arg) {
nr_rxtx_thread_data_t *rxtxD = (nr_rxtx_thread_data_t *) arg;
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
const UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE;
nr_phy_data_tx_t phy_data = {0};
LOG_D(PHY,"%d.%d => slot type %d\n", proc->frame_tx, proc->nr_slot_tx, proc->tx_slot_type);
if (proc->tx_slot_type == NR_UPLINK_SLOT || proc->tx_slot_type == NR_MIXED_SLOT){
if (rxtxD->tx_wait_for_dlsch)
LOG_D(PHY, "enter wait for tx, slot %d, nb events to wait %d; ", proc->nr_slot_tx, rxtxD->tx_wait_for_dlsch);
// wait for rx slots to send indication (if any) that DLSCH decoding is finished
for(int i=0; i < rxtxD->tx_wait_for_dlsch; i++) {
notifiedFIFO_elt_t *res = pullNotifiedFIFO(UE->tx_resume_ind_fifo[proc->nr_slot_tx]);
notifiedFIFO_elt_t *res = pullNotifiedFIFO(UE->tx_resume_ind_fifo + proc->nr_slot_tx);
delNotifiedFIFO_elt(res);
}
LOG_D(PHY, "completed wait for tx, slot %d\n", proc->nr_slot_tx);
/*
This herafter code is costing some perfomance for a check that should be useless
But, we face today several bugs arround the matching between events in UE->tx_resume_ind_fifo[slot]
and the corresponding tx_wait_for_dlsch[slot]
The algorithm is we accumlate the actions that should end before processing a tx slot in tx_wait_for_dlsch[slot]
later, other threads push events in UE->tx_resume_ind_fifo[slot]
so, the tx encoding starts only when related actions are done (mainly DLSCH ACK/NACK to encode PUCCH)
if there is a bug that misses to send a event in UE->tx_resume_ind_fifo[slot], the process hangs, we detect the issue
if there is a bug that makes a extra event in UE->tx_resume_ind_fifo[slot], and if we drop the hereafter check
the system runs with random race conditions, very hard to debug
Likely we should later remove completly UE->tx_resume_ind_fifo with notifications,
instead,
we may run in place the processSlotTX() when the conditions are met (when a decreasing tx_wait_for_dlsch[slot] will become 0)
It will remove the condition signals (for a thread safe semaphore or counter) and make the system simpler
This require also other modifications to
remove txFifo that is also a big issue
add out of order RF board sending, because,
if we encode and send tx slot as soon as we can,
it will be thrown out of order, especially in TDD mode
*/
notifiedFIFO_elt_t *res = pollNotifiedFIFO(UE->tx_resume_ind_fifo + proc->nr_slot_tx);
if (res)
LOG_E(NR_PHY,
"Internal error: extra event on Tx waiting queue for slot %d, event comes from rx slot %d\n",
proc->nr_slot_tx,
*(int *)NotifiedFifoData(res));
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
......@@ -580,10 +609,8 @@ void processSlotTX(void *arg) {
RU_write(rxtxD);
}
nr_phy_data_t UE_dl_preprocessing(PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc)
static void UE_dl_preprocessing(PHY_VARS_NR_UE *UE, const UE_nr_rxtx_proc_t *proc, int *tx_wait_for_dlsch, nr_phy_data_t *phy_data)
{
nr_phy_data_t phy_data = {0};
if (IS_SOFTMODEM_NOS1 || get_softmodem_params()->sa) {
// Start synchronization with a target gNB
......@@ -607,23 +634,24 @@ nr_phy_data_t UE_dl_preprocessing(PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc)
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
nr_downlink_indication_t dl_indication;
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, &phy_data);
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, phy_data);
UE->if_inst->dl_indication(&dl_indication);
}
uint64_t a=rdtsc_oai();
pbch_pdcch_processing(UE, proc, &phy_data);
if (phy_data.dlsch[0].active) {
pbch_pdcch_processing(UE, proc, phy_data);
if (phy_data->dlsch[0].active && phy_data->dlsch[0].rnti_type == TYPE_C_RNTI_) {
// indicate to tx thread to wait for DLSCH decoding
const int ack_nack_slot = (proc->nr_slot_rx + phy_data.dlsch[0].dlsch_config.k1_feedback) % UE->frame_parms.slots_per_frame;
UE->tx_wait_for_dlsch[ack_nack_slot]++;
const int ack_nack_slot = (proc->nr_slot_rx + phy_data->dlsch[0].dlsch_config.k1_feedback) % UE->frame_parms.slots_per_frame;
LOG_D(NR_PHY, "Adding one event to wait after decoding slot %d, for futre tx slot %d\n", proc->nr_slot_rx, ack_nack_slot);
tx_wait_for_dlsch[ack_nack_slot]++;
}
LOG_D(PHY, "In %s: slot %d, time %llu\n", __FUNCTION__, proc->nr_slot_rx, (rdtsc_oai()-a)/3500);
}
ue_ta_procedures(UE, proc->nr_slot_tx, proc->frame_tx);
return phy_data;
return;
}
void UE_dl_processing(void *arg) {
......@@ -764,12 +792,11 @@ void *UE_thread(void *arg)
const int nb_slot_frame = UE->frame_parms.slots_per_frame;
int absolute_slot=0, decoded_frame_rx=INT_MAX, trashed_frames=0;
initNotifiedFIFO(&UE->phy_config_ind);
int tx_wait_for_dlsch[NR_MAX_SLOTS_PER_FRAME];
int num_ind_fifo = nb_slot_frame;
for(int i=0; i < num_ind_fifo; i++) {
UE->tx_wait_for_dlsch[num_ind_fifo] = 0;
UE->tx_resume_ind_fifo[i] = malloc(sizeof(*UE->tx_resume_ind_fifo[i]));
initNotifiedFIFO(UE->tx_resume_ind_fifo[i]);
initNotifiedFIFO(UE->tx_resume_ind_fifo + i);
}
while (!oai_exit) {
......@@ -836,6 +863,13 @@ void *UE_thread(void *arg)
decoded_frame_rx++;
// we do ++ first in the regular processing, so it will be begin of frame;
absolute_slot = decoded_frame_rx * nb_slot_frame - 1;
// We have resynchronized, maybe after RF loss so we need to purge any existing context
memset(tx_wait_for_dlsch, 0, sizeof(tx_wait_for_dlsch));
for (int i = 0; i < num_ind_fifo; i++) {
notifiedFIFO_elt_t *res;
while ((res = pollNotifiedFIFO(UE->tx_resume_ind_fifo + i)))
delNotifiedFIFO_elt(res);
}
continue;
}
......@@ -913,26 +947,27 @@ void *UE_thread(void *arg)
if (curMsg.proc.nr_slot_tx == 0)
nr_ue_rrc_timer_trigger(UE->Mod_id, curMsg.proc.frame_tx, curMsg.proc.gNB_id);
// RX slot processing. We launch and forget.
notifiedFIFO_elt_t *newRx = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_rx, NULL, UE_dl_processing);
nr_rxtx_thread_data_t *curMsgRx = (nr_rxtx_thread_data_t *)NotifiedFifoData(newRx);
*curMsgRx = (nr_rxtx_thread_data_t){.proc = curMsg.proc, .UE = UE};
UE_dl_preprocessing(UE, &curMsgRx->proc, tx_wait_for_dlsch, &curMsgRx->phy_data);
pushTpool(&(get_nrUE_params()->Tpool), newRx);
// Start TX slot processing here. It runs in parallel with RX slot processing
notifiedFIFO_elt_t *newElt = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_tx, &txFifo, processSlotTX);
nr_rxtx_thread_data_t *curMsgTx = (nr_rxtx_thread_data_t *) NotifiedFifoData(newElt);
// in current code, DURATION_RX_TO_TX constant is the limit to get UL data to encode from a RX slot
notifiedFIFO_elt_t *newTx = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_tx, &txFifo, processSlotTX);
nr_rxtx_thread_data_t *curMsgTx = (nr_rxtx_thread_data_t *)NotifiedFifoData(newTx);
curMsgTx->proc = curMsg.proc;
curMsgTx->writeBlockSize = writeBlockSize;
curMsgTx->proc.timestamp_tx = writeTimestamp;
curMsgTx->UE = UE;
curMsgTx->tx_wait_for_dlsch = UE->tx_wait_for_dlsch[curMsgTx->proc.nr_slot_tx];
UE->tx_wait_for_dlsch[curMsgTx->proc.nr_slot_tx] = 0;
pushTpool(&(get_nrUE_params()->Tpool), newElt);
// RX slot processing. We launch and forget.
newElt = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_rx, NULL, UE_dl_processing);
nr_rxtx_thread_data_t *curMsgRx = (nr_rxtx_thread_data_t *) NotifiedFifoData(newElt);
curMsgRx->proc = curMsg.proc;
curMsgRx->UE = UE;
curMsgRx->phy_data = UE_dl_preprocessing(UE, &curMsg.proc);
pushTpool(&(get_nrUE_params()->Tpool), newElt);
curMsgTx->tx_wait_for_dlsch = tx_wait_for_dlsch[curMsgTx->proc.nr_slot_tx];
tx_wait_for_dlsch[curMsgTx->proc.nr_slot_tx] = 0;
pushTpool(&(get_nrUE_params()->Tpool), newTx);
// Wait for TX slot processing to finish
// Should be removed when bugs, race conditions, will be fixed
notifiedFIFO_elt_t *res;
res = pullTpool(&txFifo, &(get_nrUE_params()->Tpool));
if (res == NULL)
......
......@@ -239,22 +239,6 @@ typedef struct {
nfapi_vendor_extension_tlv_t vendor_extension;
} nfapi_nr_config_request_t;
typedef enum {
NFAPI_NR_RNTI_new = 0,
NFAPI_NR_RNTI_C,
NFAPI_NR_RNTI_RA,
NFAPI_NR_RNTI_P,
NFAPI_NR_RNTI_CS,
NFAPI_NR_RNTI_TC,
NFAPI_NR_RNTI_SP_CSI,
NFAPI_NR_RNTI_SI,
NFAPI_NR_RNTI_SFI,
NFAPI_NR_RNTI_INT,
NFAPI_NR_RNTI_TPC_PUSCH,
NFAPI_NR_RNTI_TPC_PUCCH,
NFAPI_NR_RNTI_TPC_SRS
} nfapi_nr_rnti_type_e;
typedef enum {
NFAPI_NR_USS_FORMAT_0_0_AND_1_0,
NFAPI_NR_USS_FORMAT_0_1_AND_1_1,
......
......@@ -49,12 +49,12 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
int reset_freq_est);
int nr_slot_fep(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
int sample_offset,
bool pbch_decoded,
......
......@@ -35,7 +35,7 @@
#endif*/
int nr_slot_fep(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
......@@ -114,7 +114,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
int sample_offset,
bool pbch_decoded,
......
......@@ -76,7 +76,7 @@ void insert_sss_nr(int16_t *sss_time,
NR_DL_FRAME_PARMS *frame_parms);
bool rx_sss_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int32_t *tot_metric,
uint8_t *phase_max,
int *freq_offset_sss,
......
......@@ -74,7 +74,7 @@ int nr_prs_channel_estimation(uint8_t gNB_id,
uint8_t rsc_id,
uint8_t rep_num,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
NR_DL_FRAME_PARMS *frame_params,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
......@@ -628,7 +628,7 @@ int nr_prs_channel_estimation(uint8_t gNB_id,
}
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
int dmrss,
NR_UE_SSB *current_ssb,
......@@ -782,7 +782,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
int estimateSz,
struct complex16 dl_ch_estimates[][estimateSz],
struct complex16 dl_ch_estimates_time[][ue->frame_parms.ofdm_symbol_size],
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
int dmrss,
uint8_t ssb_index,
......@@ -1054,7 +1054,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
}
void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
fapi_nr_coreset_t *coreset,
uint16_t first_carrier_offset,
......@@ -1606,7 +1606,7 @@ void NFAPI_NR_DMRS_TYPE2_average_prb(NR_DL_FRAME_PARMS *frame_parms,
#endif
}
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned short p,
unsigned char symbol,
unsigned char nscid,
......
......@@ -37,7 +37,7 @@ int nr_prs_channel_estimation(uint8_t gNB_id,
uint8_t rsc_id,
uint8_t rep_num,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
NR_DL_FRAME_PARMS *frame_params,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
......@@ -48,7 +48,7 @@ void peak_estimator(int32_t *buffer, int32_t buf_len, int32_t *peak_idx, int32_t
\brief This function performs channel estimation including frequency and temporal interpolation
*/
void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
fapi_nr_coreset_t *coreset,
uint16_t first_carrier_offset,
......@@ -58,7 +58,7 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
int dmrss,
NR_UE_SSB *current_ssb,
......@@ -68,7 +68,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
int estimateSz,
struct complex16 dl_ch_estimates[][estimateSz],
struct complex16 dl_ch_estimates_time[][ue->frame_parms.ofdm_symbol_size],
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
int dmrss,
uint8_t ssb_index,
......@@ -76,7 +76,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
unsigned short p,
unsigned char symbol,
unsigned char nscid,
......@@ -100,20 +100,20 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
unsigned char clear,
short coef);
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t *dlsch,
uint32_t pdsch_est_size,
int32_t dl_ch_estimates[][pdsch_est_size]);
void nr_ue_ssb_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t gNB_index,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
void nr_ue_rrc_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
......
......@@ -75,7 +75,7 @@ float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index)
}
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t *dlsch,
uint32_t pdsch_est_size,
int32_t dl_ch_estimates[][pdsch_est_size])
......@@ -180,9 +180,9 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
// - RX Gain dB
void nr_ue_ssb_rsrp_measurements(PHY_VARS_NR_UE *ue,
int ssb_index,
UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) {
const UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
int k_start = 56;
int k_end = 183;
int slot = proc->nr_slot_rx;
......@@ -235,9 +235,9 @@ void nr_ue_ssb_rsrp_measurements(PHY_VARS_NR_UE *ue,
// Measurement units:
// - psd_awgn (AWGN power spectral density): dBm/Hz
void nr_ue_rrc_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]){
const UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
uint8_t k;
int slot = proc->nr_slot_rx;
int aarx;
......@@ -300,11 +300,12 @@ void nr_ue_rrc_measurements(PHY_VARS_NR_UE *ue,
LOG_D(PHY, "In [%s][slot:%d] NF USRP %d dB\n", __FUNCTION__, slot, nf_usrp);
#endif
LOG_D(PHY, "In [%s][slot:%d] Noise Level %d (digital level %d dB, noise power spectral density %f dBm/RE)\n",
__FUNCTION__,
slot,
ue->measurements.n0_power_tot,
ue->measurements.n0_power_tot_dB,
ue->measurements.n0_power_tot_dB + 30 - 10*log10(pow(2, 30)) - dB_fixed(ue->frame_parms.ofdm_symbol_size) - ((int)rx_gain - (int)rx_gain_offset));
LOG_D(PHY,
"In [%s][slot:%d] Noise Level %d (digital level %d dB, noise power spectral density %f dBm/RE)\n",
__FUNCTION__,
slot,
ue->measurements.n0_power_tot,
ue->measurements.n0_power_tot_dB,
ue->measurements.n0_power_tot_dB + 30 - 10 * log10(pow(2, 30)) - dB_fixed(ue->frame_parms.ofdm_symbol_size)
- ((int)rx_gain - (int)rx_gain_offset));
}
......@@ -807,8 +807,10 @@ int nr_csi_im_power_estimation(const PHY_VARS_NR_UE *ue,
return 0;
}
int nr_ue_csi_im_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) {
int nr_ue_csi_im_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
int gNB_id = proc->gNB_id;
if(!ue->csiim_vars[gNB_id]->active) {
return -1;
......@@ -852,7 +854,9 @@ static nfapi_nr_dl_tti_csi_rs_pdu_rel15_t convert_csirs_pdu(const fapi_nr_dl_con
return dl_tti_csi_rs_pdu;
}
void nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
void nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
int gNB_id = proc->gNB_id;
......
......@@ -609,13 +609,13 @@ void nr_pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
}
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) {
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
uint8_t log2_maxh, aarx;
......@@ -739,8 +739,6 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
return (0);
}
void nr_pdcch_unscrambling(int16_t *e_rx,
uint16_t scrambling_RNTI,
uint32_t length,
......@@ -805,11 +803,11 @@ static uint16_t nr_dci_false_detection(uint64_t *dci,
}
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) {
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15)
{
//int gNB_id = 0;
int16_t tmp_e[16*108];
rnti_t n_rnti;
......@@ -892,5 +890,3 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
}
return(dci_ind->number_of_dcis);
}
......@@ -73,11 +73,11 @@ void nr_dlsch_unscrambling(int16_t *llr, uint32_t size, uint8_t q, uint32_t Nid,
static bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue,
notifiedFIFO_elt_t *req,
notifiedFIFO_t *nf_p,
bool last,
const bool last,
int b_size,
uint8_t b[b_size],
int *num_seg_ok,
UE_nr_rxtx_proc_t *proc)
const UE_nr_rxtx_proc_t *proc)
{
ldpcDecode_ue_t *rdata = (ldpcDecode_ue_t*) NotifiedFifoData(req);
NR_DL_UE_HARQ_t *harq_process = rdata->harq_process;
......@@ -264,7 +264,7 @@ static void nr_processDLSegment(void *arg)
}
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
......@@ -425,7 +425,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
rdata->offset = offset;
rdata->dlsch = dlsch;
rdata->dlsch_id = 0;
rdata->proc = proc;
rdata->proc = *proc;
reset_meas(&rdata->ts_deinterleave);
reset_meas(&rdata->ts_rate_unmatch);
reset_meas(&rdata->ts_ldpc_decode);
......
......@@ -49,8 +49,8 @@
int32_t nr_dlsch_demod_shift = 0;
//int16_t interf_unaw_shift = 13;
//#define DEBUG_HARQ
//#define DEBUG_PHY
// #define DEBUG_HARQ(a...) printf(a)
#define DEBUG_HARQ(...)
//#define DEBUG_DLSCH_DEMOD
//#define DEBUG_PDSCH_RX
......@@ -233,7 +233,7 @@ void nr_dlsch_detection_mrc(uint32_t rx_size_symbol,
/* Main Function */
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
unsigned char symbol,
unsigned char first_symbol_flag,
......@@ -267,36 +267,19 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
NR_UE_COMMON *common_vars = &ue->common_vars;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
PHY_NR_MEASUREMENTS *measurements = &ue->measurements;
int frame = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
int gNB_id = proc->gNB_id;
const int frame = proc->frame_rx;
const int nr_slot_rx = proc->nr_slot_rx;
const int gNB_id = proc->gNB_id;
int avg[16];
// int avg_0[2];
// int avg_1[2];
uint8_t slot = 0;
unsigned char aatx=0,aarx=0;
int avgs = 0;// rb;
NR_DL_UE_HARQ_t *dlsch0_harq, *dlsch1_harq = NULL;
int32_t codeword_TB0 = -1;
int32_t codeword_TB1 = -1;
//to be updated higher layer
unsigned short start_rb = 0;
unsigned short nb_rb_pdsch = 50;
//int16_t *pllr_symbol_cw0_deint;
//int16_t *pllr_symbol_cw1_deint;
//uint16_t bundle_L = 2;
int32_t median[16];
uint32_t nb_re_pdsch;
uint16_t startSymbIdx=0;
uint16_t nbSymb=0;
uint16_t pduBitmap=0x0;
uint32_t nb_re_pdsch = -1;
NR_DL_UE_HARQ_t *dlsch0_harq, *dlsch1_harq = NULL;
dlsch0_harq = &ue->dl_harq_processes[0][harq_pid];
if (NR_MAX_NB_LAYERS>4)
dlsch1_harq = &ue->dl_harq_processes[1][harq_pid];
......@@ -311,75 +294,61 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
dlsch0_harq = &ue->dl_harq_processes[codeword_TB0][harq_pid];
dlsch1_harq = &ue->dl_harq_processes[codeword_TB1][harq_pid];
#ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming both TBs are active, in cw0 %d and cw1 %d \n", codeword_TB0, codeword_TB1);
#endif
DEBUG_HARQ("[DEMOD] I am assuming both TBs are active, in cw0 %d and cw1 %d \n", codeword_TB0, codeword_TB1);
} else if ((dlsch0_harq->status == ACTIVE) && (dlsch1_harq->status != ACTIVE) ) {
codeword_TB0 = dlsch0_harq->codeword;
dlsch0_harq = &ue->dl_harq_processes[codeword_TB0][harq_pid];
dlsch1_harq = NULL;
#ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming only TB0 is active, in cw %d \n", codeword_TB0);
#endif
DEBUG_HARQ("[DEMOD] I am assuming only TB0 is active, in cw %d \n", codeword_TB0);
} else if ((dlsch0_harq->status != ACTIVE) && (dlsch1_harq->status == ACTIVE)){
codeword_TB1 = dlsch1_harq->codeword;
dlsch0_harq = NULL;
dlsch1_harq = &ue->dl_harq_processes[codeword_TB1][harq_pid];
#ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming only TB1 is active, it is in cw %d\n", codeword_TB1);
#endif
LOG_E(PHY, "[UE][FATAL] DLSCH: TB0 not active and TB1 active case is not supported\n");
DEBUG_HARQ("[DEMOD] I am assuming only TB1 is active, it is in cw %d\n", codeword_TB1);
LOG_E(PHY, "[DEMOD] slot %d TB0 not active and TB1 active case is not supported\n", nr_slot_rx);
return -1;
} else {
LOG_E(PHY,"[UE][FATAL] nr_slot_rx %d: no active DLSCH\n", nr_slot_rx);
return(-1);
LOG_E(PHY, "[DEMOD] slot %d: no active DLSCH (2 layers case)\n", nr_slot_rx);
return (-1);
}
} else if (dlsch0_harq) {
if (dlsch0_harq->status == ACTIVE) {
codeword_TB0 = dlsch0_harq->codeword;
dlsch0_harq = &ue->dl_harq_processes[0][harq_pid];
#ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming only TB0 is active\n");
#endif
DEBUG_HARQ("[DEMOD] I am assuming only TB0 is active\n");
} else {
LOG_E(PHY,"[UE][FATAL] nr_slot_rx %d: no active DLSCH\n", nr_slot_rx);
LOG_E(PHY, "[DEMOD] slot %d nr_rx_pdsch no active DLSCH (one layer case)\n", nr_slot_rx);
return (-1);
}
} else {
LOG_E(PHY, "Done\n");
LOG_E(PHY, "[DEMOD] slot %d Inconsistent call to nr_rx_pdsch (no layer 0)\n", nr_slot_rx);
return -1;
}
#ifdef DEBUG_HARQ
printf("[DEMOD] MIMO mode = %d\n", dlsch0_harq->mimo_mode);
printf("[DEMOD] cw for TB0 = %d, cw for TB1 = %d\n", codeword_TB0, codeword_TB1);
#endif
DEBUG_HARQ("[DEMOD] cw for TB0 = %d, cw for TB1 = %d\n", codeword_TB0, codeword_TB1);
start_rb = dlsch[0].dlsch_config.start_rb;
nb_rb_pdsch = dlsch[0].dlsch_config.number_rbs;
int start_rb = dlsch[0].dlsch_config.start_rb;
int nb_rb_pdsch = dlsch[0].dlsch_config.number_rbs;
DevAssert(dlsch0_harq);
if (gNB_id > 2) {
LOG_W(PHY, "In %s: Illegal gNB_id %d\n", __FUNCTION__, gNB_id);
LOG_E(PHY, "In %s: Illegal gNB_id %d\n", __FUNCTION__, gNB_id);
return(-1);
}
if (!common_vars) {
LOG_W(PHY,"dlsch_demodulation.c: Null common_vars\n");
LOG_E(PHY, "dlsch_demodulation.c: Null common_vars\n");
return(-1);
}
if (!frame_parms) {
LOG_W(PHY,"dlsch_demodulation.c: Null frame_parms\n");
LOG_E(PHY, "dlsch_demodulation.c: Null frame_parms\n");
return(-1);
}
......@@ -463,18 +432,19 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
start_meas(&meas);
if (first_symbol_flag == 1) {
nr_dlsch_channel_level(rx_size_symbol, dl_ch_estimates_ext, frame_parms, nl, avg, symbol, nb_re_pdsch, nb_rb_pdsch);
avgs = 0;
for (aatx=0;aatx<nl;aatx++)
for (aarx=0;aarx<n_rx;aarx++) {
//LOG_I(PHY, "nb_rb %d len %d avg_%d_%d Power per SC is %d\n",nb_rb, len,aarx, aatx,avg[aatx*n_rx+aarx]);
avgs = cmax(avgs,avg[(aatx*n_rx)+aarx]);
//LOG_I(PHY, "avgs Power per SC is %d\n", avgs);
median[(aatx*n_rx)+aarx] = avg[(aatx*n_rx)+aarx];
}
int avgs = 0;
int32_t median[16];
for (int aatx = 0; aatx < nl; aatx++)
for (int aarx = 0; aarx < n_rx; aarx++) {
// LOG_I(PHY, "nb_rb %d len %d avg_%d_%d Power per SC is %d\n",nb_rb, len,aarx, aatx,avg[aatx*n_rx+aarx]);
avgs = cmax(avgs, avg[(aatx * n_rx) + aarx]);
// LOG_I(PHY, "avgs Power per SC is %d\n", avgs);
median[(aatx * n_rx) + aarx] = avg[(aatx * n_rx) + aarx];
}
if (nl > 1) {
nr_dlsch_channel_level_median(rx_size_symbol, dl_ch_estimates_ext, median, nl, n_rx, nb_re_pdsch);
for (aatx = 0; aatx < nl; aatx++) {
for (aarx = 0; aarx < n_rx; aarx++) {
for (int aatx = 0; aatx < nl; aatx++) {
for (int aarx = 0; aarx < n_rx; aarx++) {
avgs = cmax(avgs, median[aatx*n_rx + aarx]);
}
}
......@@ -589,6 +559,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
start_meas(&meas);
/* Store the valid DL RE's */
dl_valid_re[symbol-1] = nb_re_pdsch;
int startSymbIdx = 0;
int nbSymb = 0;
int pduBitmap = 0;
if(dlsch0_harq->status == ACTIVE) {
startSymbIdx = dlsch[0].dlsch_config.start_symbol;
......@@ -597,7 +570,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
/* Check for PTRS bitmap and process it respectively */
if((pduBitmap & 0x1) && (dlsch[0].rnti_type == _C_RNTI_)) {
if((pduBitmap & 0x1) && (dlsch[0].rnti_type == TYPE_C_RNTI_)) {
nr_pdsch_ptrs_processing(
ue, nbRx, ptrs_phase_per_slot, ptrs_re_per_slot, rx_size_symbol, rxdataF_comp, frame_parms, dlsch0_harq, dlsch1_harq, gNB_id, nr_slot_rx, symbol, (nb_rb_pdsch * 12), dlsch[0].rnti, dlsch);
dl_valid_re[symbol-1] -= ptrs_re_per_slot[0][symbol];
......
......@@ -100,8 +100,10 @@ void free_list(NR_UE_SSB *node) {
free(node);
}
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol, c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
int nr_pbch_detection(const UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int ret =-1;
......@@ -196,9 +198,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
}
int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int n_frames, int sa)
int nr_initial_sync(const UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, int n_frames, int sa)
{
int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2,
......
......@@ -356,9 +356,9 @@ const uint8_t pbch_deinterleaving_pattern[32] = {28, 0, 31, 30, 7, 29, 25, 27,
1, 4, 3, 14, 15, 16, 17, 2, 26, 18, 19, 20, 21, 22, 6, 23};
int nr_rx_pbch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int estimateSz,
struct complex16 dl_ch_estimates [][estimateSz],
struct complex16 dl_ch_estimates[][estimateSz],
NR_DL_FRAME_PARMS *frame_parms,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
......
......@@ -198,19 +198,19 @@ void nr_conjch0_mult_ch1(int *ch0,
@returns 0 on success, 1 on unsuccessful decoding
*/
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
int b_size,
uint8_t b[b_size]);
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
const UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
int b_size,
uint8_t b[b_size]);
int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch,
......@@ -267,14 +267,13 @@ void nr_dlsch_unscrambling(int16_t* llr,
uint32_t n_RNTI);
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
/*! \brief Performs detection of SSS to find cell ID and other framing parameters (FDD/TDD, normal/extended prefix)
@param phy_vars_ue Pointer to UE variables
@param tot_metric Pointer to variable containing maximum metric under framing hypothesis (to be compared to other hypotheses
......@@ -289,26 +288,30 @@ int rx_sss(PHY_VARS_NR_UE *phy_vars_ue,int32_t *tot_metric,uint8_t *flip_max,uin
\returns number of tx antennas or -1 if error
*/
int nr_rx_pbch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
const int estimateSz,
struct complex16 dl_ch_estimates[][estimateSz],
NR_DL_FRAME_PARMS *frame_parms,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
fapiPbch_t* result,
fapiPbch_t *result,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
int nr_pbch_detection(const UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
#ifndef modOrder
#define modOrder(I_MCS,I_TBS) ((I_MCS-I_TBS)*2+2) // Find modulation order from I_TBS and I_MCS
#endif
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue,
const UE_nr_rxtx_proc_t *proc,
char *buffer,
int length,
runmode_t mode,
int input_level_dBm);
/*!
\brief This function performs the initial cell search procedure - PSS detection, SSS detection and PBCH detection. At the
......@@ -320,10 +323,7 @@ int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* bu
@param n_frames
@param sa current running mode
*/
int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *phy_vars_ue,
int n_frames,
int sa);
int nr_initial_sync(const UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *phy_vars_ue, int n_frames, int sa);
/*!
\brief This function gets the carrier frequencies either from FP or command-line-set global variables, depending on the
......@@ -368,7 +368,7 @@ void nr_pdcch_unscrambling(int16_t *z,
int16_t *z2);
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
......@@ -401,7 +401,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
@param ptrs_re_per_slot
*/
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
unsigned char symbol,
unsigned char first_symbol_flag,
......
......@@ -38,7 +38,6 @@
#include "nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h"
#include "../NR_TRANSPORT/nr_transport_common_proto.h"
typedef enum {
NEW_TRANSMISSION_HARQ,
RETRANSMISSION_HARQ
......@@ -95,7 +94,7 @@ typedef struct {
// UL number of harq processes
uint8_t number_harq_processes_for_pusch;
/// RNTI type
uint8_t rnti_type;
nr_rnti_type_t rnti_type;
/// Cell ID
int Nid_cell;
/// bit mask of PT-RS ofdm symbol indicies
......
......@@ -258,7 +258,7 @@ static int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
static int do_pss_sss_extract_nr(
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
c16_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
c16_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss,
......@@ -340,7 +340,7 @@ static int do_pss_sss_extract_nr(
*********************************************************************/
static int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
c16_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
c16_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t subframe,
......@@ -362,7 +362,7 @@ static int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
*
*********************************************************************/
bool rx_sss_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int32_t *tot_metric,
uint8_t *phase_max,
int *freq_offset_sss,
......
......@@ -254,48 +254,16 @@ typedef struct {
#define MAX_NR_DCI_DECODED_SLOT 10 // This value is not specified
typedef enum {
_format_0_0_found=0,
_format_0_1_found=1,
_format_1_0_found=2,
_format_1_1_found=3,
_format_2_0_found=4,
_format_2_1_found=5,
_format_2_2_found=6,
_format_2_3_found=7
_format_0_0_found = 0,
_format_0_1_found = 1,
_format_1_0_found = 2,
_format_1_1_found = 3,
_format_2_0_found = 4,
_format_2_1_found = 5,
_format_2_2_found = 6,
_format_2_3_found = 7
} format_found_t;
#define TOTAL_NBR_SCRAMBLED_VALUES 13
#define _C_RNTI_ 0
#define _CS_RNTI_ 1
#define _NEW_RNTI_ 2
#define _TC_RNTI_ 3
#define _P_RNTI_ 4
#define _SI_RNTI_ 5
#define _RA_RNTI_ 6
#define _SP_CSI_RNTI_ 7
#define _SFI_RNTI_ 8
#define _INT_RNTI_ 9
#define _TPC_PUSCH_RNTI_ 10
#define _TPC_PUCCH_RNTI_ 11
#define _TPC_SRS_RNTI_ 12
typedef enum { /* see 38.321 Table 7.1-2 RNTI usage */
_c_rnti = _C_RNTI_, /* Cell RNTI */
_cs_rnti = _CS_RNTI_, /* Configured Scheduling RNTI */
_new_rnti = _NEW_RNTI_, /* ? */
_tc_rnti = _TC_RNTI_, /* Temporary C-RNTI */
_p_rnti = _P_RNTI_, /* Paging RNTI */
_si_rnti = _SI_RNTI_, /* System information RNTI */
_ra_rnti = _RA_RNTI_, /* Random Access RNTI */
_sp_csi_rnti = _SP_CSI_RNTI_, /* Semipersistent CSI reporting on PUSCH */
_sfi_rnti = _SFI_RNTI_, /* Slot Format Indication on the given cell */
_int_rnti = _INT_RNTI_, /* Indication pre-emption in DL */
_tpc_pusch_rnti = _TPC_PUSCH_RNTI_, /* PUSCH power control */
_tpc_pucch_rnti = _TPC_PUCCH_RNTI_, /* PUCCH power control */
_tpc_srs_rnti = _TPC_SRS_RNTI_
} crc_scrambled_t;
#endif
typedef struct {
......@@ -645,8 +613,7 @@ typedef struct {
void *phy_sim_pdsch_dl_ch_estimates_ext;
uint8_t *phy_sim_dlsch_b;
notifiedFIFO_t phy_config_ind;
notifiedFIFO_t *tx_resume_ind_fifo[NR_MAX_SLOTS_PER_FRAME];
int tx_wait_for_dlsch[NR_MAX_SLOTS_PER_FRAME];
notifiedFIFO_t tx_resume_ind_fifo[NR_MAX_SLOTS_PER_FRAME];
} PHY_VARS_NR_UE;
typedef struct {
......@@ -681,7 +648,6 @@ typedef struct nr_rxtx_thread_data_s {
UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE;
int writeBlockSize;
notifiedFIFO_t txFifo;
nr_phy_data_t phy_data;
int tx_wait_for_dlsch;
} nr_rxtx_thread_data_t;
......@@ -709,7 +675,7 @@ typedef struct LDPCDecode_ue_s {
time_stats_t ts_deinterleave;
time_stats_t ts_rate_unmatch;
time_stats_t ts_ldpc_decode;
UE_nr_rxtx_proc_t *proc;
UE_nr_rxtx_proc_t proc;
} ldpcDecode_ue_t;
#include "SIMULATION/ETH_TRANSPORT/defs.h"
......
......@@ -98,17 +98,9 @@ typedef struct {
*/
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_tx_t *phy_data);
void send_slot_ind(notifiedFIFO_t *nf, int slot);
void pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_t *phy_data);
void pbch_pdcch_processing(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data);
void pdsch_processing(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t abstraction_flag, uint8_t do_pdcch_flag, relaying_type_t r_type);
void pdsch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_t *phy_data);
void processSlotTX(void *arg);
......@@ -139,7 +131,7 @@ bool is_csi_rs_in_symbol(fapi_nr_dl_config_csirs_pdu_rel15_t csirs_config_pdu, i
void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
void *phy_data);
......@@ -153,32 +145,25 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
void *typeSpecific,
uint8_t *b);
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t* llr[2]);
int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t *llr[2],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
int n_ss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_ue_csi_im_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_ue_csi_im_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
void nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
void nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
#endif
/** @}*/
......@@ -429,7 +429,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
case FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH: {
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0];
dlsch0->rnti_type = _RA_RNTI_;
dlsch0->rnti_type = TYPE_RA_RNTI_;
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
......@@ -437,7 +437,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
case FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH: {
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0];
dlsch0->rnti_type = _SI_RNTI_;
dlsch0->rnti_type = TYPE_SI_RNTI_;
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
......@@ -445,7 +445,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
case FAPI_NR_DL_CONFIG_TYPE_DLSCH: {
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0];
dlsch0->rnti_type = _C_RNTI_;
dlsch0->rnti_type = TYPE_C_RNTI_;
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
......
......@@ -138,15 +138,21 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq)
void downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int dci_ndi, int rv, uint8_t rnti_type) {
if (rnti_type == _SI_RNTI_ ||
rnti_type == _P_RNTI_ ||
rnti_type == _RA_RNTI_) {
if (rnti_type == TYPE_SI_RNTI_ ||
rnti_type == TYPE_P_RNTI_ ||
rnti_type == TYPE_RA_RNTI_) {
dl_harq->DLround = 0;
dl_harq->status = ACTIVE;
dl_harq->first_rx = 1;
} else {
LOG_D(PHY,"receive harq process: %p harqPid=%d, rv=%d, ndi=%d, rntiType=%d new transmission= %s\n",
dl_harq, harq_pid, rv, dci_ndi, rnti_type, dl_harq->Ndi != dci_ndi ? "yes":"no");
LOG_D(PHY,
"receive harq process: %p harqPid=%d, rv=%d, ndi=%d, rntiType=%d new transmission= %s\n",
dl_harq,
harq_pid,
rv,
dci_ndi,
rnti_type,
dl_harq->Ndi != dci_ndi ? "yes" : "no");
AssertFatal(rv<4 && rv>=0, "invalid redondancy version %d\n", rv);
if (dci_ndi!=dl_harq->Ndi) {
if (dl_harq->ack == DL_NACK)
......
......@@ -82,7 +82,7 @@ static const unsigned int gain_table[31] = {100, 112, 126, 141, 158, 178,
void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
void *phy_data)
{
......@@ -114,7 +114,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
void *typeSpecific,
uint8_t *b)
{
......@@ -306,11 +306,11 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, n
void nr_ue_measurement_procedures(uint16_t l,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t *dlsch,
uint32_t pdsch_est_size,
int32_t dl_ch_estimates[][pdsch_est_size]) {
int32_t dl_ch_estimates[][pdsch_est_size])
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int nr_slot_rx = proc->nr_slot_rx;
int gNB_id = proc->gNB_id;
......@@ -361,11 +361,11 @@ void nr_ue_measurement_procedures(uint16_t l,
}
static int nr_ue_pbch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int estimateSz,
struct complex16 dl_ch_estimates[][estimateSz],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) {
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
int ret = 0;
DevAssert(ue);
......@@ -424,7 +424,7 @@ unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb
}
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
......@@ -488,20 +488,17 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
return(dci_cnt);
}
int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t *llr[2],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
static int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t *llr[2],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
int m;
int first_symbol_flag=0;
if (!dlsch[0].active)
return 0;
// We handle only one CW now
if (!(NR_MAX_NB_LAYERS>4)) {
NR_UE_DLSCH_t *dlsch0 = &dlsch[0];
......@@ -637,23 +634,23 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
return 0;
}
void send_slot_ind(notifiedFIFO_t *nf, int slot) {
// This function release the Tx working thread for one pending information, like dlsch ACK/NACK
static void send_dl_done_to_tx_thread(notifiedFIFO_t *nf, int rx_slot)
{
if (nf) {
notifiedFIFO_elt_t *newElt = newNotifiedFIFO_elt(sizeof(int), 0, NULL, NULL);
// We put rx slot only for tracing purpose
int *msgData = (int *) NotifiedFifoData(newElt);
*msgData = slot;
*msgData = rx_slot;
pushNotifiedFIFO(nf, newElt);
}
}
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t* llr[2]) {
static bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, NR_UE_DLSCH_t dlsch[2], int16_t *llr[2])
{
if (dlsch[0].active == false) {
LOG_E(PHY, "DLSCH should be active when calling this function\n");
return 1;
return true;
}
int gNB_id = proc->gNB_id;
......@@ -688,8 +685,9 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
// exit dlsch procedures as there are no active dlsch
if (is_cw0_active != ACTIVE && is_cw1_active != ACTIVE) {
// don't wait anymore
LOG_E(NR_PHY, "Internal error nr_ue_dlsch_procedure() called but no active cw on slot %d, harq %d\n", nr_slot_rx, harq_pid);
const int ack_nack_slot = (proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame;
send_slot_ind(ue->tx_resume_ind_fifo[ack_nack_slot], proc->nr_slot_rx);
send_dl_done_to_tx_thread(ue->tx_resume_ind_fifo + ack_nack_slot, proc->nr_slot_rx);
return false;
}
......@@ -737,15 +735,15 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
int ind_type = -1;
switch(dlsch[0].rnti_type) {
case _RA_RNTI_:
case TYPE_RA_RNTI_:
ind_type = FAPI_NR_RX_PDU_TYPE_RAR;
break;
case _SI_RNTI_:
case TYPE_SI_RNTI_:
ind_type = FAPI_NR_RX_PDU_TYPE_SIB;
break;
case _C_RNTI_:
case TYPE_C_RNTI_:
ind_type = FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
......@@ -821,7 +819,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats.p_time)/(cpuf*1000.0));
}
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dlsch[1].dlsch_config.TBS);
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dlsch[1].dlsch_config.TBS);
}
// send to mac
......@@ -829,9 +827,11 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
ue->if_inst->dl_indication(&dl_indication);
}
// DLSCH decoding finished! don't wait anymore
const int ack_nack_slot = (proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame;
send_slot_ind(ue->tx_resume_ind_fifo[ack_nack_slot], proc->nr_slot_rx);
// DLSCH decoding finished! don't wait anymore in Tx process, we know if we should answer ACK/NACK PUCCH
if (dlsch[0].rnti_type == TYPE_C_RNTI_) {
const int ack_nack_slot = (proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame;
send_dl_done_to_tx_thread(ue->tx_resume_ind_fifo + ack_nack_slot, proc->nr_slot_rx);
}
if (ue->phy_sim_dlsch_b)
memcpy(ue->phy_sim_dlsch_b, p_b, dlsch_bytes);
......@@ -839,10 +839,8 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
return dec;
}
void pbch_pdcch_processing(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data) {
void pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_t *phy_data)
{
int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
int gNB_id = proc->gNB_id;
......@@ -1017,9 +1015,7 @@ void pbch_pdcch_processing(PHY_VARS_NR_UE *ue,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_OUT);
}
void pdsch_processing(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data)
void pdsch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_t *phy_data)
{
int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
......@@ -1102,9 +1098,12 @@ void pdsch_processing(PHY_VARS_NR_UE *ue,
if (ret_pdsch >= 0)
nr_ue_dlsch_procedures(ue, proc, dlsch, llr);
else
// don't wait anymore
send_slot_ind(ue->tx_resume_ind_fifo[(proc->nr_slot_rx + dlsch_config->k1_feedback) % ue->frame_parms.slots_per_frame], proc->nr_slot_rx);
else {
LOG_E(NR_PHY, "Demodulation impossible, internal error\n");
send_dl_done_to_tx_thread(
ue->tx_resume_ind_fifo + (proc->nr_slot_rx + dlsch_config->k1_feedback) % ue->frame_parms.slots_per_frame,
proc->nr_slot_rx);
}
stop_meas(&ue->dlsch_procedures_stat);
if (cpumeas(CPUMEAS_GETSTATE)) {
......
......@@ -170,8 +170,14 @@ void nr_dlsim_preprocessor(module_id_t module_id,
sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation >= 0,"Unable to find PDSCH time domain allocation in list\n");
sched_pdsch->tda_info = get_dl_tda_info(current_BWP, sched_ctrl->search_space->searchSpaceType->present, sched_pdsch->time_domain_allocation,
NR_MIB__dmrs_TypeA_Position_pos2, 1, NR_RNTI_C, sched_ctrl->coreset->controlResourceSetId, false);
sched_pdsch->tda_info = get_dl_tda_info(current_BWP,
sched_ctrl->search_space->searchSpaceType->present,
sched_pdsch->time_domain_allocation,
NR_MIB__dmrs_TypeA_Position_pos2,
1,
TYPE_C_RNTI_,
sched_ctrl->coreset->controlResourceSetId,
false);
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
current_BWP,
......
......@@ -97,44 +97,34 @@ nfapi_mode_t nfapi_getmode(void) { return NFAPI_MODE_UNKNOWN; }
void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
void *phy_data) {}
void *phy_data)
{
}
void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t pdu_type,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus,
UE_nr_rxtx_proc_t *proc,
const UE_nr_rxtx_proc_t *proc,
void *typeSpecific,
uint8_t *b) {}
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
int n_ss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) {
return 0;
uint8_t *b)
{
}
int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t *llr[2],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) {
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
int n_ss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
return 0;
}
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t *llr[2]) {
return false;
}
void nr_phy_config_request_sim_pbchsim(PHY_VARS_gNB *gNB,
int N_RB_DL,
int N_RB_UL,
......
......@@ -56,7 +56,7 @@ int test_harq_downlink(PHY_VARS_NR_UE *phy_vars_ue)
int gNB_id = 0;
int harq_pid = 0;
int ndi = 1;
uint8_t rnti_type = _C_RNTI_;
uint8_t rnti_type = TYPE_C_RNTI_;
int number_steps = 5;
int thread_number = 0;
int TB_identifier = 0;
......
......@@ -451,23 +451,6 @@ typedef enum {
NR_DCI_NONE
} nr_dci_format_t;
typedef enum {
NR_RNTI_new = 0,
NR_RNTI_C,
NR_RNTI_RA,
NR_RNTI_P,
NR_RNTI_CS,
NR_RNTI_TC,
NR_RNTI_SP_CSI,
NR_RNTI_SI,
NR_RNTI_SFI,
NR_RNTI_INT,
NR_RNTI_TPC_PUSCH,
NR_RNTI_TPC_PUCCH,
NR_RNTI_TPC_SRS,
NR_RNTI_MCS_C,
} nr_rnti_type_t;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
......
......@@ -466,7 +466,11 @@ const uint8_t table_6_1_2_1_1_3[16][4] = {
{0, 3, 0, 10} // row index 16
};
NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type, int tda_index)
NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type,
int tda_index)
{
NR_tda_info_t tda_info = {0};
NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist = get_ul_tdalist(ul_bwp, controlResourceSetId, ss_type, rnti_type);
......@@ -604,8 +608,14 @@ NR_tda_info_t set_tda_info_from_list(NR_PDSCH_TimeDomainResourceAllocationList_t
return tda_info;
}
NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda_index, int dmrs_typeA_pos,
int mux_pattern, nr_rnti_type_t rnti_type, int coresetid, bool sib1)
NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP,
int ss_type,
int tda_index,
int dmrs_typeA_pos,
int mux_pattern,
nr_rnti_type_t rnti_type,
int coresetid,
bool sib1)
{
NR_tda_info_t tda_info;
bool normal_CP = true;
......@@ -614,7 +624,7 @@ NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda
// implements Table 5.1.2.1.1-1 of 38.214
NR_PDSCH_TimeDomainResourceAllocationList_t *tdalist = get_dl_tdalist(dl_BWP, coresetid, ss_type, rnti_type);
switch (rnti_type) {
case NR_RNTI_SI:
case TYPE_SI_RNTI_:
if(sib1) {
default_table_type_t table_type = get_default_table_type(mux_pattern);
tda_info = get_info_from_tda_tables(table_type, tda_index, dmrs_typeA_pos, normal_CP);
......@@ -628,7 +638,7 @@ NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda
}
}
break;
case NR_RNTI_P:
case TYPE_P_RNTI_:
if(tdalist)
tda_info = set_tda_info_from_list(tdalist, tda_index);
else {
......@@ -636,11 +646,11 @@ NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda
tda_info = get_info_from_tda_tables(table_type, tda_index, dmrs_typeA_pos, normal_CP);
}
break;
case NR_RNTI_C:
case NR_RNTI_CS:
case NR_RNTI_MCS_C:
case NR_RNTI_RA:
case NR_RNTI_TC:
case TYPE_C_RNTI_:
case TYPE_CS_RNTI_:
case TYPE_MCS_C_RNTI_:
case TYPE_RA_RNTI_:
case TYPE_TC_RNTI_:
if(tdalist)
tda_info = set_tda_info_from_list(tdalist, tda_index);
else
......@@ -3227,21 +3237,29 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
return nbits;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type)
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type)
{
if (!DL_BWP)
return NULL;
// see table 5.1.2.1.1-1 in 38.214
if ((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0)
if ((rnti_type == TYPE_CS_RNTI_ || rnti_type == TYPE_C_RNTI_ || rnti_type == TYPE_MCS_C_RNTI_)
&& !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0)
&& (DL_BWP->pdsch_Config && DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList))
return DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else
return DL_BWP->tdaList_Common;
}
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type)
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type)
{
if ((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0)
if ((rnti_type == TYPE_CS_RNTI_ || rnti_type == TYPE_C_RNTI_ || rnti_type == TYPE_MCS_C_RNTI_)
&& !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0)
&& (UL_BWP->pusch_Config && UL_BWP->pusch_Config->pusch_TimeDomainAllocationList))
return UL_BWP->pusch_Config->pusch_TimeDomainAllocationList->choice.setup;
else
......@@ -3795,17 +3813,12 @@ uint8_t get_pdsch_mcs_table(long *mcs_Table, int dci_format, int rnti_type, int
// Set downlink MCS table (Semi-persistent scheduling ignored for now)
uint8_t mcsTableIdx = 0; // default value
if (mcs_Table &&
*mcs_Table == NR_PDSCH_Config__mcs_Table_qam256 &&
dci_format == NR_DL_DCI_FORMAT_1_1 &&
rnti_type == NR_RNTI_C)
if (mcs_Table && *mcs_Table == NR_PDSCH_Config__mcs_Table_qam256 && dci_format == NR_DL_DCI_FORMAT_1_1 && rnti_type == TYPE_C_RNTI_)
mcsTableIdx = 1;
else if (rnti_type != NR_RNTI_MCS_C &&
mcs_Table &&
*mcs_Table == NR_PDSCH_Config__mcs_Table_qam64LowSE &&
ss_type == NR_SearchSpace__searchSpaceType_PR_ue_Specific)
else if (rnti_type != TYPE_MCS_C_RNTI_ && mcs_Table && *mcs_Table == NR_PDSCH_Config__mcs_Table_qam64LowSE
&& ss_type == NR_SearchSpace__searchSpaceType_PR_ue_Specific)
mcsTableIdx = 2;
else if (rnti_type == NR_RNTI_MCS_C)
else if (rnti_type == TYPE_MCS_C_RNTI_)
mcsTableIdx = 2;
LOG_D(NR_MAC,"DL MCS Table Index: %d\n", mcsTableIdx);
......@@ -3823,23 +3836,20 @@ uint8_t get_pusch_mcs_table(long *mcs_Table,
// implementing 6.1.4.1 in 38.214
if (mcs_Table != NULL) {
if (config_grant || (rnti_type == NR_RNTI_CS)) {
if (config_grant || (rnti_type == TYPE_CS_RNTI_)) {
if (*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256)
return 1;
else
return (2 + (is_tp << 1));
}
else {
if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256) &&
(dci_format == NR_UL_DCI_FORMAT_0_1) &&
((rnti_type == NR_RNTI_C ) || (rnti_type == NR_RNTI_SP_CSI)))
} else {
if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256) && (dci_format == NR_UL_DCI_FORMAT_0_1)
&& ((rnti_type == TYPE_C_RNTI_) || (rnti_type == TYPE_SP_CSI_RNTI_)))
return 1;
// TODO take into account UE configuration
if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam64LowSE) &&
(target_ss == NR_SearchSpace__searchSpaceType_PR_ue_Specific) &&
((rnti_type == NR_RNTI_C ) || (rnti_type == NR_RNTI_SP_CSI)))
if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam64LowSE) && (target_ss == NR_SearchSpace__searchSpaceType_PR_ue_Specific)
&& ((rnti_type == TYPE_C_RNTI_) || (rnti_type == TYPE_SP_CSI_RNTI_)))
return (2 + (is_tp << 1));
if (rnti_type == NR_RNTI_MCS_C)
if (rnti_type == TYPE_MCS_C_RNTI_)
return (2 + (is_tp << 1));
}
}
......
......@@ -84,14 +84,30 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
const uint8_t *nrOfLayers,
uint32_t *val);
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type);
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type);
NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type, int tda_index);
NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda_index, int dmrs_typeA_pos,
int mux_pattern, nr_rnti_type_t rnti_type, int coresetid, bool sib1);
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type);
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type);
NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type,
int tda_index);
NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP,
int ss_type,
int tda_index,
int dmrs_typeA_pos,
int mux_pattern,
nr_rnti_type_t rnti_type,
int coresetid,
bool sib1);
uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
const NR_UE_UL_BWP_t *UL_BWP,
......
......@@ -68,17 +68,14 @@ extern const uint16_t table_7_2_1[16];
extern dci_pdu_rel15_t *def_dci_pdu_rel15;
extern void mac_rlc_data_ind(const module_id_t module_idP,
const rnti_t rntiP,
const eNB_index_t eNB_index,
const frame_t frameP,
const eNB_flag_t enb_flagP,
const MBMS_flag_t MBMS_flagP,
const logical_chan_id_t channel_idP,
char *buffer_pP,
const tb_size_t tb_sizeP,
num_tb_t num_tbP,
crc_t *crcs_pP);
extern const char *const rnti_types[];
extern const char *const dci_formats[];
extern void mac_rlc_data_ind(const module_id_t module_idP,
const rnti_t rntiP,
const eNB_index_t eNB_index,
const frame_t frameP,
const eNB_flag_t enb_flagP,
const MBMS_flag_t MBMS_flagP,
const logical_chan_id_t channel_idP,
char *buffer_pP,
const tb_size_t tb_sizeP,
num_tb_t num_tbP,
crc_t *crcs_pP);
......@@ -435,20 +435,6 @@ void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac,
sub_frame_t current_slot,
uint8_t Msg3_tda_id);
/* \brief Function called by PHY to process the received RAR and check that the preamble matches what was sent by the gNB. It provides the timing advance and t-CRNTI.
@param Mod_id Index of UE instance
@param CC_id Index to a component carrier
@param frame Frame index
@param ra_rnti RA_RNTI value
@param dlsch_buffer Pointer to dlsch_buffer containing RAR PDU
@param t_crnti Pointer to PHY variable containing the T_CRNTI
@param preamble_index Preamble Index used by PHY to transmit the PRACH. This should match the received RAR to trigger the rest of
random-access procedure
@param selected_rar_buffer the output buffer for storing the selected RAR header and RAR payload
@returns timing advance or 0xffff if preamble doesn't match
*/
int nr_ue_process_rar(nr_downlink_indication_t *dl_info, int pdu_id);
void nr_ue_contention_resolution(module_id_t module_id, int cc_id, frame_t frame, int slot, NR_PRACH_RESOURCES_t *prach_resources);
void nr_ra_failed(uint8_t mod_id, uint8_t CC_id, NR_PRACH_RESOURCES_t *prach_resources, frame_t frame, int slot);
......
......@@ -32,10 +32,6 @@
#include <stdint.h>
const char* const rnti_types[] =
{"RNTI_new", "RNTI_C", "RNTI_RA", "NR_RNTI_P", "NR_RNTI_CS", "NR_RNTI_TC", "NR_RNTI_SP_CSI", "NR_RNTI_SI"};
const char* const dci_formats[] = {"1_0", "1_1", "2_0", "2_1", "2_2", "2_3", "0_0", "0_1"};
// table_7_3_1_1_2_2_3_4_5 contains values for number of layers and precoding information for tables 7.3.1.1.2-2/3/4/5 from TS 38.212 subclause 7.3.1.1.2
// the first 6 columns contain table 7.3.1.1.2-2: Precoding information and number of layers, for 4 antenna ports, if transformPrecoder=disabled and maxRank = 2 or 3 or 4
// next six columns contain table 7.3.1.1.2-3: Precoding information and number of layers for 4 antenna ports, if transformPrecoder= enabled, or if transformPrecoder=disabled and maxRank = 1
......
......@@ -154,9 +154,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
rel15->coreset.pdcch_dmrs_scrambling_id = mac->physCellId;
}
rel15->num_dci_options = (mac->ra.ra_state == WAIT_RAR ||
rnti_type == NR_RNTI_SI) ?
1 : 2;
rel15->num_dci_options = (mac->ra.ra_state == WAIT_RAR || rnti_type == TYPE_SI_RNTI_) ? 1 : 2;
if (ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) {
if (ss->searchSpaceType->choice.ue_Specific->dci_Formats ==
......@@ -234,7 +232,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
int sps = 0;
switch(rnti_type) {
case NR_RNTI_C:
case TYPE_C_RNTI_:
// we use DL BWP dedicated
sps = current_DL_BWP->cyclicprefix ? 12 : 14;
// for SPS=14 8 MSBs in positions 13 down to 6
......@@ -242,27 +240,27 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
rel15->rnti = mac->crnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_RA:
case TYPE_RA_RNTI_:
// we use the initial DL BWP
sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->ra.ra_rnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_P:
case TYPE_P_RNTI_:
break;
case NR_RNTI_CS:
case TYPE_CS_RNTI_:
break;
case NR_RNTI_TC:
case TYPE_TC_RNTI_:
// we use the initial DL BWP
sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->ra.t_crnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_SP_CSI:
case TYPE_SP_CSI_RNTI_:
break;
case NR_RNTI_SI:
case TYPE_SI_RNTI_:
sps = 14;
// for SPS=14 8 MSBs in positions 13 down to 6
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
......@@ -271,15 +269,15 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
if(mac->frequency_range == FR2)
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2;
break;
case NR_RNTI_SFI:
case TYPE_SFI_RNTI_:
break;
case NR_RNTI_INT:
case TYPE_INT_RNTI_:
break;
case NR_RNTI_TPC_PUSCH:
case TYPE_TPC_PUSCH_RNTI_:
break;
case NR_RNTI_TPC_PUCCH:
case TYPE_TPC_PUCCH_RNTI_:
break;
case NR_RNTI_TPC_SRS:
case TYPE_TPC_SRS_RNTI_:
break;
default:
break;
......@@ -492,7 +490,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
fill_searchSpaceZero(pdcch_config->search_space_zero, slots_per_frame, &mac->type0_PDCCH_CSS_config);
if (is_ss_monitor_occasion(frame, slot, slots_per_frame, pdcch_config->search_space_zero)) {
LOG_D(NR_MAC, "Monitoring DCI for SIB1 in frame %d slot %d\n", frame, slot);
config_dci_pdu(mac, dl_config, NR_RNTI_SI, slot, pdcch_config->search_space_zero);
config_dci_pdu(mac, dl_config, TYPE_SI_RNTI_, slot, pdcch_config->search_space_zero);
}
}
if (mac->get_otherSI) {
......@@ -503,14 +501,14 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
// TODO configure SI-window
if (monitior_dci_for_other_SI(mac, ss, slots_per_frame, frame, slot)) {
LOG_D(NR_MAC, "Monitoring DCI for other SIs in frame %d slot %d\n", frame, slot);
config_dci_pdu(mac, dl_config, NR_RNTI_SI, slot, ss);
config_dci_pdu(mac, dl_config, TYPE_SI_RNTI_, slot, ss);
}
}
if (mac->state == UE_PERFORMING_RA &&
mac->ra.ra_state >= WAIT_RAR) {
// if RA is ongoing use RA search space
if (is_ss_monitor_occasion(frame, slot, slots_per_frame, pdcch_config->ra_SS)) {
int rnti_type = mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC;
int rnti_type = mac->ra.ra_state == WAIT_RAR ? TYPE_RA_RNTI_ : TYPE_TC_RNTI_;
config_dci_pdu(mac, dl_config, rnti_type, slot, pdcch_config->ra_SS);
}
}
......@@ -518,7 +516,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
for (int i = 0; i < pdcch_config->list_SS.count; i++) {
NR_SearchSpace_t *ss = pdcch_config->list_SS.array[i];
if (is_ss_monitor_occasion(frame, slot, slots_per_frame, ss))
config_dci_pdu(mac, dl_config, NR_RNTI_C, slot, ss);
config_dci_pdu(mac, dl_config, TYPE_C_RNTI_, slot, ss);
}
if (pdcch_config->list_SS.count == 0 && pdcch_config->ra_SS) {
// If the UE has not been provided a Type3-PDCCH CSS set or a USS set and
......@@ -526,7 +524,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
// the UE monitors PDCCH candidates for DCI format 0_0 and DCI format 1_0
// with CRC scrambled by the C-RNTI in the Type1-PDCCH CSS set
if (is_ss_monitor_occasion(frame, slot, slots_per_frame, pdcch_config->ra_SS))
config_dci_pdu(mac, dl_config, NR_RNTI_C, slot, pdcch_config->ra_SS);
config_dci_pdu(mac, dl_config, TYPE_C_RNTI_, slot, pdcch_config->ra_SS);
}
}
}
......@@ -695,12 +695,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
}
}
LOG_D(NR_MAC, "Received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n",
LOG_D(NR_MAC,
"Received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n",
pusch_config_pdu->rb_start,
pusch_config_pdu->rb_size,
pusch_config_pdu->start_symbol_index,
pusch_config_pdu->nr_of_symbols,
rnti_types[rnti_type]);
rnti_types(rnti_type));
pusch_config_pdu->ul_dmrs_symb_pos = l_prime_mask;
pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table);
......
......@@ -857,7 +857,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
dci_pdu,
&uldci_payload,
NR_UL_DCI_FORMAT_0_0,
NR_RNTI_TC,
TYPE_TC_RNTI_,
ul_bwp->bwp_id,
ss,
coreset,
......@@ -1215,8 +1215,14 @@ static void nr_generate_Msg2(module_id_t module_idP,
// Calculate number of symbols
int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, time_domain_assignment,
scc->dmrs_TypeA_Position, mux_pattern, NR_RNTI_RA, coresetid, false);
NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp,
ss->searchSpaceType->present,
time_domain_assignment,
scc->dmrs_TypeA_Position,
mux_pattern,
TYPE_RA_RNTI_,
coresetid,
false);
uint16_t *vrb_map = cc[CC_id].vrb_map;
for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) {
......@@ -1378,9 +1384,10 @@ static void nr_generate_Msg2(module_id_t module_idP,
dci_payload.tb_scaling);
LOG_D(NR_MAC,
"[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n",
"[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d "
"n_symb %d\n",
pdcch_pdu_rel15->dci_pdu[0].RNTI,
NR_RNTI_RA,
TYPE_RA_RNTI_,
NR_DL_DCI_FORMAT_1_0,
*(unsigned long long *)pdcch_pdu_rel15->FreqDomainResource,
pdcch_pdu_rel15->StartSymbolIndex,
......@@ -1392,7 +1399,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
&dci_payload,
NR_DL_DCI_FORMAT_1_0,
NR_RNTI_RA,
TYPE_RA_RNTI_,
dl_bwp->bwp_id,
ss,
coreset,
......@@ -1605,9 +1612,10 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
dci_payload.pdsch_to_harq_feedback_timing_indicator.val);
LOG_D(NR_MAC,
"[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d, BWPsize %d\n",
"[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d "
"n_symb %d, BWPsize %d\n",
pdcch_pdu_rel15->dci_pdu[0].RNTI,
NR_RNTI_TC,
TYPE_TC_RNTI_,
NR_DL_DCI_FORMAT_1_0,
(unsigned long long)pdcch_pdu_rel15->FreqDomainResource,
pdcch_pdu_rel15->StartSymbolIndex,
......@@ -1620,7 +1628,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
&dci_payload,
NR_DL_DCI_FORMAT_1_0,
NR_RNTI_TC,
TYPE_TC_RNTI_,
dl_bwp->bwp_id,
ss,
coreset,
......@@ -1731,8 +1739,14 @@ static void nr_generate_Msg4(module_id_t module_idP,
uint8_t time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, time_domain_assignment,
scc->dmrs_TypeA_Position, mux_pattern, NR_RNTI_TC, coreset->controlResourceSetId, false);
NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp,
ss->searchSpaceType->present,
time_domain_assignment,
scc->dmrs_TypeA_Position,
mux_pattern,
TYPE_TC_RNTI_,
coreset->controlResourceSetId,
false);
NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc,
dl_bwp,
......
......@@ -492,7 +492,7 @@ static void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu_rel15->SCID;
int dci_format = NR_DL_DCI_FORMAT_1_0;
int rnti_type = NR_RNTI_SI;
int rnti_type = TYPE_SI_RNTI_;
fill_dci_pdu_rel15(NULL,
NULL,
......
......@@ -443,8 +443,14 @@ static bool allocate_dl_retransmission(module_id_t module_id,
/* Check first whether the old TDA can be reused
* this helps allocate retransmission when TDA changes (e.g. new nrOfSymbols > old nrOfSymbols) */
NR_tda_info_t temp_tda = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, tda,
scc->dmrs_TypeA_Position, 1, NR_RNTI_C, coresetid, false);
NR_tda_info_t temp_tda = get_dl_tda_info(dl_bwp,
sched_ctrl->search_space->searchSpaceType->present,
tda,
scc->dmrs_TypeA_Position,
1,
TYPE_C_RNTI_,
coresetid,
false);
bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == temp_tda.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= temp_tda.nrOfSymbols);
LOG_D(NR_MAC, "[UE %x] %s old TDA, %s number of layers\n",
......@@ -757,8 +763,14 @@ static void pf_dl(module_id_t module_id,
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
const int coresetid = sched_ctrl->coreset->controlResourceSetId;
sched_pdsch->tda_info = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, sched_pdsch->time_domain_allocation,
scc->dmrs_TypeA_Position, 1, NR_RNTI_C, coresetid, false);
sched_pdsch->tda_info = get_dl_tda_info(dl_bwp,
sched_ctrl->search_space->searchSpaceType->present,
sched_pdsch->time_domain_allocation,
scc->dmrs_TypeA_Position,
1,
TYPE_C_RNTI_,
coresetid,
false);
NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
......@@ -833,7 +845,8 @@ static void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
int startSymbolIndex, nrOfSymbols;
const int coresetid = sched_ctrl->coreset->controlResourceSetId;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = get_dl_tdalist(current_BWP, coresetid, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
get_dl_tdalist(current_BWP, coresetid, sched_ctrl->search_space->searchSpaceType->present, TYPE_C_RNTI_);
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
......@@ -1185,7 +1198,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.tpc,
pucch->timing_indicator);
const int rnti_type = NR_RNTI_C;
const int rnti_type = TYPE_C_RNTI_;
fill_dci_pdu_rel15(&UE->sc_info,
current_BWP,
&UE->current_UL_BWP,
......
......@@ -61,8 +61,14 @@ void nr_preprocessor_phytest(module_id_t module_id,
const int CC_id = 0;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, tda,
scc->dmrs_TypeA_Position, 1, NR_RNTI_C, sched_ctrl->coreset->controlResourceSetId, false);
NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp,
sched_ctrl->search_space->searchSpaceType->present,
tda,
scc->dmrs_TypeA_Position,
1,
TYPE_C_RNTI_,
sched_ctrl->coreset->controlResourceSetId,
false);
sched_ctrl->sched_pdsch.tda_info = tda_info;
sched_ctrl->sched_pdsch.time_domain_allocation = tda;
......@@ -210,7 +216,10 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
const int mu = ul_bwp->scs;
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(ul_bwp,
sched_ctrl->coreset->controlResourceSetId,
sched_ctrl->search_space->searchSpaceType->present,
TYPE_C_RNTI_);
const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot);
if (temp_tda < 0)
return false;
......@@ -245,7 +254,11 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
else
rbSize = target_ul_bw;
NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, tda);
NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp,
sched_ctrl->coreset->controlResourceSetId,
sched_ctrl->search_space->searchSpaceType->present,
TYPE_C_RNTI_,
tda);
sched_ctrl->sched_pusch.tda_info = tda_info;
const int buffer_index = ul_buffer_index(sched_frame, sched_slot, mu, nr_mac->vrb_map_UL_size);
......
......@@ -562,7 +562,10 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot)
continue;
}
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP,
sched_ctrl->coreset->controlResourceSetId,
sched_ctrl->search_space->searchSpaceType->present,
TYPE_C_RNTI_);
const int num_tda = tdaList->list.count;
int max_k2 = 0;
// avoid last one in the list (for msg3)
......
......@@ -1502,7 +1502,11 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
const uint8_t nrOfLayers = retInfo->nrOfLayers;
LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);
LOG_D(NR_MAC,"tbs %d\n",retInfo->tb_size);
NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, tda);
NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp,
sched_ctrl->coreset->controlResourceSetId,
sched_ctrl->search_space->searchSpaceType->present,
TYPE_C_RNTI_,
tda);
bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == tda_info.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= tda_info.nrOfSymbols);
if (reuse_old_tda && nrOfLayers == retInfo->nrOfLayers) {
/* Check the resource is enough for retransmission */
......@@ -1740,7 +1744,11 @@ static void pf_ul(module_id_t module_id,
sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1;
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot);
sched_pusch->tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, sched_pusch->time_domain_allocation);
sched_pusch->tda_info = get_ul_tda_info(current_BWP,
sched_ctrl->coreset->controlResourceSetId,
sched_ctrl->search_space->searchSpaceType->present,
TYPE_C_RNTI_,
sched_pusch->time_domain_allocation);
sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
current_BWP,
&sched_pusch->tda_info,
......@@ -1840,7 +1848,11 @@ static void pf_ul(module_id_t module_id,
sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1;
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot);
sched_pusch->tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, sched_pusch->time_domain_allocation);
sched_pusch->tda_info = get_ul_tda_info(current_BWP,
sched_ctrl->coreset->controlResourceSetId,
sched_ctrl->search_space->searchSpaceType->present,
TYPE_C_RNTI_,
sched_pusch->time_domain_allocation);
sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
current_BWP,
&sched_pusch->tda_info,
......@@ -1943,7 +1955,10 @@ static bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_
NR_UE_UL_BWP_t *current_BWP = &nr_mac->UE_info.list[0]->current_UL_BWP;
int mu = current_BWP->scs;
const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot);
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP,
sched_ctrl->coreset->controlResourceSetId,
sched_ctrl->search_space->searchSpaceType->present,
TYPE_C_RNTI_);
int K2 = get_K2(tdaList, temp_tda, mu);
const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023;
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
......@@ -2119,8 +2134,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
cur_harq->feedback_slot = sched_pusch->slot;
cur_harq->is_waiting = true;
int rnti_types[2] = { NR_RNTI_C, 0 };
/* Statistics */
AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, "Indexing ulsch_rounds[%d] is out of bounds\n", cur_harq->round);
UE->mac_stats.ul.rounds[cur_harq->round]++;
......@@ -2385,7 +2398,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
dci_pdu,
&uldci_payload,
current_BWP->dci_format,
rnti_types[0],
TYPE_C_RNTI_,
current_BWP->bwp_id,
ss,
coreset,
......
......@@ -1071,7 +1071,7 @@ void handle_ssb_meas(NR_UE_MAC_INST_t *mac, uint8_t ssb_index, int16_t rsrp_dbm)
// L2 Abstraction Layer
// Note: sdu should always be processed because data and timing advance updates are transmitted by the UE
int8_t handle_dlsch(nr_downlink_indication_t *dl_info, int pdu_id)
static int8_t handle_dlsch(nr_downlink_indication_t *dl_info, int pdu_id)
{
/* L1 assigns harq_pid, but in emulated L1 mode we need to assign
the harq_pid based on the saved global g_harq_pid. Because we are
......
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