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OpenXG-RAN
Commits
3faeff23
Commit
3faeff23
authored
Sep 04, 2020
by
Thomas Schlichter
Browse files
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Plain Diff
fixing compile errors and some warnings
parent
0e96ad6a
Changes
6
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Showing
6 changed files
with
12 additions
and
16 deletions
+12
-16
openair1/PHY/CODING/nr_rate_matching.c
openair1/PHY/CODING/nr_rate_matching.c
+3
-5
openair1/PHY/NR_TRANSPORT/nr_ulsch.c
openair1/PHY/NR_TRANSPORT/nr_ulsch.c
+0
-1
openair1/PHY/NR_TRANSPORT/nr_ulsch.h
openair1/PHY/NR_TRANSPORT/nr_ulsch.h
+2
-0
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+0
-1
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+1
-3
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+6
-6
No files found.
openair1/PHY/CODING/nr_rate_matching.c
View file @
3faeff23
...
...
@@ -236,13 +236,12 @@ void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f)
}
*/
int
j2
=
0
;
fp
=
f
;
switch
(
Qm
)
{
case
2
:
e0
=
e
;
e1
=
e0
+
EQm
;
for
(
int
j
=
0
;
j
<
EQm
;
j
++
,
j2
+=
2
){
for
(
int
j
=
0
,
j2
=
0
;
j
<
EQm
;
j
++
,
j2
+=
2
){
fp
=&
f
[
j2
];
fp
[
0
]
=
e0
[
j
];
fp
[
1
]
=
e1
[
j
];
...
...
@@ -253,7 +252,7 @@ void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f)
e1
=
e0
+
EQm
;
e2
=
e1
+
EQm
;
e3
=
e2
+
EQm
;
for
(
int
j
=
0
;
j
<
EQm
;
j
++
,
j2
+=
4
){
for
(
int
j
=
0
,
j2
=
0
;
j
<
EQm
;
j
++
,
j2
+=
4
){
fp
=&
f
[
j2
];
fp
[
0
]
=
e0
[
j
];
fp
[
1
]
=
e1
[
j
];
...
...
@@ -287,7 +286,7 @@ void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f)
e5
=
e4
+
EQm
;
e6
=
e5
+
EQm
;
e7
=
e6
+
EQm
;
for
(
int
j
=
0
;
j
<
EQm
;
j
++
,
j2
+=
8
){
for
(
int
j
=
0
,
j2
=
0
;
j
<
EQm
;
j
++
,
j2
+=
8
){
fp
=&
f
[
j2
];
fp
[
0
]
=
e0
[
j
];
fp
[
1
]
=
e1
[
j
];
...
...
@@ -310,7 +309,6 @@ void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f)
void
nr_deinterleaving_ldpc
(
uint32_t
E
,
uint8_t
Qm
,
int16_t
*
e
,
int16_t
*
f
)
{
int
j2
;
int16_t
*
e1
,
*
e2
,
*
e3
,
*
e4
,
*
e5
,
*
e6
,
*
e7
;
switch
(
Qm
)
{
case
2
:
...
...
openair1/PHY/NR_TRANSPORT/nr_ulsch.c
View file @
3faeff23
...
...
@@ -111,7 +111,6 @@ void nr_ulsch_unscrambling_optim(int16_t* llr,
uint32_t
n_RNTI
)
{
#if defined(__x86_64__) || defined(__i386__)
uint8_t
reset
;
uint32_t
x1
,
x2
,
s
=
0
;
x2
=
(
n_RNTI
<<
15
)
+
Nid
;
...
...
openair1/PHY/NR_TRANSPORT/nr_ulsch.h
View file @
3faeff23
...
...
@@ -88,4 +88,6 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB,
uint8_t
harq_pid
);
int16_t
find_nr_ulsch
(
uint16_t
rnti
,
PHY_VARS_gNB
*
gNB
,
find_type_t
type
);
void
dump_pusch_stats
(
PHY_VARS_gNB
*
gNB
);
void
clear_pusch_stats
(
PHY_VARS_gNB
*
gNB
);
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
View file @
3faeff23
...
...
@@ -432,7 +432,6 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
int
tx_offset
,
ap
;
int32_t
**
txdata
;
int32_t
**
txdataF
;
uint8_t
Nl
=
UE
->
ulsch
[
thread_id
][
gNB_id
][
0
]
->
harq_processes
[
harq_pid
]
->
pusch_pdu
.
nrOfLayers
;
// cw 0
/////////////////////////IFFT///////////////////////
///////////
...
...
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
3faeff23
...
...
@@ -2933,7 +2933,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
return
-
1
;
}
else
{
// This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
if
(
pdsch
==
RA_PDSCH
)
ue
->
pdsch_vars
_ra
[
eNB_id
]
->
llr_offset
[
m
]
=
ue
->
pdsch_vars_ra
[
eNB_id
]
->
llr_offset
[
m
-
1
];
if
(
pdsch
==
RA_PDSCH
)
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
]
=
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]]
[
eNB_id
]
->
llr_offset
[
m
-
1
];
else
if
(
pdsch
==
PDSCH
)
{
if
(
nr_rx_pdsch
(
ue
,
pdsch
,
...
...
@@ -3892,7 +3892,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int
coreset_nb_rb
=
0
;
int
coreset_start_rb
=
0
;
int
symbol_offset_in_subframe
=
0
;
if
(
pdcch_vars
->
nb_search_space
>
0
)
get_coreset_rballoc
(
pdcch_vars
->
pdcch_config
[
0
].
coreset
.
frequency_domain_resource
,
&
coreset_nb_rb
,
&
coreset_start_rb
);
...
...
@@ -3903,7 +3902,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
if
((
ue
->
decode_MIB
==
1
)
&&
slot_pbch
)
{
LOG_I
(
PHY
,
" ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------
\n
"
,
frame_rx
%
1024
,
nr_tti_rx
);
symbol_offset_in_subframe
=
(
nr_tti_rx
%
fp
->
slots_per_subframe
)
*
fp
->
symbols_per_slot
;
for
(
int
i
=
1
;
i
<
4
;
i
++
)
{
nr_slot_fep
(
ue
,
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
3faeff23
...
...
@@ -464,15 +464,15 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
}
if
(
get_softmodem_params
()
->
phy_test
==
0
)
nr_schedule_RA
(
module_idP
,
frame
_txP
,
slot_txP
);
nr_schedule_RA
(
module_idP
,
frame
,
slot
);
else
UE_list
->
fiveG_connected
[
UE_id
]
=
true
;
if
(
get_softmodem_params
()
->
phy_test
==
1
)
{
if
(
slot
_txP
==
7
){
if
(
slot
==
7
){
NR_RA_t
*
ra
=
&
RC
.
nrmac
[
module_idP
]
->
common_channels
[
0
].
ra
[
0
];
ra
->
Msg2_frame
=
frame
_txP
;
ra
->
Msg2_slot
=
slot
_txP
;
ra
->
Msg2_frame
=
frame
;
ra
->
Msg2_slot
=
slot
;
ra
->
state
=
Msg2
;
ra
->
bwp_id
=
1
;
NR_CellGroupConfig_t
*
secondaryCellGroup
=
UE_list
->
secondaryCellGroup
[
UE_id
];
...
...
@@ -486,8 +486,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
AssertFatal
(
ra
->
ra_ss
!=
NULL
,
"no search space for RA'n"
);
nr_generate_Msg2
(
module_idP
,
0
/*CC_id*/
,
frame
_txP
,
slot
_txP
);
frame
,
slot
);
}
}
...
...
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