Commit 745ea1c1 authored by Laurent THOMAS's avatar Laurent THOMAS Committed by Robert Schmidt

Use gold cache for PDSCH decoding

parent 99c8dd42
......@@ -150,34 +150,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
nr_generate_modulation_table();
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
//PDSCH DMRS init
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
// ceil(((NB_RB*12(k)*2(QPSK)/32) // 3 RE *2(QPSK)
const int pdsch_dmrs_init_length = ((fp->N_RB_DL*24)>>5)+1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = malloc16(pdsch_dmrs_init_length * sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
memset(pdsch_dmrs[slot][symb][q], 0, sizeof(uint32_t) * pdsch_dmrs_init_length);
}
}
}
for (int nscid = 0; nscid < NR_NB_NSCID; nscid++) {
gNB->pdsch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_init_pdsch_dmrs(gNB, nscid, cfg->cell_config.phy_cell_id.value);
}
//PUSCH DMRS init
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
......@@ -320,17 +292,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(meas->n0_subband_power);
free_and_zero(meas->n0_subband_power_dB);
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q = 0; q < NR_NB_NSCID; q++)
free_and_zero(pdsch_dmrs[slot][symb][q]);
free_and_zero(pdsch_dmrs[slot][symb]);
}
free_and_zero(pdsch_dmrs[slot]);
}
free_and_zero(gNB->nr_gold_pdsch_dmrs);
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
for(int nscid = 0; nscid < 2; nscid++) {
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
......
......@@ -304,28 +304,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
common_vars->rxdata[i] = malloc16_clear(num_samples * sizeof(c16_t));
}
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
//PDSCH DMRS init (eNB offset = 0)
ue->nr_gold_pdsch[0] = malloc16(fp->slots_per_frame * sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = ue->nr_gold_pdsch[0];
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdsch_dmrs[slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = malloc16(NR_NB_NSCID * sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = malloc16(pdsch_dmrs_init_length * sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
}
}
}
// DLSCH
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
prach_vars[gNB_id] = malloc16_clear(sizeof(NR_UE_PRACH));
......@@ -408,21 +386,6 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
}
free_and_zero(common_vars->rxdata);
for (int slot=0; slot<fp->slots_per_frame; slot++) {
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
for (int q=0; q<NR_NB_NSCID; q++)
free_and_zero(ue->nr_gold_pdsch[0][slot][symb][q]);
free_and_zero(ue->nr_gold_pdsch[0][slot][symb]);
}
free_and_zero(ue->nr_gold_pdsch[0][slot]);
}
free_and_zero(ue->nr_gold_pdsch[0]);
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB+1; gNB_id++) {
// PDSCH
}
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (int i=0; i<NR_MAX_NB_PORTS; i++) {
......
......@@ -21,27 +21,6 @@
#include "nr_refsig.h"
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
int pdsch_dmrs_init_length = ((fp->N_RB_DL * 12) >> 5) + 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
uint8_t reset = 1;
uint32_t x1 = 0;
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + ((Nid << 1) + nscid));
uint32_t x2 = temp_x2 % (1U << 31);
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d, Nid %d, nscid %d, x2 %x\n",slot, symb, Nid, nscid, x2);
for (uint32_t n = 0; n < pdsch_dmrs_init_length; n++) {
pdsch_dmrs[slot][symb][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
......
......@@ -22,26 +22,6 @@
#include "refsig_defs_ue.h"
#include "openair1/PHY/LTE_TRANSPORT/transport_proto.h" // for lte_gold_generic()
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
int nscid,
uint32_t nid)
{
int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL * 12) >> 5) + 1;
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
uint8_t reset = 1;
uint64_t x2tmp0 = ((ue->frame_parms.symbols_per_slot * ns + l + 1) * ((nid << 1) + 1)) << 17;
uint32_t x1 = 0;
uint32_t x2 = (x2tmp0 + (nid << 1) + nscid) % (1U << 31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, nscid %d, x2 %x\n", ns, l, nscid, x2);
for (int n = 0; n < pdsch_dmrs_init_length; n++) {
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, uint16_t N_n_scid, uint8_t n_scid)
{
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
......
......@@ -39,7 +39,6 @@ void nr_init_prs(PHY_VARS_gNB* gNB);
@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
*/
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
......
......@@ -27,5 +27,6 @@
uint32_t *gold_cache(uint32_t key, int length);
uint32_t *nr_gold_pbch(int Lmax, int Nid, int n_hf, int ssb);
uint32_t *nr_gold_pdcch(int N_RB_DL, int symbols_per_slot, unsigned short n_idDMRS, int ns, int l);
uint32_t *nr_gold_pdsch(int N_RB_DL, int symbols_per_slot, int nid, int nscid, int slot, int symbol);
#endif
......@@ -183,3 +183,12 @@ uint32_t *nr_gold_pdcch(int N_RB_DL, int symbols_per_slot, unsigned short nid, i
LOG_D(PHY, "PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", ns, l, nid, x2);
return gold_cache(x2, pdcch_dmrs_init_length);
}
uint32_t *nr_gold_pdsch(int N_RB_DL, int symbols_per_slot, int nid, int nscid, int slot, int symbol)
{
int pdsch_dmrs_init_length = ((N_RB_DL * 24) >> 5) + 1;
uint64_t x2tmp0 = (((uint64_t)symbols_per_slot * slot + symbol + 1) * (((uint64_t)nid << 1) + 1)) << 17;
uint32_t x2 = (x2tmp0 + (nid << 1) + nscid) % (1U << 31); // cinit
LOG_D(PHY, "UE DMRS slot %d, symb %d, nscid %d, x2 %x\n", slot, symbol, nscid, x2);
return gold_cache(x2, pdsch_dmrs_init_length);
}
......@@ -51,10 +51,6 @@ int nr_pdsch_dmrs_rx(const PHY_VARS_NR_UE *ue,
unsigned short nb_pdsch_rb,
uint8_t config_type);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
int nscid,
uint32_t nid);
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t N_n_scid,
uint8_t n_scid);
......
......@@ -76,12 +76,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
rel15->BWPStart,rel15->BWPSize,rel15->rbStart,rel15->rbSize);
const int n_dmrs = (rel15->BWPStart + rel15->rbStart + rel15->rbSize) * nb_re_dmrs;
if(rel15->dlDmrsScramblingId != gNB->pdsch_gold_init[rel15->SCID]) {
gNB->pdsch_gold_init[rel15->SCID] = rel15->dlDmrsScramblingId;
nr_init_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId);
}
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
const int dmrs_symbol_map = rel15->dlDmrsSymbPos; // single DMRS: 010000100 Double DMRS 110001100
const int xOverhead = 0;
const int nb_re =
......@@ -251,9 +245,10 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
l_prime = 0;
}
/// DMRS QPSK modulation
nr_modulation(pdsch_dmrs[l_symbol][rel15->SCID],
n_dmrs * DMRS_MOD_ORDER,
DMRS_MOD_ORDER,
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
const uint32_t *gold =
nr_gold_pdsch(fp->N_RB_DL, fp->symbols_per_slot, rel15->dlDmrsScramblingId, rel15->SCID, slot, l_symbol);
nr_modulation(gold, n_dmrs * DMRS_MOD_ORDER, DMRS_MOD_ORDER,
(int16_t *)mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH
......@@ -276,7 +271,10 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
LOG_D(PHY, "Doing ptrs modulation for symbol %d, n_ptrs %d\n", l_symbol, n_ptrs);
nr_modulation(pdsch_dmrs[l_symbol][rel15->SCID], n_ptrs * DMRS_MOD_ORDER, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
const uint32_t *gold =
nr_gold_pdsch(fp->N_RB_DL, fp->symbols_per_slot, rel15->dlDmrsScramblingId, rel15->SCID, slot, l_symbol);
nr_modulation(gold, n_ptrs * DMRS_MOD_ORDER, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
}
}
uint16_t k = start_sc;
......
......@@ -888,12 +888,8 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
// generate pilot
int pilot[(nb_rb_coreset + dmrs_ref) * 3] __attribute__((aligned(16)));
// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
nr_pdcch_dmrs_rx(ue,
slot,
nr_gold_pdcch(ue->frame_parms.N_RB_DL, ue->frame_parms.symbols_per_slot, scrambling_id, slot, symbol),
(c16_t *)pilot,
2000,
(nb_rb_coreset + dmrs_ref));
const uint32_t *gold = nr_gold_pdcch(ue->frame_parms.N_RB_DL, ue->frame_parms.symbols_per_slot, scrambling_id, slot, symbol);
nr_pdcch_dmrs_rx(ue, slot, gold, (c16_t *)pilot, 2000, (nb_rb_coreset + dmrs_ref));
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
......@@ -1423,35 +1419,33 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
c16_t rxdataF[][rxdataFsize],
uint32_t *nvar)
{
int gNB_id = proc->gNB_id;
int Ns = proc->nr_slot_rx;
const int ch_offset = ue->frame_parms.ofdm_symbol_size * symbol;
const int symbol_offset = ue->frame_parms.ofdm_symbol_size * symbol;
// int gNB_id = proc->gNB_id;
int slot = proc->nr_slot_rx;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
const int ch_offset = fp->ofdm_symbol_size * symbol;
const int symbol_offset = fp->ofdm_symbol_size * symbol;
#ifdef DEBUG_PDSCH
printf("PDSCH Channel Estimation : gNB_id %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, bwp_start_subcarrier=%d symbol %d\n",
gNB_id,
ch_offset,
symbol_offset,
ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,
Ns,
bwp_start_subcarrier,
symbol);
printf(
"PDSCH Channel Estimation : gNB_id %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, bwp_start_subcarrier=%d "
"symbol %d\n",
gNB_id,
ch_offset,
symbol_offset,
fp->ofdm_symbol_size,
fp->Ncp,
slot,
bwp_start_subcarrier,
symbol);
#endif
// generate pilot for gNB port number 1000+p
int8_t delta = get_delta(p, config_type);
// checking if re-initialization of scrambling IDs is needed
if (scrambling_id != ue->scramblingID_dlsch[nscid]) {
ue->scramblingID_dlsch[nscid] = scrambling_id;
nr_gold_pdsch(ue, nscid, scrambling_id);
}
c16_t pilot[3280] __attribute__((aligned(16)));
// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
nr_pdsch_dmrs_rx(ue, Ns, ue->nr_gold_pdsch[gNB_id][Ns][symbol][nscid], pilot, 1000 + p, 0, nb_rb_pdsch + rb_offset, config_type);
const uint32_t *gold = nr_gold_pdsch(fp->N_RB_DL, fp->symbols_per_slot, scrambling_id, nscid, slot, symbol);
nr_pdsch_dmrs_rx(ue, slot, gold, pilot, 1000 + p, 0, nb_rb_pdsch + rb_offset, config_type);
delay_t delay = {0};
......@@ -1639,6 +1633,8 @@ void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
/*------------------------------------------------------------------------------------------------------- */
/* 1) Estimate common phase error per PTRS symbol */
/*------------------------------------------------------------------------------------------------------- */
const uint32_t *gold =
nr_gold_pdsch(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, frame_parms->Nid_cell, nscid, nr_slot_rx, symbol);
nr_ptrs_cpe_estimation(*K_ptrs,
*ptrsReOffset,
*nb_rb,
......@@ -1647,8 +1643,8 @@ void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
symbol,
frame_parms->ofdm_symbol_size,
(int16_t *)(rxdataF_comp[0][aarx] + symbol * nb_re_pdsch),
ue->nr_gold_pdsch[gNB_id][nr_slot_rx][symbol][nscid],
(int16_t*)&phase_per_symbol[symbol],
gold,
(int16_t *)&phase_per_symbol[symbol],
&ptrs_re_symbol[symbol]);
}
}// HARQ 0
......
......@@ -407,12 +407,6 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// the n_frames we got sync
ue->init_sync_frame = n_frames - 1 - res.syncRes.frame_id;
// compute the scrambling IDs for PDSCH DMRS
for (int i = 0; i < NR_NB_NSCID; i++) {
ue->scramblingID_dlsch[i] = fp->Nid_cell;
nr_gold_pdsch(ue, i, ue->scramblingID_dlsch[i]);
}
nr_init_csi_rs(fp, ue->nr_csi_info->nr_gold_csi_rs, fp->Nid_cell);
// initialize the pusch dmrs
......
......@@ -609,9 +609,6 @@ typedef struct PHY_VARS_gNB_s {
/// PBCH interleaver
uint8_t nr_pbch_interleaver[NR_POLAR_PBCH_PAYLOAD_BITS];
/// PDSCH DMRS sequence
uint32_t ****nr_gold_pdsch_dmrs;
/// PUSCH DMRS
uint32_t ****nr_gold_pusch_dmrs;
......@@ -635,7 +632,6 @@ typedef struct PHY_VARS_gNB_s {
/// counter to average prach energh over first 100 prach opportunities
int prach_energy_counter;
int pdsch_gold_init[2];
int pusch_gold_init[2];
int ap_N1;
......
......@@ -407,13 +407,6 @@ typedef struct PHY_VARS_NR_UE_s {
uint32_t dmrs_pbch_bitmap_nr[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE];
#endif
/// PDSCH DMRS
uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDSCH DMRS
uint16_t scramblingID_dlsch[2];
// Scrambling IDs used in PUSCH DMRS
uint16_t scramblingID_ulsch[2];
......
......@@ -840,12 +840,6 @@ int main(int argc, char **argv)
init_nr_ue_transport(UE);
// compute the scrambling IDs for PDSCH DMRS
for (int i = 0; i < 2; i++) {
UE->scramblingID_dlsch[i] = frame_parms->Nid_cell;
nr_gold_pdsch(UE, i, UE->scramblingID_dlsch[i]);
}
nr_l2_init_ue(1);
UE_mac = get_mac_inst(0);
ue_init_config_request(UE_mac, mu);
......
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