Commit 7fd8f6f6 authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/tx-thread-fix' into integration_2022_wk05

parents 27ac95f5 0f2adea4
......@@ -35,7 +35,7 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms;
int32_t **txdataF = gNB->common_vars.txdataF;
int txdataF_offset = (slot%2)*frame_parms.samples_per_slot_wCP;
int txdataF_offset = slot*frame_parms.samples_per_slot_wCP;
uint32_t **gold_csi_rs = gNB->nr_gold_csi_rs[slot];
int16_t mod_csi[frame_parms.symbols_per_slot][NR_MAX_CSI_RS_LENGTH>>1] __attribute__((aligned(16)));;
uint16_t b = csi_params.freq_domain;
......
......@@ -66,12 +66,11 @@ void nr_pdcch_scrambling(uint32_t *in,
}
}
void nr_generate_dci(PHY_VARS_gNB *gNB,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration
uint16_t cset_start_sc;
......@@ -84,7 +83,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
int n_rb;
// compute rb_offset and n_prb based on frequency allocation
nr_fill_cce_list(gNB,0,pdcch_pdu_rel15);
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
nr_fill_cce_list(cce_list,0,pdcch_pdu_rel15);
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
......@@ -175,7 +175,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for(int p2 = 0; p2 < dci_pdu->AggregationLevel; p2++) {
if(gNB->cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
if(cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
reg_list_order[reg_list_index] = p2;
reg_list_index++;
break;
......@@ -191,7 +191,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) {
k = cset_start_sc + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
k = cset_start_sc + cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
if (k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
......@@ -200,9 +200,9 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx) * 3;
dmrs_idx = (cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx) * 3;
else
dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
dmrs_idx = (cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
k_prime = 0;
......@@ -250,21 +250,20 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
}
void nr_generate_dci_top(PHY_VARS_gNB *gNB,
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
void nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n");
if (pdcch_pdu) {
nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
nr_generate_dci(&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
}
if (ul_dci_pdu) {
nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
nr_generate_dci(&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
}
}
......@@ -29,7 +29,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
uint16_t N_RB);
void nr_generate_dci_top(PHY_VARS_gNB *gNB,
void nr_generate_dci_top(
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_dl_tti_pdcch_pdu *ul_pdcch_pdu,
uint32_t **gold_pdcch_dmrs,
......@@ -57,6 +57,6 @@ void nr_fill_ul_dci(PHY_VARS_gNB *gNB,
int slot,
nfapi_nr_ul_dci_request_pdus_t *pdcch_pdu);
void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m,nfapi_nr_dl_tti_pdcch_pdu_rel15_t *);
void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL], uint8_t m,nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15);
#endif //__PHY_NR_TRANSPORT_DCI__H
......@@ -119,7 +119,7 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint16_t n_shift, uint8_t m) {
*/
void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15) {
void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL], uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15) {
nr_cce_t* cce;
nr_reg_t* reg;
......@@ -156,7 +156,7 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
if (pdcch_pdu_rel15->dci_pdu[d].RNTI != 0xFFFF) LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->dci_pdu[d].CceIndex);
for (uint8_t cce_idx=0; cce_idx<L; cce_idx++) {
cce = &gNB->cce_list[d][cce_idx];
cce = &cce_list[d][cce_idx];
cce->cce_idx = pdcch_pdu_rel15->dci_pdu[d].CceIndex + cce_idx;
LOG_D(PHY, "cce_idx %d\n", cce->cce_idx);
......
This diff is collapsed.
......@@ -219,8 +219,7 @@ void nr_init_pbch_interleaver(uint8_t *interleaver) {
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_ssb++);
}
int nr_generate_pbch(NR_gNB_PBCH *pbch,
nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
int nr_generate_pbch(nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
uint8_t *interleaver,
int32_t *txdataF,
int16_t amp,
......@@ -239,6 +238,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint64_t a_reversed=0;
LOG_D(PHY, "PBCH generation started\n");
///Payload generation
NR_gNB_PBCH m_pbch;
NR_gNB_PBCH *pbch = &m_pbch;
memset((void *)pbch, 0, sizeof(NR_gNB_PBCH));
pbch->pbch_a=0;
uint8_t ssb_index = ssb_pdu->ssb_pdu_rel15.SsbBlockIndex;
......
......@@ -24,8 +24,7 @@
//#define NR_PSS_DEBUG
int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF,
int nr_generate_pss( int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t* config,
......@@ -33,6 +32,7 @@ int nr_generate_pss( int16_t *d_pss,
{
int i,k,l,m;
int16_t a;
int16_t d_pss[NR_PSS_LENGTH];
int16_t x[NR_PSS_LENGTH];
const int x_initial[7] = {0, 1, 1 , 0, 1, 1, 1};
......
......@@ -23,8 +23,7 @@
//#define NR_SSS_DEBUG
int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF,
int nr_generate_sss( int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t* config,
......@@ -34,6 +33,7 @@ int nr_generate_sss( int16_t *d_sss,
int m0, m1;
int Nid, Nid1, Nid2;
//int16_t a;
int16_t d_sss[NR_SSS_LENGTH];
int16_t x0[NR_SSS_LENGTH], x1[NR_SSS_LENGTH];
const int x0_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
......
......@@ -44,8 +44,7 @@
@param
@returns 0 on success
*/
int nr_generate_pss(int16_t *d_pss,
int32_t *txdataF,
int nr_generate_pss(int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t *config,
......@@ -57,8 +56,7 @@ int nr_generate_pss(int16_t *d_pss,
@param
@returns 0 on success
*/
int nr_generate_sss(int16_t *d_sss,
int32_t *txdataF,
int nr_generate_sss(int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t *config,
......@@ -83,8 +81,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
@param
@returns 0 on success
*/
int nr_generate_pbch(NR_gNB_PBCH *pbch,
nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
int nr_generate_pbch(nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
uint8_t *interleaver,
int32_t *txdataF,
int16_t amp,
......
......@@ -753,7 +753,6 @@ typedef struct PHY_VARS_gNB_s {
// nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu;
uint16_t num_pdsch_rnti[80];
NR_gNB_PBCH pbch;
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
NR_gNB_COMMON common_vars;
NR_gNB_PRACH prach_vars;
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_NR_ULSCH_MAX];
......@@ -776,9 +775,6 @@ typedef struct PHY_VARS_gNB_s {
// PUCCH0 Look-up table for cyclic-shifts
NR_gNB_PUCCH0_LUT_t pucch0_lut;
/// NR synchronization sequences
int16_t d_pss[NR_PSS_LENGTH];
int16_t d_sss[NR_SSS_LENGTH];
/// PBCH DMRS sequence
uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
......
......@@ -155,7 +155,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
int aa = 0;//physical antenna number
int ret = 0;
int ofdm_mask_full = (1<<(ru->nb_tx*2))-1;
int txdataF_offset = ((tti_tx%2)*fp->samples_per_slot_wCP);
int txdataF_offset = (tti_tx*fp->samples_per_slot_wCP);
if (nr_slot_select(cfg,frame_tx,slot) == NR_UPLINK_SLOT) return;
for (aa=0; aa<ru->nb_tx; aa++) memset(ru->common.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
......@@ -300,7 +300,7 @@ static void *nr_feptx_thread(void *param) {
ofdm_mask_full = (1<<(ru->nb_tx*2))-1;
if(ru->num_gNB != 0){
txdataF_offset = ((slot%2)*fp->samples_per_slot_wCP);
txdataF_offset = (slot*fp->samples_per_slot_wCP);
////////////precoding////////////
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->index+1 , 1);
......@@ -464,7 +464,7 @@ void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) {
int32_t ***bw;
int i=0;
int slot_tx = tti_tx;
int txdataF_offset = ((tti_tx%2)*fp->samples_per_slot_wCP);
int txdataF_offset = (tti_tx*fp->samples_per_slot_wCP);
start_meas(&ru->precoding_stats);
AssertFatal(ru->nb_log_antennas > 0,"ru->nb_log_antennas is 0!\n");
......
......@@ -74,7 +74,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
int **txdataF = gNB->common_vars.txdataF;
uint8_t ssb_index, n_hf;
uint16_t ssb_start_symbol;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
int txdataF_offset = slot*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = (fp->slots_per_frame)>>1;
if (slot<slots_per_hf)
......@@ -91,8 +91,8 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
......@@ -114,8 +114,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot+j] = cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value;
}
nr_generate_pbch(&gNB->pbch,
&ssb_pdu,
nr_generate_pbch(&ssb_pdu,
gNB->nr_pbch_interleaver,
&txdataF[0][txdataF_offset],
AMP,
......@@ -134,7 +133,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
int txdataF_offset = slot*fp->samples_per_slot_wCP;
if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
(nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT)) return;
......@@ -168,7 +167,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1);
nr_generate_dci_top(gNB,
nr_generate_dci_top(
num_dl_dci > 0 ? &msgTx->pdcch_pdu : NULL,
num_ul_dci > 0 ? &msgTx->ul_pdcch_pdu.pdcch_pdu : NULL,
gNB->nr_gold_pdcch_dmrs[slot],
......
......@@ -1104,7 +1104,7 @@ int main(int argc, char **argv)
else
phy_procedures_gNB_TX(msgDataTx,frame,slot,1);
int txdataF_offset = (slot%2) * frame_parms->samples_per_slot_wCP;
int txdataF_offset = slot * frame_parms->samples_per_slot_wCP;
if (n_trials==1) {
LOG_M("txsigF0.m","txsF0=", &gNB->common_vars.txdataF[0][txdataF_offset+2*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
......
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