Commit 82c0b441 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/simplify-faster-gold-sequences' into integration_2024_w30

parents bb9af4c7 b8089ba9
......@@ -1017,6 +1017,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_csi_rs.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_scrambling.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/scrambling_luts.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/refsig.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
)
......@@ -1042,7 +1043,6 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/ul_ref_seq_nr.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gen_mod_table.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/dmrs_nr.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/ptrs_nr.c
......
......@@ -143,109 +143,16 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
gNB->max_nb_pdsch = MAX_MOBILES_PER_GNB;
init_delay_table(fp->ofdm_symbol_size, MAX_DELAY_COMP, NR_MAX_OFDM_SYMBOL_SIZE, fp->delay_table);
// PBCH DMRS gold sequences generation
nr_init_pbch_dmrs(gNB);
//PDCCH DMRS init
gNB->nr_gold_pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
gNB->bad_pucch = 0;
if (gNB->TX_AMP == 0)
gNB->TX_AMP = AMP;
// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(pdcch_dmrs_init_length*sizeof(uint32_t));
LOG_D(PHY,"pdcch_dmrs[%d][%d] %p\n",slot,symb,pdcch_dmrs[slot][symb]);
AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
nr_generate_modulation_table();
gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value;
nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
//PDSCH DMRS init
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
// ceil(((NB_RB*12(k)*2(QPSK)/32) // 3 RE *2(QPSK)
const int pdsch_dmrs_init_length = ((fp->N_RB_DL*24)>>5)+1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = malloc16(pdsch_dmrs_init_length * sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
memset(pdsch_dmrs[slot][symb][q], 0, sizeof(uint32_t) * pdsch_dmrs_init_length);
}
}
}
for (int nscid = 0; nscid < NR_NB_NSCID; nscid++) {
gNB->pdsch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_init_pdsch_dmrs(gNB, nscid, cfg->cell_config.phy_cell_id.value);
}
//PUSCH DMRS init
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for(int nscid=0; nscid<NR_NB_NSCID; nscid++) {
pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[nscid][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pusch_dmrs[nscid][slot]!=NULL, "NR init: pusch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[nscid][slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pusch_dmrs[nscid][slot][symb]!=NULL, "NR init: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
}
for (int nscid=0; nscid<NR_NB_NSCID; nscid++) {
gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
}
// CSI RS init
// ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32)
int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
gNB->nr_csi_info = (nr_csi_info_t *)malloc16_clear(sizeof(nr_csi_info_t));
gNB->nr_csi_info->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame * sizeof(uint32_t **));
AssertFatal(gNB->nr_csi_info->nr_gold_csi_rs != NULL, "NR init: csi reference signal malloc failed\n");
for (int slot=0; slot<fp->slots_per_frame; slot++) {
gNB->nr_csi_info->nr_gold_csi_rs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot * sizeof(uint32_t *));
AssertFatal(gNB->nr_csi_info->nr_gold_csi_rs[slot] != NULL, "NR init: csi reference signal for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
gNB->nr_csi_info->nr_gold_csi_rs[slot][symb] = (uint32_t *)malloc16(csi_dmrs_init_length * sizeof(uint32_t));
AssertFatal(gNB->nr_csi_info->nr_gold_csi_rs[slot][symb] != NULL, "NR init: csi reference signal for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
gNB->nr_csi_info->csi_gold_init = cfg->cell_config.phy_cell_id.value;
nr_init_csi_rs(&gNB->frame_parms, gNB->nr_csi_info->nr_gold_csi_rs, cfg->cell_config.phy_cell_id.value);
//PRS init
nr_init_prs(gNB);
generate_ul_reference_signal_sequences(SHRT_MAX);
......@@ -330,7 +237,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
const int Ptx = gNB->gNB_config.carrier_config.num_tx_ant.value;
const int Prx = gNB->gNB_config.carrier_config.num_rx_ant.value;
const int max_ul_mimo_layers = 4; // taken from phy_init_nr_gNB()
......@@ -342,43 +248,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(meas->n0_subband_power);
free_and_zero(meas->n0_subband_power_dB);
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++)
free_and_zero(pdcch_dmrs[slot][symb]);
free_and_zero(pdcch_dmrs[slot]);
}
free_and_zero(pdcch_dmrs);
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q = 0; q < NR_NB_NSCID; q++)
free_and_zero(pdsch_dmrs[slot][symb][q]);
free_and_zero(pdsch_dmrs[slot][symb]);
}
free_and_zero(pdsch_dmrs[slot]);
}
free_and_zero(gNB->nr_gold_pdsch_dmrs);
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
for(int nscid = 0; nscid < 2; nscid++) {
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++)
free_and_zero(pusch_dmrs[nscid][slot][symb]);
free_and_zero(pusch_dmrs[nscid][slot]);
}
free_and_zero(pusch_dmrs[nscid]);
}
free_and_zero(pusch_dmrs);
uint32_t ***nr_gold_csi_rs = gNB->nr_csi_info->nr_gold_csi_rs;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++)
free_and_zero(nr_gold_csi_rs[slot][symb]);
free_and_zero(nr_gold_csi_rs[slot]);
}
free_and_zero(nr_gold_csi_rs);
free_and_zero(gNB->nr_csi_info);
for (int id = 0; id < gNB->max_nb_srs; id++) {
......@@ -401,17 +270,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(common_vars->beam_id[i]);
}
for (int rsc=0; rsc < gNB->prs_vars.NumPRSResources; rsc++) {
for (int slot=0; slot<fp->slots_per_frame; slot++) {
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
free_and_zero(gNB->nr_gold_prs[rsc][slot][symb]);
}
free_and_zero(gNB->nr_gold_prs[rsc][slot]);
}
free_and_zero(gNB->nr_gold_prs[rsc]);
}
free_and_zero(gNB->nr_gold_prs);
/* Do NOT free per-antenna txdataF/rxdataF: the gNB gets a pointer to the
* RU's txdataF/rxdataF, and the RU will free that */
free_and_zero(common_vars->txdataF);
......
This diff is collapsed.
......@@ -112,7 +112,7 @@ const char nr_W_4l_4p[5][4][4] = {
{{'1', '1', '1', '1'}, {'1', 'n', '1', 'n'}, {'j', 'j', 'o', 'o'}, {'j', 'o', 'o', 'j'}} // pmi 4
};
void nr_modulation(uint32_t *in,
void nr_modulation(const uint32_t *in,
uint32_t length,
uint16_t mod_order,
int16_t *out)
......@@ -120,8 +120,8 @@ void nr_modulation(uint32_t *in,
uint16_t mask = ((1<<mod_order)-1);
int32_t* nr_mod_table32;
int32_t* out32 = (int32_t*) out;
uint8_t* in_bytes = (uint8_t*) in;
uint64_t* in64 = (uint64_t*) in;
const uint8_t *in_bytes = (const uint8_t *)in;
const uint64_t *in64 = (const uint64_t *)in;
int64_t* out64 = (int64_t*) out;
uint32_t i=0;
......
......@@ -42,7 +42,7 @@ extern const char nr_W_4l_4p[5][4][4];
@param[out] out, complex valued modulated symbols
*/
void nr_modulation(uint32_t *in,
void nr_modulation(const uint32_t *in,
uint32_t length,
uint16_t mod_order,
int16_t *out);
......
......@@ -103,16 +103,18 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
if (pusch_pdu->transform_precoding == transformPrecoder_disabled) {
// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
const uint32_t *gold = nr_gold_pusch(fp->N_RB_UL,
fp->symbols_per_slot,
gNB->gNB_config.cell_config.phy_cell_id.value,
pusch_pdu->scid,
Ns,
symbol);
nr_pusch_dmrs_rx(gNB,
Ns,
gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol],
gold,
pilot,
(1000 + p),
0,
......@@ -552,6 +554,12 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
/*------------------------------------------------------------------------------------------------------- */
/* 1) Estimate common phase error per PTRS symbol */
/*------------------------------------------------------------------------------------------------------- */
const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
frame_parms->symbols_per_slot,
gNB->gNB_config.cell_config.phy_cell_id.value,
rel15_ul->scid,
nr_tti_rx,
symbol);
nr_ptrs_cpe_estimation(*K_ptrs,
*ptrsReOffset,
*nb_rb,
......@@ -560,7 +568,7 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
symbol,
frame_parms->ofdm_symbol_size,
(int16_t *)&pusch_vars->rxdataF_comp[aarx][(symbol * nb_re_pusch)],
gNB->nr_gold_pusch_dmrs[rel15_ul->scid][nr_tti_rx][symbol],
gold,
(int16_t *)&phase_per_symbol[symbol],
ptrs_re_symbol);
}
......
......@@ -61,7 +61,7 @@ uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type);
void nr_gen_ref_conj_symbols(uint32_t *in, uint32_t length, int16_t *output, uint16_t offset, int mod_order);
void nr_gen_ref_conj_symbols(const uint32_t *in, uint32_t length, int16_t *output, uint16_t offset, int mod_order);
int8_t get_next_dmrs_symbol_in_slot(uint16_t ul_dmrs_symb_pos, uint8_t counter, uint8_t end_symbol);
uint8_t get_dmrs_symbols_in_slot(uint16_t l_prime_mask, uint16_t nb_symb, uint8_t start);
int8_t get_valid_dmrs_idx_for_channel_est(uint16_t dmrs_symb_pos, uint8_t counter);
......
......@@ -66,7 +66,7 @@ int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p) {
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
unsigned int *nr_gold_pusch,
const uint32_t *nr_gold_pusch,
c16_t *output,
unsigned short p,
unsigned char lp,
......@@ -120,9 +120,9 @@ int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
return(0);
}
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
int nr_pdsch_dmrs_rx(const PHY_VARS_NR_UE *ue,
unsigned int Ns,
unsigned int *nr_gold_pdsch,
const unsigned int *nr_gold_pdsch,
c16_t *output,
unsigned short p,
unsigned char lp,
......@@ -170,9 +170,9 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
return(0);
}
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
int nr_pdcch_dmrs_rx(const PHY_VARS_NR_UE *ue,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
const unsigned int *nr_gold_pdcch,
c16_t *output,
unsigned short p,
unsigned short nb_rb_coreset)
......@@ -245,7 +245,7 @@ void nr_pbch_dmrs_rx(int symbol, const unsigned int *nr_gold_pbch, c16_t *output
\param length is number of RE in a OFDM symbol
\param *output pointer to all ptrs RE in a OFDM symbol
*/
void nr_gen_ref_conj_symbols(uint32_t *in, uint32_t length, c16_t *output, uint16_t offset, int mod_order)
void nr_gen_ref_conj_symbols(const uint32_t *in, uint32_t length, c16_t *output, uint16_t offset, int mod_order)
{
uint8_t idx, b_idx;
for (int i=0; i<length/mod_order; i++)
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "nr_refsig.h"
void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
{
unsigned int x1 = 0, x2 = 0;
uint16_t Nid, i_ssb, i_ssb2;
unsigned char Lmax, l, n_hf, N_hf;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint8_t reset;
Nid = cfg->cell_config.phy_cell_id.value;
Lmax = fp->Lmax;
N_hf = (Lmax == 4)? 2:1;
for (n_hf = 0; n_hf < N_hf; n_hf++) {
for (l = 0; l < Lmax ; l++) {
i_ssb = l & (Lmax-1);
i_ssb2 = i_ssb + (n_hf<<2);
reset = 1;
x2 = (1<<11) * (i_ssb2 + 1) * ((Nid>>2) + 1) + (1<<6) * (i_ssb2 + 1) + (Nid&3);
for (uint8_t n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) {
gNB->nr_gold_pbch_dmrs[n_hf][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
int pdcch_dmrs_init_length = (((fp->N_RB_DL << 1) * 3) >> 5) + 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
uint8_t reset = 1;
uint32_t x1 = 0;
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + (Nid << 1));
uint32_t x2 = temp_x2 % (1U << 31);
LOG_D(PHY,"PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", slot, symb, Nid, x2);
for (uint32_t n = 0; n < pdcch_dmrs_init_length; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
int pdsch_dmrs_init_length = ((fp->N_RB_DL * 12) >> 5) + 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
uint8_t reset = 1;
uint32_t x1 = 0;
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + ((Nid << 1) + nscid));
uint32_t x2 = temp_x2 % (1U << 31);
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d, Nid %d, nscid %d, x2 %x\n",slot, symb, Nid, nscid, x2);
for (uint32_t n = 0; n < pdsch_dmrs_init_length; n++) {
pdsch_dmrs[slot][symb][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1;
for (int ns = 0; ns < fp->slots_per_frame; ns++) {
for (int l = 0; l < fp->symbols_per_slot; l++) {
int reset = 1;
uint32_t x1 = 0;
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * ns + l + 1) * ((nid << 1) + 1) + ((nid << 1) + nscid));
uint32_t x2 = temp_x2 % (1U << 31);
LOG_D(PHY,"DMRS slot %d, symb %d, nscid %d, nid %d, x2 %x\n", ns, l, nscid, nid, x2);
for (int n = 0; n < pusch_dmrs_init_length; n++) {
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_init_prs(PHY_VARS_gNB* gNB)
{
unsigned int x1 = 0, x2 = 0;
uint16_t Nid;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
gNB->nr_gold_prs = (uint32_t ****)malloc16(gNB->prs_vars.NumPRSResources*sizeof(uint32_t ***));
uint32_t ****prs = gNB->nr_gold_prs;
AssertFatal(prs!=NULL, "NR init: positioning reference signal malloc failed\n");
for (int rsc=0; rsc < gNB->prs_vars.NumPRSResources; rsc++) {
prs[rsc] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(prs[rsc]!=NULL, "NR init: positioning reference signal for rsc %d - malloc failed\n", rsc);
for (int slot=0; slot<fp->slots_per_frame; slot++) {
prs[rsc][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(prs[rsc][slot]!=NULL, "NR init: positioning reference signal for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
prs[rsc][slot][symb] = (uint32_t *)malloc16(NR_MAX_PRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(prs[rsc][slot][symb]!=NULL, "NR init: positioning reference signal for rsc %d slot %d symbol %d - malloc failed\n", rsc, slot, symb);
}
}
}
uint8_t reset;
uint8_t slotNum, symNum, rsc_id;
for (rsc_id = 0; rsc_id < gNB->prs_vars.NumPRSResources; rsc_id++) {
Nid = gNB->prs_vars.prs_cfg[rsc_id].NPRSID; // seed value
LOG_I(PHY, "Initiaized NR-PRS sequence with PRS_ID %3d for resource %d\n", Nid, rsc_id);
for (slotNum = 0; slotNum < fp->slots_per_frame; slotNum++) {
for (symNum = 0; symNum < fp->symbols_per_slot ; symNum++) {
reset = 1;
// initial x2 for prs as ts138.211
uint32_t c_init1, c_init2, c_init3;
uint32_t pow22=1<<22;
uint32_t pow10=1<<10;
c_init1 = pow22*ceil(Nid/1024);
c_init2 = pow10*(slotNum+symNum+1)*(2*(Nid%1024)+1);
c_init3 = Nid%1024;
x2 = c_init1 + c_init2 + c_init3;
for (uint8_t n=0; n<NR_MAX_PRS_INIT_LENGTH_DWORD; n++) {
gNB->nr_gold_prs[rsc_id][slotNum][symNum][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
//printf("%d \n",gNB->nr_gold_prs[slotNum][symNum][n]);
}
}
}
}
}
......@@ -20,132 +20,7 @@
*/
#include "refsig_defs_ue.h"
void nr_gold_pbch(uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD], int Nid, int Lmax)
{
unsigned int n = 0, x1 = 0, x2 = 0;
unsigned int i_ssb, i_ssb2;
unsigned char l, n_hf, N_hf;
uint8_t reset;
N_hf = (Lmax == 4)? 2:1;
for (n_hf = 0; n_hf < N_hf; n_hf++) {
for (l = 0; l < Lmax ; l++) {
i_ssb = l & (Lmax-1);
i_ssb2 = i_ssb + (n_hf<<2);
reset = 1;
x2 = (1<<11) * (i_ssb2 + 1) * ((Nid>>2) + 1) + (1<<6) * (i_ssb2 + 1) + (Nid&3);
for (n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) {
nr_gold_pbch[n_hf][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned short nid)
{
int pdcch_dmrs_init_length = (((ue->frame_parms.N_RB_DL << 1) * 3) >> 5) + 1;
for (int ns = 0; ns < ue->frame_parms.slots_per_frame; ns++) {
for (int l = 0; l < ue->frame_parms.symbols_per_slot; l++) {
uint8_t reset = 1;
uint64_t x2tmp0 = ((ue->frame_parms.symbols_per_slot * ns + l + 1) * ((nid << 1) + 1));
x2tmp0 <<= 17;
x2tmp0 += (nid << 1);
uint32_t x1 = 0;
uint32_t x2 = x2tmp0 % (1U << 31); //cinit
LOG_D(PHY,"PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", ns, l, nid, x2);
for (int n = 0; n < pdcch_dmrs_init_length; n++) {
ue->nr_gold_pdcch[0][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
int nscid,
uint32_t nid)
{
int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL * 12) >> 5) + 1;
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
uint8_t reset = 1;
uint64_t x2tmp0 = ((ue->frame_parms.symbols_per_slot * ns + l + 1) * ((nid << 1) + 1)) << 17;
uint32_t x1 = 0;
uint32_t x2 = (x2tmp0 + (nid << 1) + nscid) % (1U << 31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, nscid %d, x2 %x\n", ns, l, nscid, x2);
for (int n = 0; n < pdsch_dmrs_init_length; n++) {
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, uint16_t N_n_scid, uint8_t n_scid)
{
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
int reset = 1;
uint32_t x1 = 0;
uint64_t t_x2 = ((1UL << 17) * (fp->symbols_per_slot*slot + symb + 1) * ((N_n_scid << 1) + 1) + ((N_n_scid << 1) + n_scid));
uint32_t x2 = t_x2 % (1U << 31);
LOG_D(PHY,"DMRS slot %d, symb %d, N_n_scid %d, n_scid %d, x2 %x\n", slot, symb, N_n_scid, n_scid, x2);
for (int n = 0; n < pusch_dmrs_init_length; n++) {
pusch_dmrs[slot][symb][n_scid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void init_nr_gold_prs(PHY_VARS_NR_UE* ue)
{
unsigned int x1 = 0, x2 = 0;
uint16_t Nid;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
uint8_t reset;
uint8_t slotNum, symNum, gnb, rsc;
for(gnb = 0; gnb < ue->prs_active_gNBs; gnb++) {
for(rsc = 0; rsc < ue->prs_vars[gnb]->NumPRSResources; rsc++) {
Nid = ue->prs_vars[gnb]->prs_resource[rsc].prs_cfg.NPRSID; // seed value
LOG_I(PHY,"Initialised NR-PRS sequence with PRS_ID %3d for resource %d\n",Nid, rsc);
for (slotNum = 0; slotNum < fp->slots_per_frame; slotNum++) {
for (symNum = 0; symNum < fp->symbols_per_slot ; symNum++) {
reset = 1;
// initial x2 for prs as ts138.211
uint32_t c_init1, c_init2, c_init3;
uint32_t pow22=1<<22;
uint32_t pow10=1<<10;
c_init1 = pow22*ceil(Nid/1024);
c_init2 = pow10*(slotNum+symNum+1)*(2*(Nid%1024)+1);
c_init3 = Nid%1024;
x2 = c_init1 + c_init2 + c_init3;
for (uint8_t n=0; n<NR_MAX_PRS_INIT_LENGTH_DWORD; n++) {
ue->nr_gold_prs[gnb][rsc][slotNum][symNum][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
//printf("%d \n",gNB->nr_gold_prs[slotNum][symNum][n]);
}
}
}
} // for rsc
} // for gnb
}
#include "openair1/PHY/LTE_TRANSPORT/transport_proto.h" // for lte_gold_generic()
void sl_init_psbch_dmrs_gold_sequences(PHY_VARS_NR_UE *UE)
{
......
......@@ -25,35 +25,13 @@
#define __NR_REFSIG__H__
#include "PHY/defs_gNB.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/sse_intrin.h"
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS.
@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
*/
void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
/*
This function generates NR Gold Sequence(ts 138.211) for the PRS.
@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
*/
void nr_init_prs(PHY_VARS_gNB* gNB);
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS.
@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
*/
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
#include "openair1/PHY/NR_REFSIG/nr_refsig_common.h"
int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p);
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
unsigned int *nr_gold_pusch,
const uint32_t *nr_gold_pusch,
c16_t *output,
unsigned short p,
unsigned char lp,
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* Definitions for NR Reference signals */
#ifndef __NR_REFSIG_COMMON_H__
#define __NR_REFSIG_COMMON_H__
uint32_t *gold_cache(uint32_t key, int length);
uint32_t *nr_gold_pbch(int Lmax, int Nid, int n_hf, int ssb);
uint32_t *nr_gold_pdcch(int N_RB_DL, int symbols_per_slot, unsigned short n_idDMRS, int ns, int l);
uint32_t *nr_gold_pdsch(int N_RB_DL, int symbols_per_slot, int nid, int nscid, int slot, int symbol);
uint32_t *nr_gold_pusch(int N_RB_UL, int symbols_per_slot, int Nid, int nscid, int slot, int symbol);
uint32_t *nr_gold_csi_rs(int N_RB_DL, int symbols_per_slot, int slot, int symb, uint32_t Nid);
uint32_t *nr_gold_prs(int nid, int slot, int symbol);
#endif
......@@ -191,7 +191,7 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
unsigned char symbol,
uint16_t ofdm_symbol_size,
int16_t *rxF_comp,
uint32_t *gold_seq,
const uint32_t *gold_seq,
int16_t *error_est,
int32_t *ptrs_sc)
{
......
......@@ -95,7 +95,7 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
unsigned char symbol,
uint16_t ofdm_symbol_size,
int16_t *rxF_comp,
uint32_t *gold_seq,
const uint32_t *gold_seq,
int16_t *error_est,
int32_t *ptrs_sc);
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "nr_refsig.h"
#include "openair1/PHY/LTE_TRANSPORT/transport_proto.h" // for lte_gold_generic()
#define REFRESH_RATE (1000 * 100)
typedef struct {
int key;
int length;
int usage;
} gold_cache_t;
typedef struct {
uint32_t *table;
uint32_t tblSz;
int calls;
int iterate;
} gold_cache_table_t;
static const int roundedHeaderSz = (((sizeof(gold_cache_t) + 63) / 64) * 64) / sizeof(uint32_t);
static const int grain = 64 / sizeof(uint32_t);
// Allocate, also reorder to have the most frequent first, so the cache search is optimized
static void refresh_table(gold_cache_table_t *t, int sizeIncrease)
{
uint32_t *old = t->table;
uint oldSz = t->tblSz;
if (t->tblSz == 0)
t->tblSz = PAGE_SIZE / sizeof(*t->table);
if (sizeIncrease)
t->tblSz += max(sizeIncrease, PAGE_SIZE / sizeof(*t->table));
int ret = posix_memalign((void **)&t->table, 64, t->tblSz * sizeof(*t->table));
AssertFatal(ret == 0, "No more memory");
LOG_D(PHY,
"re-organize gold sequence table to %lu pages of memory calls since last reorder: %d, search rate: %f\n",
t->tblSz * sizeof(*t->table) / PAGE_SIZE,
t->calls,
t->calls ? t->iterate / (float)t->calls : 0.0);
int maxUsage;
uint32_t *currentTmp = t->table;
do {
maxUsage = 0;
gold_cache_t *entryToCopy = NULL;
for (uint32_t *searchmax = old; searchmax < old + oldSz; searchmax += roundedHeaderSz) {
gold_cache_t *tbl = (gold_cache_t *)searchmax;
if (!tbl->length)
break;
if (tbl->usage > maxUsage) {
maxUsage = tbl->usage;
entryToCopy = tbl;
}
searchmax += tbl->length;
}
if (maxUsage) {
memcpy(currentTmp, entryToCopy, (roundedHeaderSz + entryToCopy->length) * sizeof(*t->table));
currentTmp += roundedHeaderSz + entryToCopy->length;
entryToCopy->usage = 0;
}
} while (maxUsage);
const uint usedSz = currentTmp - t->table;
memset(t->table + usedSz, 0, (t->tblSz - usedSz) * sizeof(*t->table));
free(old);
t->calls = 0;
t->iterate = 0;
return;
}
static pthread_key_t gold_table_key;
static pthread_once_t gold_key_once = PTHREAD_ONCE_INIT;
static void delete_table(void *ptr)
{
gold_cache_table_t *table = (gold_cache_table_t *)ptr;
if (table->table)
free(table->table);
free(ptr);
}
static void make_table_key()
{
(void)pthread_key_create(&gold_table_key, delete_table);
}
uint32_t *gold_cache(uint32_t key, int length)
{
(void)pthread_once(&gold_key_once, make_table_key);
gold_cache_table_t *tableCache;
if ((tableCache = pthread_getspecific(gold_table_key)) == NULL) {
tableCache = calloc(1, sizeof(gold_cache_table_t));
(void)pthread_setspecific(gold_table_key, tableCache);
}
// align for AVX512
length = ((length + grain - 1) / grain) * grain;
tableCache->calls++;
// periodic refresh
if (tableCache->calls > REFRESH_RATE)
refresh_table(tableCache, 0);
uint32_t *ptr = tableCache->table;
// check if already cached
for (; ptr < tableCache->table + tableCache->tblSz; ptr += roundedHeaderSz) {
gold_cache_t *tbl = (gold_cache_t *)ptr;
tableCache->iterate++;
if (tbl->length >= length && tbl->key == key) {
tbl->usage++;
return ptr + roundedHeaderSz;
}
if (tbl->key == key) {
// We use a longer sequence, same key
// let's delete the shorter and force reorganize
tbl->usage = 0;
tableCache->calls += REFRESH_RATE;
}
if (!tbl->length)
break;
ptr += tbl->length;
}
// not enough space in the table
if (!ptr || ptr > tableCache->table + tableCache->tblSz - (2 * roundedHeaderSz + length))
refresh_table(tableCache, 2 * roundedHeaderSz + length);
// We will add a new entry
uint32_t *firstFree;
int size = 0;
for (firstFree = tableCache->table; firstFree < tableCache->table + tableCache->tblSz; firstFree += roundedHeaderSz) {
gold_cache_t *tbl = (gold_cache_t *)firstFree;
if (!tbl->length)
break;
firstFree += tbl->length;
size++;
}
if (!tableCache->calls)
LOG_D(PHY, "Number of entries (after reorganization) in gold cache: %d\n", size);
gold_cache_t *new = (gold_cache_t *)firstFree;
*new = (gold_cache_t){.key = key, .length = length, .usage = 1};
unsigned int x1 = 0, x2 = key;
uint32_t *sequence = firstFree + roundedHeaderSz;
*sequence++ = lte_gold_generic(&x1, &x2, 1);
for (int n = 1; n < length; n++)
*sequence++ = lte_gold_generic(&x1, &x2, 0);
LOG_D(PHY, "created a gold sequence, start %d; len %d\n", key, length);
return firstFree + roundedHeaderSz;
}
uint32_t *nr_gold_pbch(int Lmax, int Nid, int n_hf, int l)
{
int i_ssb = l & (Lmax - 1);
int i_ssb2 = i_ssb + (n_hf << 2);
uint32_t x2 = (1 << 11) * (i_ssb2 + 1) * ((Nid >> 2) + 1) + (1 << 6) * (i_ssb2 + 1) + (Nid & 3);
return gold_cache(x2, NR_PBCH_DMRS_LENGTH_DWORD);
}
uint32_t *nr_gold_pdcch(int N_RB_DL, int symbols_per_slot, unsigned short nid, int ns, int l)
{
int pdcch_dmrs_init_length = (((N_RB_DL << 1) * 3) >> 5) + 1;
uint64_t x2tmp0 = (((uint64_t)symbols_per_slot * ns + l + 1) * ((nid << 1) + 1));
x2tmp0 <<= 17;
x2tmp0 += (nid << 1);
uint32_t x2 = x2tmp0 % (1U << 31); // cinit
LOG_D(PHY, "PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", ns, l, nid, x2);
return gold_cache(x2, pdcch_dmrs_init_length);
}
uint32_t *nr_gold_pdsch(int N_RB_DL, int symbols_per_slot, int nid, int nscid, int slot, int symbol)
{
int pdsch_dmrs_init_length = ((N_RB_DL * 24) >> 5) + 1;
uint64_t x2tmp0 = (((uint64_t)symbols_per_slot * slot + symbol + 1) * (((uint64_t)nid << 1) + 1)) << 17;
uint32_t x2 = (x2tmp0 + (nid << 1) + nscid) % (1U << 31); // cinit
LOG_D(PHY, "UE DMRS slot %d, symb %d, nscid %d, x2 %x\n", slot, symbol, nscid, x2);
return gold_cache(x2, pdsch_dmrs_init_length);
}
uint32_t *nr_gold_pusch(int N_RB_UL, int symbols_per_slot, int Nid, int nscid, int slot, int symbol)
{
return nr_gold_pdsch(N_RB_UL, symbols_per_slot, Nid, nscid, slot, symbol);
}
uint32_t *nr_gold_csi_rs(int N_RB_DL, int symbols_per_slot, int slot, int symb, uint32_t Nid)
{
int csi_dmrs_init_length = ((N_RB_DL << 4) >> 5) + 1;
uint64_t temp_x2 = (1ULL << 10) * ((uint64_t)symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + Nid;
uint32_t x2 = temp_x2 % (1U << 31);
return gold_cache(x2, csi_dmrs_init_length);
}
uint32_t *nr_gold_prs(int Nid, int slotNum, int symNum)
{
LOG_D(PHY, "Initialised NR-PRS sequence for PCI %d\n", Nid);
// initial x2 for prs as ts138.211
uint32_t pow22 = 1 << 22;
uint32_t pow10 = 1 << 10;
uint32_t c_init1 = pow22 * ceil(Nid / 1024);
uint32_t c_init2 = pow10 * (slotNum + symNum + 1) * (2 * (Nid % 1024) + 1);
uint32_t c_init3 = Nid % 1024;
uint32_t x2 = c_init1 + c_init2 + c_init3;
return gold_cache(x2, NR_MAX_PRS_INIT_LENGTH_DWORD);
}
......@@ -25,7 +25,7 @@
#define __NR_REFSIG_DEFS__H__
#include "PHY/defs_nr_UE.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "nr_refsig_common.h"
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
......@@ -35,37 +35,22 @@ void nr_pbch_dmrs_rx(int dmrss, const unsigned int *nr_gold_pbch, c16_t *output,
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
*/
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
int nr_pdcch_dmrs_rx(const PHY_VARS_NR_UE *ue,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
const unsigned int *nr_gold_pdcch,
c16_t *output,
unsigned short p,
unsigned short nb_rb_corset);
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
int nr_pdsch_dmrs_rx(const PHY_VARS_NR_UE *ue,
unsigned int Ns,
unsigned int *nr_gold_pdsch,
const unsigned int *nr_gold_pdsch,
c16_t *output,
unsigned short p,
unsigned char lp,
unsigned short nb_pdsch_rb,
uint8_t config_type);
void nr_gold_pbch(uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD], int Nid, int Lmax);
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned short n_idDMRS);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
int nscid,
uint32_t nid);
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t N_n_scid,
uint8_t n_scid);
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
void init_nr_gold_prs(PHY_VARS_NR_UE* ue);
void sl_generate_pss(SL_NR_UE_INIT_PARAMS_t *sl_init_params, uint8_t n_sl_id2, uint16_t scaling);
void sl_generate_pss_ifft_samples(sl_nr_ue_phy_params_t *sl_ue_params, SL_NR_UE_INIT_PARAMS_t *sl_init_params);
void sl_generate_sss(SL_NR_UE_INIT_PARAMS_t *sl_init_params, uint16_t slss_id, uint16_t scaling);
......
......@@ -24,23 +24,6 @@
//#define NR_CSIRS_DEBUG
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid)
{
uint32_t x1 = 0;
int csi_dmrs_init_length = ((fp->N_RB_DL << 4) >> 5) + 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
uint8_t reset = 1;
uint32_t x2 = ((1 << 10) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + Nid);
for (uint32_t n = 0; n < csi_dmrs_init_length; n++) {
csi_rs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms,
int32_t **dataF,
const int16_t amp,
......@@ -74,7 +57,6 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms,
#endif
int dataF_offset = slot * frame_parms->samples_per_slot_wCP;
uint32_t **nr_gold_csi_rs = nr_csi_info->nr_gold_csi_rs[slot];
//*8(max allocation per RB)*2(QPSK))
int csi_rs_length = frame_parms->N_RB_DL << 4;
int16_t mod_csi[frame_parms->symbols_per_slot][csi_rs_length>>1] __attribute__((aligned(16)));
......@@ -82,19 +64,11 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms,
uint32_t beta = amp;
nr_csi_info->csi_rs_generated_signal_bits = log2_approx(amp);
AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
// if the scrambling id is not the one previously used to initialize we need to re-initialize the rs
if (csi_params->scramb_id != nr_csi_info->csi_gold_init) {
nr_csi_info->csi_gold_init = csi_params->scramb_id;
nr_init_csi_rs(frame_parms, nr_csi_info->nr_gold_csi_rs, csi_params->scramb_id);
}
AssertFatal(b != 0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
int size, ports, kprime, lprime;
int j[16], k_n[6], koverline[16], loverline[16];
int found = 0;
int fi = 0;
// implementation of table 7.4.1.5.3-1 of 38.211
// lprime and kprime are the max value of l' and k'
switch (csi_params->row) {
......@@ -581,14 +555,25 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms,
for (int lp = 0; lp <= lprime; lp++) {
int symb = csi_params->symb_l0;
nr_modulation(nr_gold_csi_rs[symb + lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb + lp]);
if ((csi_params->row == 5) || (csi_params->row == 7) || (csi_params->row == 11) || (csi_params->row == 13) || (csi_params->row == 16))
nr_modulation(nr_gold_csi_rs[symb + 1], csi_length, DMRS_MOD_ORDER, mod_csi[symb + 1]);
if ((csi_params->row == 14) || (csi_params->row == 13) || (csi_params->row == 16) || (csi_params->row == 17)) {
const uint32_t *gold =
nr_gold_csi_rs(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, slot, symb + lp, csi_params->scramb_id);
nr_modulation(gold, csi_length, DMRS_MOD_ORDER, mod_csi[symb + lp]);
uint8_t row = csi_params->row;
if ((row == 5) || (row == 7) || (row == 11) || (row == 13) || (row == 16)) {
const uint32_t *gold =
nr_gold_csi_rs(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, slot, symb + 1, csi_params->scramb_id);
nr_modulation(gold, csi_length, DMRS_MOD_ORDER, mod_csi[symb + 1]);
}
if ((row == 14) || (row == 13) || (row == 16) || (row == 17)) {
symb = csi_params->symb_l1;
nr_modulation(nr_gold_csi_rs[symb + lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb + lp]);
if ((csi_params->row == 13) || (csi_params->row == 16))
nr_modulation(nr_gold_csi_rs[symb + 1], csi_length, DMRS_MOD_ORDER, mod_csi[symb + 1]);
const uint32_t *gold =
nr_gold_csi_rs(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, slot, symb + lp, csi_params->scramb_id);
nr_modulation(gold, csi_length, DMRS_MOD_ORDER, mod_csi[symb + lp]);
if ((row == 13) || (row == 16)) {
const uint32_t *gold =
nr_gold_csi_rs(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, slot, symb + 1, csi_params->scramb_id);
nr_modulation(gold, csi_length, DMRS_MOD_ORDER, mod_csi[symb + 1]);
}
}
}
......
......@@ -41,29 +41,13 @@
//#define DEBUG_DCI
//#define DEBUG_CHANNEL_CODING
void nr_pdcch_scrambling(uint32_t *in,
uint32_t size,
uint32_t Nid,
uint32_t scrambling_RNTI,
uint32_t *out) {
uint8_t reset;
uint32_t x1 = 0, x2 = 0, s = 0;
reset = 1;
x2 = (scrambling_RNTI<<16) + Nid;
LOG_D(NR_PHY_DCI, "PDCCH Scrambling x2 %x : scrambling_RNTI %x \n", x2, scrambling_RNTI);
for (int i=0; i<size; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
if (i) {
in++;
out++;
}
}
(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
}
static void nr_pdcch_scrambling(uint32_t *in, uint32_t size, uint32_t Nid, uint32_t scrambling_RNTI, uint32_t *out)
{
int roundedSz = ((size + 31) / 32);
uint32_t *seq = gold_cache((scrambling_RNTI << 16) + Nid, roundedSz);
LOG_D(NR_PHY_DCI, "PDCCH scrambling_RNTI %x \n", scrambling_RNTI);
for (int i = 0; i < roundedSz; i++)
out[i] = in[i] ^ seq[i];
}
void nr_generate_dci(PHY_VARS_gNB *gNB,
......@@ -95,13 +79,6 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
* in time: by its first slot and its first symbol*/
const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
gNB->pdcch_gold_init = dci_pdu->ScramblingId;
nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
}
uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
dci_idx = 0;
......@@ -131,9 +108,10 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
/// DMRS QPSK modulation
for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) {
const uint32_t *gold = nr_gold_pdcch(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, dci_pdu->ScramblingId, slot, symb);
nr_modulation(gold, dmrs_length, DMRS_MOD_ORDER,
mod_dmrs[symb]); // Qm = 2 as DMRS is QPSK modulated
nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_PDCCH_DMRS
if(dci_pdu->RNTI!=0xFFFF) {
for (int i=0; i<dmrs_length>>1; i++)
......
......@@ -32,12 +32,6 @@ void nr_generate_dci_top(processingData_L1tx_t *msgTx,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms);
void nr_pdcch_scrambling(uint32_t *in,
uint32_t size,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t *out);
int16_t find_nr_pdcch(int frame,int slot, PHY_VARS_gNB *gNB,find_type_t type);
void nr_fill_dci(PHY_VARS_gNB *gNB,
......
......@@ -76,12 +76,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
rel15->BWPStart,rel15->BWPSize,rel15->rbStart,rel15->rbSize);
const int n_dmrs = (rel15->BWPStart + rel15->rbStart + rel15->rbSize) * nb_re_dmrs;
if(rel15->dlDmrsScramblingId != gNB->pdsch_gold_init[rel15->SCID]) {
gNB->pdsch_gold_init[rel15->SCID] = rel15->dlDmrsScramblingId;
nr_init_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId);
}
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
const int dmrs_symbol_map = rel15->dlDmrsSymbPos; // single DMRS: 010000100 Double DMRS 110001100
const int xOverhead = 0;
const int nb_re =
......@@ -251,9 +245,10 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
l_prime = 0;
}
/// DMRS QPSK modulation
nr_modulation(pdsch_dmrs[l_symbol][rel15->SCID],
n_dmrs * DMRS_MOD_ORDER,
DMRS_MOD_ORDER,
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
const uint32_t *gold =
nr_gold_pdsch(fp->N_RB_DL, fp->symbols_per_slot, rel15->dlDmrsScramblingId, rel15->SCID, slot, l_symbol);
nr_modulation(gold, n_dmrs * DMRS_MOD_ORDER, DMRS_MOD_ORDER,
(int16_t *)mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH
......@@ -276,7 +271,10 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
LOG_D(PHY, "Doing ptrs modulation for symbol %d, n_ptrs %d\n", l_symbol, n_ptrs);
nr_modulation(pdsch_dmrs[l_symbol][rel15->SCID], n_ptrs * DMRS_MOD_ORDER, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
const uint32_t *gold =
nr_gold_pdsch(fp->N_RB_DL, fp->symbols_per_slot, rel15->dlDmrsScramblingId, rel15->SCID, slot, l_symbol);
nr_modulation(gold, n_ptrs * DMRS_MOD_ORDER, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
}
}
uint16_t k = start_sc;
......
......@@ -33,9 +33,9 @@
#include "PHY/defs_gNB.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/sse_intrin.h"
#include "executables/softmodem-common.h"
#include "openair1/PHY/NR_REFSIG/nr_refsig_common.h"
//#define DEBUG_PBCH
//#define DEBUG_PBCH_ENCODING
......@@ -143,27 +143,22 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
}
static void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint32_t Nid,
uint8_t nushift,
uint16_t M,
uint16_t length,
uint8_t encoded,
uint32_t unscrambling_mask) {
uint8_t reset, offset;
uint32_t x1 = 0, x2 = 0, s = 0;
uint32_t Nid,
uint8_t nushift,
uint16_t M,
uint16_t length,
uint8_t encoded,
uint32_t unscrambling_mask)
{
uint32_t *pbch_e = pbch->pbch_e;
reset = 1;
// x1 is set in lte_gold_generic
x2 = Nid;
const int len = (nushift * M + 31) / 32 + (length + 31) / 32;
uint32_t *s = gold_cache(Nid, len);
// The Gold sequence is shifted by nushift* M, so we skip (nushift*M /32) double words
for (int i=0; i<(uint16_t)ceil(((float)nushift*M)/32); i++) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
int goldIdx = (nushift * M + 31) / 32 - 1;
// Scrambling is now done with offset (nushift*M)%32
offset = (nushift*M)&0x1f;
uint8_t offset = (nushift * M) & 0x1f;
#ifdef DEBUG_PBCH_ENCODING
printf("Scrambling params: nushift %d M %d length %d encoded %d offset %d\n", nushift, M, length, encoded, offset);
#endif
......@@ -178,29 +173,22 @@ static void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
if ((unscrambling_mask>>i)&1)
pbch->pbch_a_prime ^= ((pbch->pbch_a_interleaved>>i)&1)<<i;
else {
if (((k+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
pbch->pbch_a_prime ^= (((pbch->pbch_a_interleaved>>i)&1) ^ ((s>>((k+offset)&0x1f))&1))<<i;
if (((k + offset) & 0x1f) == 0)
goldIdx++;
pbch->pbch_a_prime ^= (((pbch->pbch_a_interleaved >> i) & 1) ^ ((s[goldIdx] >> ((k + offset) & 0x1f)) & 1)) << i;
k++; /// k increase only when payload bit is not special bit
}
}
} else {
/// 2nd Scrambling
for (int i = 0; i < length; ++i) {
if (((i+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
pbch_e[i>>5] ^= (((s>>((i+offset)&0x1f))&1)<<(i&0x1f));
if (((i + offset) & 0x1f) == 0)
goldIdx++;
pbch_e[i >> 5] ^= (((s[goldIdx] >> ((i + offset) & 0x1f)) & 1) << (i & 0x1f));
}
}
}
void nr_init_pbch_interleaver(uint8_t *interleaver) {
uint8_t j_sfn=0, j_hrf=10, j_ssb=11, j_other=14;
memset((void *)interleaver,0, NR_POLAR_PBCH_PAYLOAD_BITS);
......
......@@ -3,18 +3,18 @@
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/sse_intrin.h"
#include "openair1/PHY/NR_REFSIG/refsig_defs_ue.h"
//#define DEBUG_PRS_MOD
//#define DEBUG_PRS_MAP
extern short nr_qpsk_mod_table[8];
int nr_generate_prs(uint32_t **nr_gold_prs,
c16_t *txdataF,
int16_t amp,
prs_config_t *prs_cfg,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms)
int nr_generate_prs(int slot,
c16_t *txdataF,
int16_t amp,
prs_config_t *prs_cfg,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms)
{
int k_prime = 0, k = 0, idx;
......@@ -42,8 +42,9 @@ int nr_generate_prs(uint32_t **nr_gold_prs,
k = (prs_cfg->REOffset+k_prime) % prs_cfg->CombSize + prs_cfg->RBOffset*12 + frame_parms->first_carrier_offset;
// QPSK modulation
uint32_t *gold = nr_gold_prs(prs_cfg->NPRSID, slot, l);
for (int m = 0; m < (12/prs_cfg->CombSize) * prs_cfg->NumRB; m++) {
idx = (((nr_gold_prs[l][(m<<1)>>5])>>((m<<1)&0x1f))&3);
idx = (((gold[(m << 1) >> 5]) >> ((m << 1) & 0x1f)) & 3);
mod_prs[m<<1] = nr_qpsk_mod_table[idx<<1];
mod_prs[(m<<1)+1] = nr_qpsk_mod_table[(idx<<1) + 1];
......
......@@ -31,45 +31,32 @@ void nr_codeword_scrambling(uint8_t *in,
uint32_t n_RNTI,
uint32_t* out)
{
uint32_t x1;
uint32_t x2 = (n_RNTI << 15) + (q << 14) + Nid;
uint32_t s = lte_gold_generic(&x1, &x2, 1);
for (int i = 0; i < ((size >> 5) + ((size & 0x1f) > 0 ? 1 : 0)); i++) {
const int roundedSz = (size + 31) / 32;
uint32_t *seq = gold_cache((n_RNTI << 15) + (q << 14) + Nid, roundedSz);
for (int i = 0; i < roundedSz; i++) {
simde__m256i c = ((simde__m256i*)in)[i];
uint32_t in32 = simde_mm256_movemask_epi8(simde_mm256_slli_epi16(c, 7));
out[i] = (in32 ^ s);
out[i] = in32 ^ seq[i];
DEBUG_SCRAMBLING(LOG_D(PHY, "in[%d] %x => %x\n", i, in32, out[i]));
s = lte_gold_generic(&x1, &x2, 0);
}
}
void nr_codeword_unscrambling(int16_t* llr, uint32_t size, uint8_t q, uint32_t Nid, uint32_t n_RNTI)
{
uint32_t x1;
uint32_t x2 = (n_RNTI << 15) + (q << 14) + Nid;
uint32_t s = 0;
const int roundedSz = (size + 31) / 32;
uint32_t *seq = gold_cache((n_RNTI << 15) + (q << 14) + Nid, roundedSz);
#if defined(__x86_64__) || defined(__i386__) || defined(__arm__) || defined(__aarch64__)
uint8_t *s8=(uint8_t *)&s;
simde__m128i *llr128 = (simde__m128i*)llr;
s = lte_gold_generic(&x1, &x2, 1);
for (int i = 0, j = 0; i < ((size >> 5) + ((size & 0x1f) > 0 ? 1 : 0)); i++, j += 4) {
for (int i = 0, j = 0; i < roundedSz; i++, j += 4) {
uint8_t *s8 = (uint8_t *)(seq + i);
llr128[j] = simde_mm_mullo_epi16(llr128[j],byte2m128i[s8[0]]);
llr128[j+1] = simde_mm_mullo_epi16(llr128[j+1],byte2m128i[s8[1]]);
llr128[j+2] = simde_mm_mullo_epi16(llr128[j+2],byte2m128i[s8[2]]);
llr128[j+3] = simde_mm_mullo_epi16(llr128[j+3],byte2m128i[s8[3]]);
s = lte_gold_generic(&x1, &x2, 0);
llr128[j + 3] = simde_mm_mullo_epi16(llr128[j + 3], byte2m128i[s8[3]]);
}
#else
uint8_t reset = 1;
for (uint32_t i=0; i<size; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
if (((s>>(i&0x1f))&1)==1)
if (seq[i / 32] & (1U << (i % 32)))
llr[i] = -llr[i];
}
#endif
......@@ -77,18 +64,14 @@ void nr_codeword_unscrambling(int16_t* llr, uint32_t size, uint8_t q, uint32_t N
void nr_codeword_unscrambling_init(int16_t *s2, uint32_t size, uint8_t q, uint32_t Nid, uint32_t n_RNTI)
{
uint32_t x1;
uint32_t x2 = (n_RNTI << 15) + (q << 14) + Nid;
const int roundedSz = (size + 31) / 32;
uint32_t *seq = gold_cache((n_RNTI << 15) + (q << 14) + Nid, roundedSz);
simde__m128i *s128=(simde__m128i *)s2;
uint32_t s = lte_gold_generic(&x1, &x2, 1);
uint8_t *s8=(uint8_t *)&s;
for (int i = 0; i < (size +31) >> 5; i++) {
for (int i = 0; i < roundedSz; i++) {
uint8_t *s8 = (uint8_t *)(seq + i);
*s128++ = byte2m128i[s8[0]];
*s128++ = byte2m128i[s8[1]];
*s128++ = byte2m128i[s8[2]];
*s128++ = byte2m128i[s8[3]];
s = lte_gold_generic(&x1, &x2, 0);
}
}
......@@ -40,7 +40,7 @@
NR_gNB_PHY_STATS_t *get_phy_stats(PHY_VARS_gNB *gNB, uint16_t rnti);
int nr_generate_prs(uint32_t **nr_gold_prs,
int nr_generate_prs(int slot,
c16_t *txdataF,
int16_t amp,
prs_config_t *prs_cfg,
......
......@@ -63,11 +63,7 @@ void nr_group_sequence_hopping(pucch_GroupHopping_t PUCCH_GroupHopping,
#endif
uint8_t f_ss=0,f_gh=0;
*u=0;
*v=0;
uint32_t c_init = 0;
uint32_t x1,s; // TS 38.211 Subclause 5.2.1
int l = 32, minShift = ((2*nr_slot_tx+n_hop)<<3);
int tmpShift =0;
*v = 0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_group_sequence_hopping] calculating u,v -> ");
#endif
......@@ -77,41 +73,39 @@ void nr_group_sequence_hopping(pucch_GroupHopping_t PUCCH_GroupHopping,
}
if (PUCCH_GroupHopping == enable) { // PUCCH_GroupHopping 'enabled'
c_init = floor(n_id/30); // we initialize c_init to calculate u,v according to 6.3.2.2.1 of 38.211
s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint32_t c_init = floor(n_id / 30); // we initialize c_init to calculate u,v according to 6.3.2.2.1 of 38.211
int l = 32, minShift = (2 * nr_slot_tx + n_hop) << 3;
uint32_t *seq = gold_cache(c_init, (minShift + 31) / 32 + 8); // TS 38.211 Subclause 5.2.1
int goldIdx = 0;
for (int m=0; m<8; m++) {
while(minShift >= l) {
s = lte_gold_generic(&x1, &c_init, 0);
goldIdx++;
l = l+32;
}
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>tmpShift)&1)));
AssertFatal(goldIdx < 8 + (minShift + 31) / 32, "");
int tmpShift = (minShift & ((1 << 5) - 1)); // minShift%32;
f_gh = f_gh + ((1 << m) * ((uint8_t)((seq[goldIdx] >> tmpShift) & 1)));
minShift ++;
}
f_gh = f_gh%30;
f_ss = n_id%30;
/* for (int m=0; m<8; m++){
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_slot_tx+n_hop)+m))&1))); // Not sure we have to use nr_slot_tx FIXME!!!
}
f_gh = f_gh%30;
f_ss = n_id%30;*/
f_ss = n_id % 30;
}
if (PUCCH_GroupHopping == disable) { // PUCCH_GroupHopping 'disabled'
c_init = (1<<5)*floor(n_id/30)+(n_id%30); // we initialize c_init to calculate u,v
s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint32_t c_init = (1 << 5) * floor(n_id / 30) + (n_id % 30); // we initialize c_init to calculate u,v
int goldIdx = 0;
f_ss = n_id%30;
l = 32, minShift = (2*nr_slot_tx+n_hop);
int l = 32, minShift = (2 * nr_slot_tx + n_hop);
while(minShift >= l) {
s = lte_gold_generic(&x1, &c_init, 0);
goldIdx++;
l = l+32;
}
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
*v = (uint8_t)((s>>tmpShift)&1);
// TS 38.211 Subclause 5.2.1
uint32_t *seq = gold_cache(c_init, goldIdx + 1);
int tmpShift = (minShift & ((1 << 5) - 1)); // minShift%32;
*v = (uint8_t)((seq[goldIdx] >> tmpShift) & 1);
// *v = (uint8_t)((s>>(2*nr_slot_tx+n_hop))&1); // Not sure we have to use nr_slot_tx FIXME!!!
}
......@@ -139,28 +133,27 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
double alpha = 0.5235987756;
uint32_t c_init = n_id; // we initialize c_init again to calculate n_cs
uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint8_t n_cs=0;
int l = 32, minShift = (14*8*nr_slot_tx )+ 8*(lnormal+lprime);
int tmpShift =0;
int l = 32, minShift = (14 * 8 * nr_slot_tx) + 8 * (lnormal + lprime);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init);
#endif
uint32_t *seq = gold_cache(c_init, 8 + (minShift + 31) / 32); // TS 38.211 Subclause 5.2.1
int goldIdx = 0;
for (int m=0; m<8; m++) {
while(minShift >= l) {
s = lte_gold_generic(&x1, &c_init, 0);
goldIdx++;
l = l+32;
}
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
AssertFatal(goldIdx < 8 + (minShift + 31) / 32, "");
int tmpShift = (minShift & ((1 << 5) - 1)); // minShift%32;
minShift ++;
n_cs = n_cs+((1<<m)*((uint8_t)((s>>tmpShift)&1)));
n_cs += (1 << m) * (uint8_t)((seq[goldIdx] >> tmpShift) & 1);
// calculating n_cs (Not sure we have to use nr_slot_tx FIXME!!!)
// n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_slot_tx) + 8*(lnormal+lprime) + m))&1)));
}
alpha = (alpha * (double)((m0+mcs+n_cs)%12));
alpha = alpha * (double)((m0 + mcs + n_cs) % 12);
#ifdef DEBUG_NR_PUCCH_TX
printf("n_cs=%d -> %lf\n",n_cs,alpha);
#endif
......
......@@ -1145,26 +1145,21 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
// first compute DMRS component
uint32_t x1 = 0, x2 = 0, sGold = 0;
uint8_t *sGold8 = (uint8_t *)&sGold;
const int scramble = pucch_pdu->dmrs_scrambling_id * 2;
// fixme: when MR2754 will be merged, use the gold sequence cache instead of regenerate each time
x2 = ((1ULL << 17) * ((NR_NUMBER_OF_SYMBOLS_PER_SLOT * slot + pucch_pdu->start_symbol_index + symb + 1) * (scramble + 1))
+ scramble)
% (1U << 31); // c_init calculation according to TS38.211 subclause
uint32_t x2 =
((1ULL << 17) * ((NR_NUMBER_OF_SYMBOLS_PER_SLOT * slot + pucch_pdu->start_symbol_index + symb + 1) * (scramble + 1))
+ scramble)
% (1U << 31); // c_init calculation according to TS38.211 subclause
#ifdef DEBUG_NR_PUCCH_RX
printf("slot %d, start_symbol_index %d, symbol %d, dmrs_scrambling_id %d\n",
slot,pucch_pdu->start_symbol_index,symb,pucch_pdu->dmrs_scrambling_id);
#endif
int reset = 1;
for (int i=0; i<=(pucch_pdu->prb_start>>2); i++) {
sGold = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
for (int group = 0; group < ngroup; group++) {
uint32_t *sGold = gold_cache(x2, pucch_pdu->prb_start / 4 + ngroup / 2);
for (int group = 0, goldIdx = pucch_pdu->prb_start / 4; group < ngroup; group++) {
// each group has 8*nc_group_size elements, compute 1 complex correlation with DMRS per group
// non-coherent combining across groups
uint8_t *sGold8 = (uint8_t *)&sGold[goldIdx];
simde__m64 dmrs_re = byte2m64_re[sGold8[(group & 1) << 1]];
int16_t *dmrs_re16 = (int16_t *)&dmrs_re;
simde__m64 dmrs_im = byte2m64_im[sGold8[(group & 1) << 1]];
......@@ -1237,22 +1232,22 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
} //aa
if ((group & 1) == 1)
sGold = lte_gold_generic(&x1, &x2, 0);
goldIdx++;
} // group
} // symb
uint32_t x1, x2, sGold = 0;
// unscrambling
x2 = ((pucch_pdu->rnti)<<15)+pucch_pdu->data_scrambling_id;
sGold = lte_gold_generic(&x1, &x2, 1);
uint8_t *sGold8 = (uint8_t *)&sGold;
uint32_t x2 = ((pucch_pdu->rnti) << 15) + pucch_pdu->data_scrambling_id;
#ifdef DEBUG_NR_PUCCH_RX
printf("x2 %x\n", x2);
#endif
uint32_t *sGold = gold_cache(x2, pucch_pdu->nr_of_symbols * prb_size_ext / 2);
int goldIdx = 0;
for (int symb=0;symb<pucch_pdu->nr_of_symbols;symb++) {
simde__m64 c_re[4], c_im[4];
int re_off=0;
for (int prb=0;prb<prb_size_ext;prb+=2,re_off+=16) {
uint8_t *sGold8 = (uint8_t *)(sGold + goldIdx);
for (int z = 0; z < 4; z++) {
c_re[z] = byte2m64_re[sGold8[z]];
c_im[z] = byte2m64_im[sGold8[z]];
......@@ -1332,7 +1327,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
r_re_ext[aa][symb][re_off+15],r_im_ext[aa][symb][re_off+15]);
#endif
}
sGold = lte_gold_generic(&x1, &x2, 0);
goldIdx++;
#ifdef DEBUG_NR_PUCCH_RX
printf("\n");
#endif
......
......@@ -68,7 +68,6 @@ c32_t nr_pbch_dmrs_correlation(const NR_DL_FRAME_PARMS *fp,
int nr_pbch_channel_estimation(const NR_DL_FRAME_PARMS *fp,
const sl_nr_ue_phy_params_t *sl_phy_params,
const uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD],
int estimateSz,
struct complex16 dl_ch_estimates[][estimateSz],
struct complex16 dl_ch_estimates_time[][fp->ofdm_symbol_size],
......
......@@ -39,6 +39,7 @@
#include "PHY/sse_intrin.h"
#include "common/utils/nr/nr_common.h"
#include <openair1/PHY/TOOLS/phy_scope_interface.h>
#include "openair1/PHY/NR_REFSIG/nr_refsig_common.h"
#include "assertions.h"
#include "T.h"
......@@ -655,25 +656,13 @@ static void nr_pdcch_unscrambling(c16_t *e_rx,
uint16_t pdcch_DMRS_scrambling_id,
int16_t *z2)
{
int i;
uint8_t reset;
uint32_t x1 = 0, x2 = 0, s = 0;
uint16_t n_id; //{0,1,...,65535}
uint32_t rnti = (uint32_t) scrambling_RNTI;
reset = 1;
// x1 is set in first call to lte_gold_generic
n_id = pdcch_DMRS_scrambling_id;
x2 = ((rnti << 16) + n_id) % (1U << 31); // this is c_init in 38.211 v15.1.0 Section 7.3.2.3
LOG_D(NR_PHY_DCI, "PDCCH Unscrambling x2 %x : scrambling_RNTI %x\n", x2, rnti);
uint16_t n_id = pdcch_DMRS_scrambling_id;
uint32_t *seq = gold_cache(((rnti << 16) + n_id) % (1U << 31), length / 32); // this is c_init in 38.211 v15.1.0 Section 7.3.2.3
LOG_D(NR_PHY_DCI, "PDCCH Unscrambling: scrambling_RNTI %x\n", rnti);
int16_t *ptr = &e_rx[0].r;
for (i = 0; i < length; i++) {
if ((i & 0x1f) == 0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
if (((s >> (i % 32)) & 1) == 1)
for (int i = 0; i < length; i++) {
if (seq[i / 32] & (1UL << (i % 32)))
z2[i] = -ptr[i];
else
z2[i] = ptr[i];
......
......@@ -71,7 +71,6 @@ static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc,
int *ssb_index,
int *symbol_offset,
fapiPbch_t *result,
const uint32_t nr_gold_pbch_ref[2][64][NR_PBCH_DMRS_LENGTH_DWORD],
const c16_t rxdataF[][frame_parms->samples_per_slot_wCP])
{
const int N_L = (frame_parms->Lmax == 4) ? 4 : 8;
......@@ -90,7 +89,7 @@ static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc,
i - pbch_initial_symbol,
Nid_cell,
ssb_start_subcarrier,
nr_gold_pbch_ref[hf][l],
nr_gold_pbch(frame_parms->Lmax, Nid_cell, hf, l),
rxdataF);
csum(cumul, cumul, meas);
}
......@@ -110,7 +109,6 @@ static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc,
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_channel_estimation(frame_parms,
NULL,
nr_gold_pbch_ref,
estimateSz,
dl_ch_estimates,
dl_ch_estimates_time,
......@@ -277,9 +275,7 @@ void nr_scan_ssb(void *arg)
#endif
ssbInfo->freqOffset = freq_offset_pss + freq_offset_sss;
uint32_t nr_gold_pbch_ref[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
if (ssbInfo->syncRes.cell_detected) { // we got sss channel
nr_gold_pbch(nr_gold_pbch_ref, ssbInfo->nidCell, fp->Lmax);
ssbInfo->syncRes.cell_detected = nr_pbch_detection(ssbInfo->proc,
ssbInfo->fp,
ssbInfo->nidCell,
......@@ -289,7 +285,6 @@ void nr_scan_ssb(void *arg)
&ssbInfo->ssbIndex,
&ssbInfo->symbolOffset,
&ssbInfo->pbchResult,
nr_gold_pbch_ref,
rxdataF); // start pbch detection at first symbol after pss
if (ssbInfo->syncRes.cell_detected) {
int rsrp_db_per_re = nr_ue_calculate_ssb_rsrp(ssbInfo->fp, ssbInfo->proc, rxdataF, 0, ssbInfo->gscnInfo.ssbFirstSC);
......@@ -406,7 +401,6 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// and we do not know yet in which slot it goes.
compensate_freq_offset(ue->common_vars.rxdata, fp, res.freqOffset, res.syncRes.frame_id);
}
nr_gold_pbch(ue->nr_gold_pbch, fp->Nid_cell, fp->Lmax);
// sync at symbol ue->symbol_offset
// computing the offset wrt the beginning of the frame
int mu = fp->numerology_index;
......@@ -419,24 +413,6 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// the n_frames we got sync
ue->init_sync_frame = n_frames - 1 - res.syncRes.frame_id;
// compute the scramblingID_pdcch and the gold pdcch
ue->scramblingID_pdcch = fp->Nid_cell;
nr_gold_pdcch(ue, fp->Nid_cell);
// compute the scrambling IDs for PDSCH DMRS
for (int i = 0; i < NR_NB_NSCID; i++) {
ue->scramblingID_dlsch[i] = fp->Nid_cell;
nr_gold_pdsch(ue, i, ue->scramblingID_dlsch[i]);
}
nr_init_csi_rs(fp, ue->nr_csi_info->nr_gold_csi_rs, fp->Nid_cell);
// initialize the pusch dmrs
for (int i = 0; i < NR_NB_NSCID; i++) {
ue->scramblingID_ulsch[i] = fp->Nid_cell;
nr_init_pusch_dmrs(ue, ue->scramblingID_ulsch[i], i);
}
// we also need to take into account the shift by samples_per_frame in case the if is true
if (res.ssbOffset < sync_pos_frame) {
res.syncRes.rx_offset = fp->samples_per_frame - sync_pos_frame + res.ssbOffset;
......
......@@ -464,7 +464,6 @@ nr_initial_sync_t sl_nr_slss_search(PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc,
for (int symbol = 0; symbol < SL_NR_NUMSYM_SLSS_NORMAL_CP - 1;) {
nr_pbch_channel_estimation(frame_parms,
&UE->SL_UE_PHY_PARAMS,
UE->nr_gold_pbch,
rxdataF_sz,
dl_ch_estimates,
dl_ch_estimates_time,
......
......@@ -33,12 +33,11 @@
#include "PHY/CODING/coding_extern.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/sse_intrin.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/INIT/nr_phy_init.h"
#include "openair1/SCHED_NR_UE/defs.h"
#include <openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h>
#include <openair1/PHY/TOOLS/phy_scope_interface.h>
#include "openair1/PHY/NR_REFSIG/nr_refsig_common.h"
//#define DEBUG_PBCH
//#define DEBUG_PBCH_ENCODING
......@@ -294,46 +293,30 @@ void nr_pbch_unscrambling(int16_t *demod_pbch_e,
uint32_t pbch_a_prime,
uint32_t *pbch_a_interleaved)
{
uint8_t reset, offset;
uint32_t x1 = 0, x2 = 0, s = 0;
uint8_t k=0;
reset = 1;
// x1 is set in first call to lte_gold_generic
x2 = Nid; //this is c_init
uint32_t *seq = gold_cache(Nid, (nushift * M + length + 31) / 32); // this is c_init
// The Gold sequence is shifted by nushift* M, so we skip (nushift*M /32) double words
for (int i=0; i<(uint16_t)ceil(((float)nushift*M)/32); i++) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
int idxGold = (nushift * M + 31) / 32 - 1;
// Scrambling is now done with offset (nushift*M)%32
offset = (nushift*M)&0x1f;
for (int i=0; i<length; i++) {
/*if (((i+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}*/
int offset = (nushift * M) & 0x1f;
uint8_t k = 0;
for (int i = 0; i < length; i++) {
if (bitwise) {
if (((k+offset)&0x1f)==0 && (!((unscrambling_mask>>i)&1))) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
*pbch_a_interleaved ^= ((unscrambling_mask>>i)&1)? ((pbch_a_prime>>i)&1)<<i : (((pbch_a_prime>>i)&1) ^ ((s>>((k+offset)&0x1f))&1))<<i;
if (((k + offset) & 0x1f) == 0 && (!((unscrambling_mask >> i) & 1)))
idxGold++;
*pbch_a_interleaved ^= ((unscrambling_mask >> i) & 1)
? ((pbch_a_prime >> i) & 1) << i
: (((pbch_a_prime >> i) & 1) ^ ((seq[idxGold] >> ((k + offset) & 0x1f)) & 1)) << i;
k += (!((unscrambling_mask>>i)&1));
#ifdef DEBUG_PBCH_ENCODING
printf("i %d k %d offset %d (unscrambling_mask>>i)&1) %d s: %08x\t pbch_a_interleaved 0x%08x (!((unscrambling_mask>>i)&1)) %d\n", i, k, offset, (unscrambling_mask>>i)&1, s, *pbch_a_interleaved,
(!((unscrambling_mask>>i)&1)));
#endif
} else {
if (((i+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
if (((i + offset) & 0x1f) == 0)
idxGold++;
if (((s>>((i+offset)&0x1f))&1)==1)
if (seq[idxGold] & (1UL << ((i + offset) % 32)))
demod_pbch_e[i] = -demod_pbch_e[i];
#ifdef DEBUG_PBCH_ENCODING
......
......@@ -57,34 +57,22 @@
void nr_pusch_codeword_scrambling_uci(uint8_t *in, uint32_t size, uint32_t Nid, uint32_t n_RNTI, uint32_t* out)
{
uint8_t reset, b_idx;
uint32_t x1 = 0, x2 = 0, s = 0, temp_out = 0;
reset = 1;
x2 = (n_RNTI<<15) + Nid;
uint32_t *seq = gold_cache((n_RNTI << 15) + Nid, (size + 31) / 32);
for (int i=0; i<size; i++) {
b_idx = i&0x1f;
if (b_idx==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
if (i)
out++;
}
int idx = i / 32;
int b_idx = i % 32;
if (in[i]==NR_PUSCH_x)
*out ^= 1<<b_idx;
out[idx] ^= 1 << b_idx;
else if (in[i]==NR_PUSCH_y){
if (b_idx!=0)
*out ^= (*out & (1<<(b_idx-1)))<<1;
if (b_idx)
out[idx] ^= (out[idx] & (1 << (b_idx - 1))) << 1;
else{
temp_out = *(out-1);
*out ^= temp_out>>31;
uint32_t temp_out = out[idx - 1];
out[idx] ^= temp_out >> 31;
}
}
else
*out ^= (((in[i])&1) ^ ((s>>b_idx)&1))<<b_idx;
out[idx] ^= (((in[i]) & 1) ^ ((seq[idx] >> b_idx) & 1)) << b_idx;
//printf("i %d b_idx %d in %d s 0x%08x out 0x%08x\n", i, b_idx, in[i], s, *out);
}
}
......@@ -240,12 +228,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////DMRS Modulation/////////////////////////
///////////
if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) {
UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
c16_t mod_dmrs[n_dmrs] __attribute((aligned(16)));
......@@ -382,7 +364,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
// Perform this on gold sequence, not required when SC FDMA operation is done,
LOG_D(PHY,"DMRS in symbol %d\n",l);
nr_modulation(pusch_dmrs[l][pusch_pdu->scid],
const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
frame_parms->symbols_per_slot,
pusch_pdu->ul_dmrs_scrambling_id,
pusch_pdu->scid,
slot,
l);
nr_modulation(gold,
n_dmrs * 2,
DMRS_MOD_ORDER,
(int16_t *)mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
......@@ -395,7 +383,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1;
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nb_rb, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
frame_parms->symbols_per_slot,
pusch_pdu->ul_dmrs_scrambling_id,
pusch_pdu->scid,
slot,
l);
nr_modulation(gold, nb_rb, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
}
}
......
......@@ -40,6 +40,7 @@
#include <openair1/PHY/CODING/nrSmallBlock/nr_small_block_defs.h>
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "openair1/PHY/NR_REFSIG/nr_refsig.h"
#include "T.h"
//#define NR_UNIT_TEST 1
......@@ -484,46 +485,32 @@ void nr_generate_pucch1(const PHY_VARS_NR_UE *ue,
}
}
static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) {
uint32_t x1 = 0, x2 = 0, s = 0;
int i;
uint8_t c;
static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit, uint16_t rnti, uint16_t n_id, uint64_t *B64, uint8_t *btilde)
{
// c_init=nRNTI*2^15+n_id according to TS 38.211 Subclause 6.3.2.6.1
//x2 = (rnti) + ((uint32_t)(1+nr_slot_tx)<<16)*(1+(fp->Nid_cell<<1));
x2 = ((rnti)<<15)+n_id;
const int roundedSz = (M_bit + 31) / 32;
uint32_t *seq = gold_cache((rnti << 15) + n_id, roundedSz);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_pucch2_3_4_scrambling] gold sequence s=%x, M_bit %d\n",s,M_bit);
#endif
uint8_t *btildep=btilde;
int M_bit2=M_bit > 31 ? 32 : (M_bit&31), M_bit3=M_bit;
uint32_t B;
for (int iprime=0;iprime<=(M_bit>>5);iprime++,btildep+=32) {
s = lte_gold_generic(&x1, &x2, (iprime==0) ? 1 : 0);
B=((uint32_t*)B64)[iprime];
for (int n=0;n<M_bit2;n+=8)
LOG_D(PHY,"PUCCH2 encoded %d : %d,%d,%d,%d,%d,%d,%d,%d\n",n,
(B>>n)&1,
(B>>(n+1))&1,
(B>>(n+2))&1,
(B>>(n+3))&1,
(B>>(n+4))&1,
(B>>(n+5))&1,
(B>>(n+6))&1,
(B>>(n+7))&1
);
for (i=0; i<M_bit2; i++) {
c = (uint8_t)((s>>i)&1);
uint8_t *btildep = btilde;
uint32_t *B32 = (uint32_t *)B64;
for (int iprime = 0; iprime < roundedSz; iprime++, btildep += 32) {
const uint32_t s = seq[iprime];
const uint32_t B = B32[iprime];
LOG_D(PHY, "PUCCH2 encoded: %02x\n", B);
int M_bit2 = iprime == M_bit / 32 ? M_bit % 32 : 32;
for (int i = 0; i < M_bit2; i++) {
uint8_t c = (uint8_t)((s >> i) & 1);
btildep[i] = (((B>>i)&1) ^ c);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t\t btilde[%d]=%x from unscrambled bit %d and scrambling %d (%x)\n",i+(iprime<<5),btilde[i],((B>>i)&1),c,s>>i);
#endif
}
M_bit3-=32;
M_bit2=M_bit3 > 31 ? 32 : (M_bit3&31);
}
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_pucch2_3_4_scrambling] scrambling M_bit=%d bits\n", M_bit);
#endif
......@@ -721,9 +708,7 @@ void nr_generate_pucch2(const PHY_VARS_NR_UE *ue,
* Implementing TS 38.211 Subclause 6.3.2.5.3 Mapping to physical resources
*/
// int32_t *txptr;
uint32_t x1 = 0, x2 = 0, s = 0;
int i=0;
int m=0;
int outSample = 0;
uint8_t startingSymbolIndex = pucch_pdu->start_symbol_index;
uint16_t startingPRB = pucch_pdu->prb_start + pucch_pdu->bwp_start;
......@@ -732,14 +717,10 @@ void nr_generate_pucch2(const PHY_VARS_NR_UE *ue,
uint64_t temp_x2 = 1ll << 17;
temp_x2 *= 14UL * nr_slot_tx + l + startingSymbolIndex + 1;
temp_x2 *= 2UL * pucch_pdu->dmrs_scrambling_id + 1;
x2 = (temp_x2 + 2UL * pucch_pdu->dmrs_scrambling_id) % (1UL << 31);
int reset = 1;
for (int ii=0; ii<=(startingPRB>>2); ii++) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
m = 0;
temp_x2 = (temp_x2 + 2ULL * pucch_pdu->dmrs_scrambling_id) % (1UL << 31);
uint idxGold = startingPRB >> 2;
uint32_t *seq = gold_cache(temp_x2, idxGold + pucch_pdu->prb_size);
int m = 0;
for (int rb=0; rb<pucch_pdu->prb_size; rb++) {
//startingPRB = startingPRB + rb;
const bool nb_rb_is_even = frame_parms->N_RB_DL & 1;
......@@ -773,7 +754,7 @@ void nr_generate_pucch2(const PHY_VARS_NR_UE *ue,
}
if (n%3 != 1) { // mapping PUCCH according to TS38.211 subclause 6.3.2.5.3
txdataF[0][re_offset] = d[i + k];
txdataF[0][re_offset] = d[outSample + k];
#ifdef DEBUG_NR_PUCCH_TX
printf(
"\t [nr_generate_pucch2] (n=%d,i=%d) mapping PUCCH to RE \t amp=%d \tofdm_symbol_size=%d \tN_RB_DL=%d "
......@@ -795,8 +776,8 @@ void nr_generate_pucch2(const PHY_VARS_NR_UE *ue,
}
if (n%3 == 1) { // mapping DM-RS signal according to TS38.211 subclause 6.4.1.3.2
txdataF[0][re_offset].r = (int16_t)(baseVal * (1 - (2 * ((uint8_t)((s >> (2 * m)) & 1)))));
txdataF[0][re_offset].i = (int16_t)(baseVal * (1 - (2 * ((uint8_t)((s >> (2 * m + 1)) & 1)))));
txdataF[0][re_offset].r = (int16_t)(baseVal * (1 - (2 * ((uint8_t)((seq[idxGold] >> (2 * m)) & 1)))));
txdataF[0][re_offset].i = (int16_t)(baseVal * (1 - (2 * ((uint8_t)((seq[idxGold] >> (2 * m + 1)) & 1)))));
m++;
#ifdef DEBUG_NR_PUCCH_TX
printf(
......@@ -821,10 +802,10 @@ void nr_generate_pucch2(const PHY_VARS_NR_UE *ue,
re_offset++;
}
i+=8;
outSample += 8;
if ((m&((1<<4)-1))==0) {
s = lte_gold_generic(&x1, &x2, 0);
if (m % 16 == 0) {
idxGold++;
m = 0;
}
}
......
......@@ -606,24 +606,9 @@ typedef struct PHY_VARS_gNB_s {
// PUCCH0 Look-up table for cyclic-shifts
NR_gNB_PUCCH0_LUT_t pucch0_lut;
/// PBCH DMRS sequence
uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PBCH interleaver
uint8_t nr_pbch_interleaver[NR_POLAR_PBCH_PAYLOAD_BITS];
/// PDCCH DMRS sequence
uint32_t ***nr_gold_pdcch_dmrs;
/// PDSCH DMRS sequence
uint32_t ****nr_gold_pdsch_dmrs;
/// PUSCH DMRS
uint32_t ****nr_gold_pusch_dmrs;
/// PRS sequence
uint32_t ****nr_gold_prs;
/// PRACH root sequence
c16_t X_u[64][839];
......@@ -641,10 +626,6 @@ typedef struct PHY_VARS_gNB_s {
/// counter to average prach energh over first 100 prach opportunities
int prach_energy_counter;
int pdcch_gold_init;
int pdsch_gold_init[2];
int pusch_gold_init[2];
int ap_N1;
int ap_N2;
int ap_XP;
......
......@@ -407,32 +407,7 @@ typedef struct PHY_VARS_NR_UE_s {
uint32_t dmrs_pbch_bitmap_nr[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE];
#endif
/// PBCH DMRS sequence
uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PDSCH DMRS
uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDSCH DMRS
uint16_t scramblingID_dlsch[2];
// Scrambling IDs used in PUSCH DMRS
uint16_t scramblingID_ulsch[2];
/// PDCCH DMRS
uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDCCH DMRS
uint16_t scramblingID_pdcch;
/// PUSCH DMRS sequence
uint32_t ****nr_gold_pusch_dmrs;
// PRS sequence per gNB, per resource
uint32_t *****nr_gold_prs;
c16_t X_u[64][839];
// flag to activate PRB based averaging of channel estimates
......@@ -465,15 +440,15 @@ typedef struct PHY_VARS_NR_UE_s {
int dlsch_ra_errors[NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_p_received[NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_p_errors[NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mch_received_sf[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mch_received[NUMBER_OF_CONNECTED_gNB_MAX];
int current_dlsch_cqi[NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mch_received_sf[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mcch_received[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mtch_received[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mcch_errors[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mtch_errors[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mcch_trials[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mtch_trials[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int current_dlsch_cqi[NUMBER_OF_CONNECTED_gNB_MAX];
uint8_t decode_SIB;
uint8_t decode_MIB;
uint8_t init_sync_frame;
......
......@@ -122,8 +122,6 @@ typedef struct {
} nr_srs_info_t;
typedef struct {
uint16_t csi_gold_init;
uint32_t ***nr_gold_csi_rs;
uint8_t csi_rs_generated_signal_bits;
int32_t **csi_rs_generated_signal;
bool csi_im_meas_computed;
......
......@@ -108,20 +108,13 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB,int frame,int slot, nfapi_nr_
nr_generate_pss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
if (fp->Lmax == 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index & 7],
&txdataF[0][txdataF_offset],
gNB->TX_AMP,
ssb_start_symbol,
cfg,
fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index & 7],
&txdataF[0][txdataF_offset],
gNB->TX_AMP,
ssb_start_symbol,
cfg,
fp);
int hf = fp->Lmax == 4 ? n_hf : 0;
nr_generate_pbch_dmrs(nr_gold_pbch(fp->Lmax, gNB->gNB_config.cell_config.phy_cell_id.value, hf, ssb_index & 7),
&txdataF[0][txdataF_offset],
gNB->TX_AMP,
ssb_start_symbol,
cfg,
fp);
#if T_TRACER
if (T_ACTIVE(T_GNB_PHY_MIB)) {
......@@ -186,7 +179,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
{
slot_prs = (slot - i*prs_config->PRSResourceTimeGap + fp->slots_per_frame)%fp->slots_per_frame;
LOG_D(PHY,"gNB_TX: frame %d, slot %d, slot_prs %d, PRS Resource ID %d\n",frame, slot, slot_prs, rsc_id);
nr_generate_prs(gNB->nr_gold_prs[rsc_id][slot_prs],&gNB->common_vars.txdataF[0][txdataF_offset], AMP, prs_config, cfg, fp);
nr_generate_prs(slot_prs, &gNB->common_vars.txdataF[0][txdataF_offset], AMP, prs_config, cfg, fp);
}
}
}
......
......@@ -916,7 +916,6 @@ int pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_
start_meas(&ue->dlsch_channel_estimation_stats);
nr_pbch_channel_estimation(&ue->frame_parms,
NULL,
ue->nr_gold_pbch,
estimateSz,
dl_ch_estimates,
dl_ch_estimates_time,
......@@ -1037,7 +1036,7 @@ int pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_
}
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, phy_data, n_ss, rxdataF);
}
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt);
LOG_D(PHY, "[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt);
phy_pdcch_config->nb_search_space = 0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_OUT);
return sampleShift;
......
......@@ -196,7 +196,6 @@ int psbch_pscch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr
start_meas(&sl_phy_params->channel_estimation_stats);
nr_pbch_channel_estimation(fp,
&ue->SL_UE_PHY_PARAMS,
ue->nr_gold_pbch,
estimateSz,
dl_ch_estimates,
dl_ch_estimates_time,
......
......@@ -840,18 +840,6 @@ int main(int argc, char **argv)
init_nr_ue_transport(UE);
nr_gold_pbch(UE->nr_gold_pbch, frame_parms->Nid_cell, frame_parms->Lmax);
// compute the scramblingID_pdcch and the gold pdcch
UE->scramblingID_pdcch = frame_parms->Nid_cell;
nr_gold_pdcch(UE, frame_parms->Nid_cell);
// compute the scrambling IDs for PDSCH DMRS
for (int i = 0; i < 2; i++) {
UE->scramblingID_dlsch[i] = frame_parms->Nid_cell;
nr_gold_pdsch(UE, i, UE->scramblingID_dlsch[i]);
}
nr_l2_init_ue(1);
UE_mac = get_mac_inst(0);
ue_init_config_request(UE_mac, mu);
......
......@@ -619,8 +619,6 @@ int main(int argc, char **argv)
exit(-1);
}
nr_gold_pbch(UE->nr_gold_pbch, Nid_cell, frame_parms->Lmax);
processingData_L1tx_t msgDataTx;
// generate signal
const uint32_t rxdataF_sz = UE->frame_parms.samples_per_slot_wCP;
......@@ -804,7 +802,6 @@ int main(int argc, char **argv)
nr_pbch_channel_estimation(&UE->frame_parms,
&UE->SL_UE_PHY_PARAMS,
UE->nr_gold_pbch,
estimateSz,
dl_ch_estimates,
dl_ch_estimates_time,
......
......@@ -703,11 +703,6 @@ int main(int argc, char *argv[])
init_nr_ue_transport(UE);
for(int n_scid = 0; n_scid<2; n_scid++) {
UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell;
nr_init_pusch_dmrs(UE, frame_parms->Nid_cell, n_scid);
}
//Configure UE
nr_l2_init_ue(1);
NR_UE_MAC_INST_t* UE_mac = get_mac_inst(0);
......
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