Commit 88fb3c35 authored by Laurent THOMAS's avatar Laurent THOMAS

change type to c16_t around dmrs computation pieces of code

parent 99e1bb1a
......@@ -1127,10 +1127,10 @@ class OaiCiTest():
mib_found = True
except Exception as e:
logging.error(f'\033[91m MIB marker was not found \033[0m')
result = re.search("Measured Carrier Frequency (?P<measured_carrier_frequency>\d{1,15}) Hz", str(line))
result = re.search("Initial sync: pbch decoded sucessfully", str(line))
if result is not None and (not frequency_found):
try:
mibMsg = f"Measured Carrier Frequency = {result.group('measured_carrier_frequency')} Hz"
mibMsg = f"UE decoded PBCH successfully"
HTML.htmlUEFailureMsg=HTML.htmlUEFailureMsg + mibMsg + '\n'
logging.debug(f'\033[94m{mibMsg}\033[0m')
frequency_found = True
......
......@@ -254,9 +254,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
gNB->nr_srs_info = (nr_srs_info_t **)malloc16_clear(gNB->max_nb_srs * sizeof(nr_srs_info_t*));
for (int id = 0; id < gNB->max_nb_srs; id++) {
gNB->nr_srs_info[id] = (nr_srs_info_t *)malloc16_clear(sizeof(nr_srs_info_t));
gNB->nr_srs_info[id]->srs_generated_signal = (int32_t**)malloc16_clear(MAX_NUM_NR_SRS_AP*sizeof(int32_t*));
gNB->nr_srs_info[id]->srs_generated_signal = malloc16_clear(MAX_NUM_NR_SRS_AP * sizeof(c16_t *));
for(int ap=0; ap<MAX_NUM_NR_SRS_AP; ap++) {
gNB->nr_srs_info[id]->srs_generated_signal[ap] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
gNB->nr_srs_info[id]->srs_generated_signal[ap] =
malloc16_clear(fp->ofdm_symbol_size * MAX_NUM_NR_SRS_SYMBOLS * sizeof(c16_t));
}
}
......
......@@ -318,24 +318,19 @@ void nr_layer_mapping(int nbCodes,
}
}
void nr_ue_layer_mapping(int16_t *mod_symbs,
uint8_t n_layers,
uint32_t n_symbs,
int16_t **tx_layers) {
void nr_ue_layer_mapping(const c16_t *mod_symbs, const int n_layers, const int n_symbs, c16_t **tx_layers)
{
for (int i=0; i<n_symbs/n_layers; i++) {
for (int l=0; l<n_layers; l++) {
tx_layers[l][i<<1] = (mod_symbs[(n_layers*i+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[((n_layers*i+l)<<1)+1]*AMP)>>15;
tx_layers[l][i] = c16mulRealShift(mod_symbs[n_layers * i + l], AMP, 15);
}
}
}
void nr_dft(int32_t *z, int32_t *d, uint32_t Msc_PUSCH)
void nr_dft(c16_t *z, c16_t *d, uint32_t Msc_PUSCH)
{
simde__m128i dft_in128[1][3240], dft_out128[1][3240];
uint32_t *dft_in0 = (uint32_t*)dft_in128[0], *dft_out0 = (uint32_t*)dft_out128[0];
simde__m128i dft_in128[3240], dft_out128[3240];
c16_t *dft_in0 = (c16_t *)dft_in128, *dft_out0 = (c16_t *)dft_out128;
uint32_t i, ip;
......@@ -659,36 +654,32 @@ void init_timeshift_rotation(NR_DL_FRAME_PARMS *fp)
}
}
int nr_layer_precoder(int16_t **datatx_F_precoding, const char *prec_matrix, uint8_t n_layers, int32_t re_offset)
c16_t nr_layer_precoder(c16_t **datatx_F_precoding, const char *prec_matrix, uint8_t n_layers, int32_t re_offset)
{
int32_t precodatatx_F = 0;
c16_t precodatatx_F = {0};
for (int al = 0; al<n_layers; al++) {
int16_t antenna_re = datatx_F_precoding[al][re_offset<<1];
int16_t antenna_im = datatx_F_precoding[al][(re_offset<<1) +1];
c16_t antenna = datatx_F_precoding[al][re_offset];
switch (prec_matrix[al]) {
case '0': //multiply by zero
break;
case '1': //multiply by 1
((int16_t *) &precodatatx_F)[0] += antenna_re;
((int16_t *) &precodatatx_F)[1] += antenna_im;
precodatatx_F = c16add(precodatatx_F, antenna);
break;
case 'n': // multiply by -1
((int16_t *) &precodatatx_F)[0] -= antenna_re;
((int16_t *) &precodatatx_F)[1] -= antenna_im;
precodatatx_F = c16sub(precodatatx_F, antenna);
break;
case 'j': //
((int16_t *) &precodatatx_F)[0] -= antenna_im;
((int16_t *) &precodatatx_F)[1] += antenna_re;
precodatatx_F.r -= antenna.i;
precodatatx_F.i += antenna.r;
break;
case 'o': // -j
((int16_t *) &precodatatx_F)[0] += antenna_im;
((int16_t *) &precodatatx_F)[1] -= antenna_re;
precodatatx_F.r += antenna.i;
precodatatx_F.i -= antenna.r;
break;
}
}
......
......@@ -68,13 +68,7 @@ void nr_layer_mapping(int nbCodes,
@param[in] n_symbs, number of modulated symbols
@param[out] tx_layers, modulated symbols for each layer
*/
void nr_ue_layer_mapping(int16_t *mod_symbs,
uint8_t n_layers,
uint32_t n_symbs,
int16_t **tx_layers);
void nr_ue_layer_mapping(const c16_t *mod_symbs, const int n_layers, const int n_symbs, c16_t **tx_layers);
/*!
\brief This function implements the OFDM front end processor on reception (FEP)
\param frame_parms Pointer to frame parameters
......@@ -98,7 +92,7 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
\param d Pointer to input in time domain
\param Msc_PUSCH number of allocated data subcarriers
*/
void nr_dft(int32_t *z,int32_t *d, uint32_t Msc_PUSCH);
void nr_dft(c16_t *z, c16_t *d, uint32_t Msc_PUSCH);
int nr_beam_precoding(c16_t **txdataF,
c16_t **txdataF_BF,
......@@ -137,7 +131,7 @@ void apply_nr_rotation_RX(NR_DL_FRAME_PARMS *frame_parms,
@param[in] prec_matrix, Pointer to precoding matrix
@param[in] n_layers, number of DLSCH layers
*/
int nr_layer_precoder(int16_t **datatx_F_precoding, const char *prec_matrix, uint8_t n_layers, int32_t re_offset);
c16_t nr_layer_precoder(c16_t **datatx_F_precoding, const char *prec_matrix, uint8_t n_layers, int32_t re_offset);
c16_t nr_layer_precoder_cm(int n_layers,
int n_symbols,
......
......@@ -122,10 +122,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
pusch_pdu->dmrs_config_type);
} else { // if transform precoding or SC-FDMA is enabled in Uplink
// NR_SC_FDMA supports type1 DMRS so only 6 DMRS REs per RB possible
const uint16_t index = get_index_for_dmrs_lowpapr_seq(nb_rb_pusch * (NR_NB_SC_PER_RB/2));
const int index = get_index_for_dmrs_lowpapr_seq(nb_rb_pusch * (NR_NB_SC_PER_RB / 2));
const uint8_t u = pusch_pdu->dfts_ofdm.low_papr_group_number;
const uint8_t v = pusch_pdu->dfts_ofdm.low_papr_sequence_number;
int16_t *dmrs_seq = gNB_dmrs_lowpaprtype1_sequence[u][v][index];
c16_t *dmrs_seq = gNB_dmrs_lowpaprtype1_sequence[u][v][index];
LOG_D(PHY,"Transform Precoding params. u: %d, v: %d, index for dmrsseq: %d\n", u, v, index);
AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n");
AssertFatal(dmrs_seq != NULL, "DMRS low PAPR seq not found, check if DMRS sequences are generated");
......@@ -611,19 +611,21 @@ uint32_t calc_power(const int16_t *x, const uint32_t size) {
return sum_x2/size - (sum_x/size)*(sum_x/size);
}
int nr_srs_channel_estimation(const PHY_VARS_gNB *gNB,
const int frame,
const int slot,
const nfapi_nr_srs_pdu_t *srs_pdu,
const nr_srs_info_t *nr_srs_info,
const int32_t **srs_generated_signal,
int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size*(1<<srs_pdu->num_symbols)],
int32_t srs_estimated_channel_freq[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size*(1<<srs_pdu->num_symbols)],
int32_t srs_estimated_channel_time[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int32_t srs_estimated_channel_time_shifted[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int8_t *snr_per_rb,
int8_t *snr) {
int nr_srs_channel_estimation(
const PHY_VARS_gNB *gNB,
const int frame,
const int slot,
const nfapi_nr_srs_pdu_t *srs_pdu,
const nr_srs_info_t *nr_srs_info,
const c16_t **srs_generated_signal,
int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)],
int32_t srs_estimated_channel_freq[][1 << srs_pdu->num_ant_ports]
[gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)],
int32_t srs_estimated_channel_time[][1 << srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int32_t srs_estimated_channel_time_shifted[][1 << srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int8_t *snr_per_rb,
int8_t *snr)
{
#ifdef SRS_DEBUG
LOG_I(NR_PHY,"Calling %s function\n", __FUNCTION__);
#endif
......@@ -694,9 +696,8 @@ int nr_srs_channel_estimation(const PHY_VARS_gNB *gNB,
uint16_t subcarrier_cdm = subcarrier;
for (int cdm_idx = 0; cdm_idx < fd_cdm; cdm_idx++) {
int16_t generated_real = ((c16_t*)srs_generated_signal[p_index])[subcarrier_cdm].r;
int16_t generated_imag = ((c16_t*)srs_generated_signal[p_index])[subcarrier_cdm].i;
int16_t generated_real = srs_generated_signal[p_index][subcarrier_cdm].r;
int16_t generated_imag = srs_generated_signal[p_index][subcarrier_cdm].i;
int16_t received_real = ((c16_t*)srs_received_signal[ant])[subcarrier_cdm].r;
int16_t received_imag = ((c16_t*)srs_received_signal[ant])[subcarrier_cdm].i;
......
......@@ -72,18 +72,20 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
unsigned char symbol,
uint32_t nb_re_pusch);
int nr_srs_channel_estimation(const PHY_VARS_gNB *gNB,
const int frame,
const int slot,
const nfapi_nr_srs_pdu_t *srs_pdu,
const nr_srs_info_t *nr_srs_info,
const int32_t **srs_generated_signal,
int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size*(1<<srs_pdu->num_symbols)],
int32_t srs_estimated_channel_freq[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size*(1<<srs_pdu->num_symbols)],
int32_t srs_estimated_channel_time[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int32_t srs_estimated_channel_time_shifted[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int8_t *snr_per_rb,
int8_t *snr);
int nr_srs_channel_estimation(
const PHY_VARS_gNB *gNB,
const int frame,
const int slot,
const nfapi_nr_srs_pdu_t *srs_pdu,
const nr_srs_info_t *nr_srs_info,
const c16_t **srs_generated_signal,
int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)],
int32_t srs_estimated_channel_freq[][1 << srs_pdu->num_ant_ports]
[gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)],
int32_t srs_estimated_channel_time[][1 << srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int32_t srs_estimated_channel_time_shifted[][1 << srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int8_t *snr_per_rb,
int8_t *snr);
void nr_freq_equalization(NR_DL_FRAME_PARMS *frame_parms,
int *rxdataF_comp,
......
......@@ -261,7 +261,7 @@ void nr_gen_ref_conj_symbols(uint32_t *in, uint32_t length, c16_t *output, uint1
int nr_pusch_lowpaprtype1_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
int16_t *dmrs_seq,
c16_t *dmrs_seq,
c16_t *output,
unsigned short p,
unsigned char lp,
......@@ -284,8 +284,8 @@ int nr_pusch_lowpaprtype1_dmrs_rx(PHY_VARS_gNB *gNB,
k = i-dmrs_offset;
w = (wf1[p - 1000][i & 1]) * (wt1[p - 1000][lp]);
output[k].r = w * dmrs_seq[2 * i];
output[k].i = -(w * dmrs_seq[(2 * i) + 1]); // conjugate
output[k].r = w * dmrs_seq[i].r;
output[k].i = -w * dmrs_seq[i].i; // conjugate
#ifdef DEBUG_PUSCH
printf("NR_DMRS_RX: nr_pusch_dmrs_rx dmrs config type %d port %d nb_pusch_rb %d nb_dmrs %d\n",
......@@ -294,8 +294,8 @@ int nr_pusch_lowpaprtype1_dmrs_rx(PHY_VARS_gNB *gNB,
nb_pusch_rb,
nb_dmrs);
printf("NR_DMRS_RX: wf[%d] = %d wt[%d]= %d\n", i & 1, wf1[p - 1000][i & 1], lp, wt1[p - 1000][lp]);
printf("NR_DMRS_RX: i %d dmrs_offset %d k %d pusch dmrsseq[i<<1] %d, dmrsseq[(i<<1)+1] %d pilots[k<<1] %d pilots[(k<<1)+1] %d\n", i, dmrs_offset, k,
dmrs_seq[i<<1], dmrs_seq[(i<<1)+1], output[k].r, output[(k].i);
printf("NR_DMRS_RX: i %d dmrs_offset %d k %d pusch dmrsseq[i<<1] %d, dmrsseq[(i<<1)+1] %d pilots[k<<1] %d pilots[(k<<1)+1] %d\n", i, dmrs_offset, k,
dmrs_seq[i].r, dmrs_seq[i].i, output[k].r, output[(k].i);
#endif
}
} else {
......
......@@ -70,7 +70,7 @@ extern simde__m128i byte2m128i[256];
int nr_pusch_lowpaprtype1_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
int16_t *dmrs_seq,
c16_t *dmrs_seq,
c16_t *output,
unsigned short p,
unsigned char lp,
......
......@@ -52,53 +52,44 @@
*
*********************************************************************/
static int16_t *base_sequence_less_than_36(unsigned int M_ZC, unsigned int u, unsigned int scaling)
static c16_t *base_sequence_less_than_36(unsigned int M_ZC, unsigned int u, unsigned int scaling)
{
char *phi_table;
int16_t *rv_overbar;
double x;
unsigned int n;
const char *phi_table;
switch(M_ZC) {
case 6:
phi_table = (char *)phi_M_ZC_6;
phi_table = phi_M_ZC_6;
break;
case 12:
phi_table = (char *)phi_M_ZC_12;
phi_table = phi_M_ZC_12;
break;
case 18:
phi_table = (char *)phi_M_ZC_18;
phi_table = phi_M_ZC_18;
break;
case 24:
phi_table = (char *)phi_M_ZC_24;
phi_table = phi_M_ZC_24;
break;
case 30:
break;
default:
printf("function base_sequence_less_than 36_: unsupported base sequence size : %u \n", M_ZC);
assert(0);
AssertFatal(false, "function base_sequence_less_than 36_: unsupported base sequence size : %u \n", M_ZC);
break;
}
rv_overbar = malloc16(IQ_SIZE*M_ZC);
if (rv_overbar == NULL) {
msg("Fatal memory allocation problem \n");
assert(0);
}
c16_t *rv_overbar = malloc16(IQ_SIZE * M_ZC);
AssertFatal(rv_overbar, "Fatal memory allocation problem \n");
if (M_ZC == 30) {
for (n=0; n<M_ZC; n++) {
x = -(M_PI * (u + 1) * (n + 1) * (n + 2))/(double)31;
rv_overbar[2*n] =(int16_t)(floor(scaling*cos(x)));
rv_overbar[2*n+1] =(int16_t)(floor(scaling*sin(x)));
for (unsigned int n = 0; n < M_ZC; n++) {
const double x = -(M_PI * (u + 1) * (n + 1) * (n + 2)) / (double)31;
rv_overbar[n].r = (int16_t)(floor(scaling * cos(x)));
rv_overbar[n].i = (int16_t)(floor(scaling * sin(x)));
}
}
else {
for (n=0; n<M_ZC; n++) {
x = (double)phi_table[n + u*M_ZC] * (M_PI/4);
rv_overbar[2*n] = (int16_t)(floor(scaling*cos(x)));
rv_overbar[2*n+1] = (int16_t)(floor(scaling*sin(x)));
for (unsigned int n = 0; n < M_ZC; n++) {
const double x = (double)phi_table[n + u * M_ZC] * (M_PI / 4);
rv_overbar[n].r = (int16_t)(floor(scaling * cos(x)));
rv_overbar[n].i = (int16_t)(floor(scaling * sin(x)));
}
}
return rv_overbar;
......@@ -117,9 +108,9 @@ static int16_t *base_sequence_less_than_36(unsigned int M_ZC, unsigned int u, un
*
*********************************************************************/
int16_t get_index_for_dmrs_lowpapr_seq(int16_t num_dmrs_res) {
int16_t index = num_dmrs_res/6 - 1;
int get_index_for_dmrs_lowpapr_seq(int num_dmrs_res)
{
int index = num_dmrs_res / 6 - 1;
if (index >= MAX_INDEX_DMRS_UL_ALLOCATED_REs)
index = MAX_INDEX_DMRS_UL_ALLOCATED_REs-1;
......@@ -149,55 +140,40 @@ int16_t get_index_for_dmrs_lowpapr_seq(int16_t num_dmrs_res) {
*
*********************************************************************/
static int16_t *base_sequence_36_or_larger(unsigned int Msc_RS,
unsigned int u,
unsigned int v,
unsigned int scaling,
unsigned int if_dmrs_seq)
static c16_t *base_sequence_36_or_larger(unsigned int Msc_RS,
unsigned int u,
unsigned int v,
unsigned int scaling,
unsigned int if_dmrs_seq)
{
int16_t *rv_overbar;
unsigned int N_ZC, M_ZC;
double q_overbar, x;
unsigned int q,m,n;
if (if_dmrs_seq)
M_ZC = dmrs_ul_allocated_res[Msc_RS];
else
M_ZC = ul_allocated_re[Msc_RS];
const unsigned int M_ZC = if_dmrs_seq ? dmrs_ul_allocated_res[Msc_RS] : ul_allocated_re[Msc_RS];
rv_overbar = malloc16(IQ_SIZE*M_ZC);
if (rv_overbar == NULL) {
msg("Fatal memory allocation problem \n");
assert(0);
}
c16_t *rv_overbar = malloc16(IQ_SIZE * M_ZC);
AssertFatal(rv_overbar, "Fatal memory allocation problem \n");
if (if_dmrs_seq)
N_ZC = dmrs_ref_ul_primes[Msc_RS];
else
N_ZC = ref_ul_primes[Msc_RS]; /* The length N_ZC is given by the largest prime number such that N_ZC < M_ZC */
/* The length N_ZC is given by the largest prime number such that N_ZC < M_ZC */
const unsigned int N_ZC = if_dmrs_seq ? dmrs_ref_ul_primes[Msc_RS] : ref_ul_primes[Msc_RS];
q_overbar = N_ZC * (u+1)/(double)31;
const double q_overbar = N_ZC * (u + 1) / (double)31;
/* q = (q_overbar + 1/2) + v.(-1)^(2q_overbar) */
double q;
if ((((int)floor(2*q_overbar))&1) == 0)
q = (int)(floor(q_overbar+.5)) - v;
q = floor(q_overbar + .5) - v;
else
q = (int)(floor(q_overbar+.5)) + v;
q = floor(q_overbar + .5) + v;
for (n = 0; n < M_ZC; n++) {
m=n%N_ZC;
x = (double)q * m * (m+1)/N_ZC;
rv_overbar[2*n] = (int16_t)(floor(scaling*cos(M_PI*x))); /* cos(-x) = cos(x) */
rv_overbar[2*n+1] = -(int16_t)(floor(scaling*sin(M_PI*x))); /* sin(-x) = -sin(x) */
for (int n = 0; n < M_ZC; n++) {
const int m = n % N_ZC;
const double x = q * m * (m + 1) / N_ZC;
rv_overbar[n].r = (int16_t)(floor(scaling * cos(M_PI * x))); /* cos(-x) = cos(x) */
rv_overbar[n].i = -(int16_t)(floor(scaling * sin(M_PI * x))); /* sin(-x) = -sin(x) */
}
return rv_overbar;
}
int16_t *rv_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][SRS_SB_CONF];
int16_t *gNB_dmrs_lowpaprtype1_sequence[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
c16_t *rv_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][SRS_SB_CONF];
c16_t *gNB_dmrs_lowpaprtype1_sequence[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
void generate_lowpapr_typ1_refsig_sequences(unsigned int scaling)
{
/* prevent multiple calls, relevant when both UE & gNB initialize this */
......@@ -205,24 +181,22 @@ void generate_lowpapr_typ1_refsig_sequences(unsigned int scaling)
if (already_called)
return;
already_called = true;
unsigned int u, Msc_RS;
unsigned int v = 0; // sequence hopping and group hopping are not supported yet
for (Msc_RS=0; Msc_RS <= INDEX_SB_LESS_32; Msc_RS++) {
for (u=0; u < U_GROUP_NUMBER; u++) {
for (unsigned int Msc_RS = 0; Msc_RS <= INDEX_SB_LESS_32; Msc_RS++) {
for (unsigned int u = 0; u < U_GROUP_NUMBER; u++) {
gNB_dmrs_lowpaprtype1_sequence[u][v][Msc_RS] = base_sequence_less_than_36(ul_allocated_re[Msc_RS], u, scaling);
}
}
for (Msc_RS=INDEX_SB_LESS_32+1; Msc_RS < MAX_INDEX_DMRS_UL_ALLOCATED_REs; Msc_RS++) {
for (u=0; u < U_GROUP_NUMBER; u++) {
gNB_dmrs_lowpaprtype1_sequence[u][v][Msc_RS] = base_sequence_36_or_larger(Msc_RS, u, v, scaling, 1);
}
}
for (unsigned int Msc_RS = INDEX_SB_LESS_32 + 1; Msc_RS < MAX_INDEX_DMRS_UL_ALLOCATED_REs; Msc_RS++) {
for (unsigned int u = 0; u < U_GROUP_NUMBER; u++) {
gNB_dmrs_lowpaprtype1_sequence[u][v][Msc_RS] = base_sequence_36_or_larger(Msc_RS, u, v, scaling, 1);
}
}
}
int16_t *dmrs_lowpaprtype1_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
c16_t *dmrs_lowpaprtype1_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
void generate_ul_reference_signal_sequences(unsigned int scaling)
{
/* prevent multiple calls, relevant when both UE & gNB initialize this */
......
......@@ -228,7 +228,7 @@ static const uint16_t ref_ul_primes[SRS_SB_CONF] = {
};
/* Low-PAPR base sequence; see TS 38.211 clause 5.2.2 */
extern int16_t *rv_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][SRS_SB_CONF];
extern c16_t *rv_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][SRS_SB_CONF];
/* 38.211 table Table 5.2.2.2-1: Definition of phi(n) for M_ZC = 6 */
static const char phi_M_ZC_6[6 * U_GROUP_NUMBER] = {
......@@ -524,9 +524,9 @@ static const uint16_t dmrs_ref_ul_primes[MAX_INDEX_DMRS_UL_ALLOCATED_REs] = {
};
/// PUSCH DMRS for transform precoding
extern int16_t *gNB_dmrs_lowpaprtype1_sequence[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
extern int16_t *dmrs_lowpaprtype1_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
int16_t get_index_for_dmrs_lowpapr_seq(int16_t num_dmrs_res);
extern c16_t *gNB_dmrs_lowpaprtype1_sequence[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
extern c16_t *dmrs_lowpaprtype1_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
int get_index_for_dmrs_lowpapr_seq(int num_dmrs_res);
void generate_lowpapr_typ1_refsig_sequences(unsigned int scaling);
void free_gnb_lowpapr_sequences(void);
......
This diff is collapsed.
......@@ -179,13 +179,13 @@ uint16_t compute_n_b(frame_t frame_number,
***************************************************************************/
int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
NR_DL_FRAME_PARMS *frame_parms,
int32_t **txdataF,
c16_t **txdataF,
uint16_t symbol_offset,
nr_srs_info_t *nr_srs_info,
int16_t amp,
frame_t frame_number,
slot_t slot_number) {
slot_t slot_number)
{
#ifdef SRS_DEBUG
LOG_I(NR_PHY,"Calling %s function\n", __FUNCTION__);
#endif
......@@ -371,20 +371,15 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
// For each port, and for each OFDM symbol, here it is computed and mapped an SRS sequence with M_sc_b_SRS symbols
for (int k = 0; k < M_sc_b_SRS; k++) {
double shift_real = cos(alpha_i * k);
double shift_imag = sin(alpha_i * k);
int16_t r_overbar_real = rv_ul_ref_sig[u][v][M_sc_b_SRS_index][k<<1];
int16_t r_overbar_imag = rv_ul_ref_sig[u][v][M_sc_b_SRS_index][(k<<1)+1];
cd_t shift = {cos(alpha_i * k), sin(alpha_i * k)};
const c16_t tmp = rv_ul_ref_sig[u][v][M_sc_b_SRS_index][k];
cd_t r_overbar = {tmp.r, tmp.i};
// cos(x+y) = cos(x)cos(y) - sin(x)sin(y)
double r_real = (shift_real*r_overbar_real - shift_imag*r_overbar_imag) / sqrt_N_ap;
// sin(x+y) = sin(x)cos(y) + cos(x)sin(y)
double r_imag = (shift_imag*r_overbar_real + shift_real*r_overbar_imag) / sqrt_N_ap;
cd_t r = cdMul(shift, r_overbar);
int32_t r_real_amp = ((int32_t) round((double) amp * r_real)) >> 15;
int32_t r_imag_amp = ((int32_t) round((double) amp * r_imag)) >> 15;
c16_t r_amp = {(((int32_t)round((double)amp * r.r / sqrt_N_ap)) >> 15),
(((int32_t)round((double)amp * r.i / sqrt_N_ap)) >> 15)};
#ifdef SRS_DEBUG
int subcarrier_log = subcarrier-subcarrier_offset;
......@@ -394,10 +389,10 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
if(subcarrier_log%12 == 0) {
LOG_I(NR_PHY,"------------ %d ------------\n", subcarrier_log/12);
}
LOG_I(NR_PHY,"(%d) \t%i\t%i\n", subcarrier_log, (int16_t)(r_real_amp&0xFFFF), (int16_t)(r_imag_amp&0xFFFF));
LOG_I(NR_PHY, "(%d) \t%i\t%i\n", subcarrier_log, r_amp.r, r_amp.i);
#endif
*(c16_t *)&txdataF[p_index][symbol_offset + l_line_offset + subcarrier] = (c16_t){r_real_amp, r_imag_amp};
txdataF[p_index][symbol_offset + l_line_offset + subcarrier] = r_amp;
// Subcarrier increment
subcarrier += K_TC;
......@@ -465,14 +460,7 @@ int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, c16_
NR_DL_FRAME_PARMS *frame_parms = &(ue->frame_parms);
uint16_t symbol_offset = (frame_parms->symbols_per_slot - 1 - srs_config_pdu->time_start_position)*frame_parms->ofdm_symbol_size;
if (generate_srs_nr(srs_config_pdu,
frame_parms,
(int32_t **)txdataF,
symbol_offset,
ue->nr_srs_info,
AMP,
proc->frame_tx,
proc->nr_slot_tx)
if (generate_srs_nr(srs_config_pdu, frame_parms, txdataF, symbol_offset, ue->nr_srs_info, AMP, proc->frame_tx, proc->nr_slot_tx)
== 0) {
return 0;
} else {
......
......@@ -133,7 +133,7 @@ static const uint16_t srs_max_number_cs[3] = {8, 12, 6};
int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
NR_DL_FRAME_PARMS *frame_parms,
int32_t **txdataF,
c16_t **txdataF,
uint16_t symbol_offset,
nr_srs_info_t *nr_srs_info,
int16_t amp,
......
......@@ -183,6 +183,11 @@ extern "C" {
return a.r * a.r + a.i * a.i;
}
__attribute__((always_inline)) inline c16_t c16add(const c16_t a, const c16_t b)
{
return (c16_t){.r = (int16_t)(a.r + b.r), .i = (int16_t)(a.i + b.i)};
}
__attribute__((always_inline)) inline c16_t c16sub(const c16_t a, const c16_t b) {
return (c16_t) {
.r = (int16_t) (a.r - b.r),
......
......@@ -115,7 +115,7 @@ typedef enum{
typedef struct {
uint8_t k_0_p[MAX_NUM_NR_SRS_AP][MAX_NUM_NR_SRS_SYMBOLS];
uint8_t srs_generated_signal_bits;
int32_t **srs_generated_signal;
c16_t **srs_generated_signal;
nfapi_nr_srs_pdu_t srs_pdu;
} nr_srs_info_t;
......
......@@ -951,7 +951,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
slot_rx,
srs_pdu,
gNB->nr_srs_info[i],
(const int32_t **)gNB->nr_srs_info[i]->srs_generated_signal,
(const c16_t**)gNB->nr_srs_info[i]->srs_generated_signal,
srs_received_signal,
srs_estimated_channel_freq,
srs_estimated_channel_time,
......
......@@ -776,7 +776,7 @@ int main(int argc, char *argv[])
AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
int8_t index = get_index_for_dmrs_lowpapr_seq((NR_NB_SC_PER_RB/2) * nb_rb);
int index = get_index_for_dmrs_lowpapr_seq((NR_NB_SC_PER_RB / 2) * nb_rb);
AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n");
dmrs_config_type = pusch_dmrs_type1;
......
......@@ -78,8 +78,8 @@ void generate_reference_signals(void)
assert(0);
}
for (int n=0; n<ul_allocated_re[Msc_RS]; n++) {
if ((ul_ref_sigs[u][v][Msc_RS][2*n] != rv_ul_ref_sig[u][v][Msc_RS_index_nr][2*n])
|| (ul_ref_sigs[u][v][Msc_RS][2*n+1] != rv_ul_ref_sig[u][v][Msc_RS_index_nr][2*n+1])) {
if ((ul_ref_sigs[u][v][Msc_RS][n].r != rv_ul_ref_sig[u][v][Msc_RS_index_nr][n].r)
|| (ul_ref_sigs[u][v][Msc_RS][n].i != rv_ul_ref_sig[u][v][Msc_RS_index_nr][n].i)) {
number_differencies++;
}
}
......@@ -157,9 +157,7 @@ void default_srs_configuration(NR_DL_FRAME_PARMS *frame_parms)
* for various combinations of parameters
*
*********************************************************************/
int test_srs_single(NR_DL_FRAME_PARMS *frame_parms,
int32_t *txptr,
UE_nr_rxtx_proc_t *proc)
int test_srs_single(NR_DL_FRAME_PARMS *frame_parms, c16_t *txptr, UE_nr_rxtx_proc_t *proc)
{
SRS_Resource_t *p_SRS_Resource = frame_parms->srs_nr.p_SRS_ResourceSetList[0]->p_srs_ResourceList[0];
......
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