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OpenXG-RAN
Commits
920c866e
Commit
920c866e
authored
Nov 07, 2022
by
francescomani
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fix for msg4 scheduler in case vrb map for selected slot is occupied
parent
4940146f
Changes
2
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2 changed files
with
64 additions
and
56 deletions
+64
-56
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+57
-52
openair2/RRC/NR/L2_nr_interface.c
openair2/RRC/NR/L2_nr_interface.c
+7
-4
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
920c866e
...
@@ -1425,10 +1425,12 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
...
@@ -1425,10 +1425,12 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
return
;
return
;
}
}
if
(
UE
->
enc_rval
.
encoded
<=
0
)
return
;
// need to wait until RRCSetup is encoded
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
uint16_t
mac_sdu_length
=
mac_rrc_nr_data_req
(
module_idP
,
CC_id
,
frameP
,
CCCH
,
ra
->
rnti
,
1
,
NULL
);
if
(
mac_sdu_length
<=
0
)
return
;
// need to wait until RRCSetup is encoded
long
BWPStart
=
0
;
long
BWPStart
=
0
;
long
BWPSize
=
0
;
long
BWPSize
=
0
;
NR_Type0_PDCCH_CSS_config_t
*
type0_PDCCH_CSS_config
=
NULL
;
NR_Type0_PDCCH_CSS_config_t
*
type0_PDCCH_CSS_config
=
NULL
;
...
@@ -1464,6 +1466,58 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
...
@@ -1464,6 +1466,58 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
return
;
return
;
}
}
// Checking if the DCI allocation is feasible in current subframe
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
nr_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
if
(
dl_req
->
nPDUs
>
NFAPI_NR_MAX_DL_TTI_PDUS
-
2
)
{
LOG_I
(
NR_MAC
,
"[RAPROC] Subframe %d: FAPI DL structure is full, skip scheduling UE %d
\n
"
,
slotP
,
ra
->
rnti
);
return
;
}
uint8_t
time_domain_assignment
=
get_dl_tda
(
nr_mac
,
scc
,
slotP
);
NR_tda_info_t
msg4_tda
=
nr_get_pdsch_tda_info
(
dl_bwp
,
time_domain_assignment
);
NR_pdsch_dmrs_t
dmrs_info
=
get_dl_dmrs_params
(
scc
,
dl_bwp
,
&
msg4_tda
,
1
);
uint8_t
mcsTableIdx
=
dl_bwp
->
mcsTableIdx
;
uint8_t
mcsIndex
=
0
;
int
rbStart
=
0
;
int
rbSize
=
0
;
uint8_t
tb_scaling
=
0
;
uint32_t
tb_size
=
0
;
uint8_t
subheader_len
=
(
mac_sdu_length
<
256
)
?
sizeof
(
NR_MAC_SUBHEADER_SHORT
)
:
sizeof
(
NR_MAC_SUBHEADER_LONG
);
uint16_t
pdu_length
=
mac_sdu_length
+
subheader_len
+
7
;
//7 is contetion resolution length
uint16_t
*
vrb_map
=
cc
[
CC_id
].
vrb_map
;
// increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size
do
{
if
(
rbSize
<
BWPSize
)
rbSize
++
;
else
mcsIndex
++
;
LOG_D
(
NR_MAC
,
"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d
\n
"
,
dmrs_info
.
N_PRB_DMRS
,
dmrs_info
.
N_DMRS_SLOT
);
tb_size
=
nr_compute_tbs
(
nr_get_Qm_dl
(
mcsIndex
,
mcsTableIdx
),
nr_get_code_rate_dl
(
mcsIndex
,
mcsTableIdx
),
rbSize
,
msg4_tda
.
nrOfSymbols
,
dmrs_info
.
N_PRB_DMRS
*
dmrs_info
.
N_DMRS_SLOT
,
0
,
tb_scaling
,
1
)
>>
3
;
}
while
(
tb_size
<
pdu_length
&&
mcsIndex
<=
28
);
AssertFatal
(
tb_size
>=
pdu_length
,
"Cannot allocate Msg4
\n
"
);
int
i
=
0
;
while
((
i
<
rbSize
)
&&
(
rbStart
+
rbSize
<=
BWPSize
))
{
if
(
vrb_map
[
BWPStart
+
rbStart
+
i
]
&
SL_to_bitmap
(
msg4_tda
.
startSymbolIndex
,
msg4_tda
.
nrOfSymbols
))
{
rbStart
+=
i
+
1
;
i
=
0
;
}
else
{
i
++
;
}
}
if
(
rbStart
>
(
BWPSize
-
rbSize
))
{
LOG_E
(
NR_MAC
,
"%s(): cannot find free vrb_map for RNTI %04x!
\n
"
,
__func__
,
ra
->
rnti
);
return
;
}
const
int
delta_PRI
=
0
;
const
int
delta_PRI
=
0
;
int
r_pucch
=
nr_get_pucch_resource
(
coreset
,
ra
->
UL_BWP
.
pucch_Config
,
CCEIndex
);
int
r_pucch
=
nr_get_pucch_resource
(
coreset
,
ra
->
UL_BWP
.
pucch_Config
,
CCEIndex
);
...
@@ -1500,6 +1554,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
...
@@ -1500,6 +1554,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_sched_pucch_t
*
pucch
=
&
sched_ctrl
->
sched_pucch
[
alloc
];
NR_sched_pucch_t
*
pucch
=
&
sched_ctrl
->
sched_pucch
[
alloc
];
harq
->
feedback_slot
=
pucch
->
ul_slot
;
harq
->
feedback_slot
=
pucch
->
ul_slot
;
harq
->
feedback_frame
=
pucch
->
frame
;
harq
->
feedback_frame
=
pucch
->
frame
;
harq
->
tb_size
=
tb_size
;
uint8_t
*
buf
=
(
uint8_t
*
)
harq
->
transportBlock
;
uint8_t
*
buf
=
(
uint8_t
*
)
harq
->
transportBlock
;
// Bytes to be transmitted
// Bytes to be transmitted
...
@@ -1533,56 +1588,6 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
...
@@ -1533,56 +1588,6 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
}
}
}
}
uint8_t
time_domain_assignment
=
get_dl_tda
(
nr_mac
,
scc
,
slotP
);
NR_tda_info_t
msg4_tda
=
nr_get_pdsch_tda_info
(
dl_bwp
,
time_domain_assignment
);
NR_pdsch_dmrs_t
dmrs_info
=
get_dl_dmrs_params
(
scc
,
dl_bwp
,
&
msg4_tda
,
1
);
uint8_t
mcsTableIdx
=
dl_bwp
->
mcsTableIdx
;
uint8_t
mcsIndex
=
0
;
int
rbStart
=
0
;
int
rbSize
=
0
;
uint8_t
tb_scaling
=
0
;
uint16_t
*
vrb_map
=
cc
[
CC_id
].
vrb_map
;
// increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size
do
{
if
(
rbSize
<
BWPSize
)
rbSize
++
;
else
mcsIndex
++
;
LOG_D
(
NR_MAC
,
"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d
\n
"
,
dmrs_info
.
N_PRB_DMRS
,
dmrs_info
.
N_DMRS_SLOT
);
harq
->
tb_size
=
nr_compute_tbs
(
nr_get_Qm_dl
(
mcsIndex
,
mcsTableIdx
),
nr_get_code_rate_dl
(
mcsIndex
,
mcsTableIdx
),
rbSize
,
msg4_tda
.
nrOfSymbols
,
dmrs_info
.
N_PRB_DMRS
*
dmrs_info
.
N_DMRS_SLOT
,
0
,
tb_scaling
,
1
)
>>
3
;
}
while
(
harq
->
tb_size
<
ra
->
mac_pdu_length
&&
mcsIndex
<=
28
);
AssertFatal
(
harq
->
tb_size
>=
ra
->
mac_pdu_length
,
"Cannot allocate Msg4
\n
"
);
int
i
=
0
;
while
((
i
<
rbSize
)
&&
(
rbStart
+
rbSize
<=
BWPSize
))
{
if
(
vrb_map
[
BWPStart
+
rbStart
+
i
]
&
SL_to_bitmap
(
msg4_tda
.
startSymbolIndex
,
msg4_tda
.
nrOfSymbols
))
{
rbStart
+=
i
+
1
;
i
=
0
;
}
else
{
i
++
;
}
}
if
(
rbStart
>
(
BWPSize
-
rbSize
))
{
LOG_E
(
NR_MAC
,
"%s(): cannot find free vrb_map for RNTI %04x!
\n
"
,
__func__
,
ra
->
rnti
);
return
;
}
// Checking if the DCI allocation is feasible in current subframe
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
nr_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
if
(
dl_req
->
nPDUs
>
NFAPI_NR_MAX_DL_TTI_PDUS
-
2
)
{
LOG_I
(
NR_MAC
,
"[RAPROC] Subframe %d: FAPI DL structure is full, skip scheduling UE %d
\n
"
,
slotP
,
ra
->
rnti
);
return
;
}
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
const
int
coresetid
=
coreset
->
controlResourceSetId
;
const
int
coresetid
=
coreset
->
controlResourceSetId
;
...
...
openair2/RRC/NR/L2_nr_interface.c
View file @
920c866e
...
@@ -117,7 +117,8 @@ uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
...
@@ -117,7 +117,8 @@ uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
const
rb_id_t
Srb_id
,
const
rb_id_t
Srb_id
,
const
rnti_t
rnti
,
const
rnti_t
rnti
,
const
uint8_t
Nb_tb
,
const
uint8_t
Nb_tb
,
uint8_t
*
const
buffer_pP
){
uint8_t
*
const
buffer_pP
)
{
#ifdef DEBUG_RRC
#ifdef DEBUG_RRC
LOG_D
(
RRC
,
"[eNB %d] mac_rrc_data_req to SRB ID=%ld
\n
"
,
Mod_idP
,
Srb_id
);
LOG_D
(
RRC
,
"[eNB %d] mac_rrc_data_req to SRB ID=%ld
\n
"
,
Mod_idP
,
Srb_id
);
...
@@ -162,19 +163,21 @@ uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
...
@@ -162,19 +163,21 @@ uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
if
((
Srb_id
&
RAB_OFFSET
)
==
CCCH
)
{
if
((
Srb_id
&
RAB_OFFSET
)
==
CCCH
)
{
LOG_D
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request (Srb_id %ld)
\n
"
,
Mod_idP
,
frameP
,
Srb_id
);
LOG_D
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request (Srb_id %ld)
\n
"
,
Mod_idP
,
frameP
,
Srb_id
);
char
*
payload_pP
;
struct
rrc_gNB_ue_context_s
*
ue_context_p
=
rrc_gNB_get_ue_context
(
RC
.
nrrrc
[
Mod_idP
],
rnti
);
struct
rrc_gNB_ue_context_s
*
ue_context_p
=
rrc_gNB_get_ue_context
(
RC
.
nrrrc
[
Mod_idP
],
rnti
);
LOG_D
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request (Srb_id %ld)
\n
"
,
Mod_idP
,
frameP
,
Srb_id
);
LOG_D
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request (Srb_id %ld)
\n
"
,
Mod_idP
,
frameP
,
Srb_id
);
if
(
ue_context_p
==
NULL
)
{
if
(
ue_context_p
==
NULL
)
{
LOG_E
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request but no ue_context
\n
"
,
Mod_idP
,
frameP
);
if
(
buffer_pP
!=
NULL
)
LOG_E
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request but no ue_context
\n
"
,
Mod_idP
,
frameP
);
return
0
;
return
0
;
}
}
uint16_t
payload_size
=
ue_context_p
->
ue_context
.
Srb0
.
Tx_buffer
.
payload_size
;
uint16_t
payload_size
=
ue_context_p
->
ue_context
.
Srb0
.
Tx_buffer
.
payload_size
;
if
(
buffer_pP
==
NULL
)
return
payload_size
;
// check if data is there for MAC
// check if data is there for MAC
if
(
payload_size
>
0
)
{
if
(
payload_size
>
0
)
{
payload_pP
=
ue_context_p
->
ue_context
.
Srb0
.
Tx_buffer
.
Payload
;
char
*
payload_pP
=
ue_context_p
->
ue_context
.
Srb0
.
Tx_buffer
.
Payload
;
LOG_D
(
NR_RRC
,
"[gNB %d] CCCH has %d bytes (dest: %p, src %p)
\n
"
,
Mod_idP
,
payload_size
,
buffer_pP
,
payload_pP
);
LOG_D
(
NR_RRC
,
"[gNB %d] CCCH has %d bytes (dest: %p, src %p)
\n
"
,
Mod_idP
,
payload_size
,
buffer_pP
,
payload_pP
);
// Fill buffer
// Fill buffer
memcpy
((
void
*
)
buffer_pP
,
(
void
*
)
payload_pP
,
payload_size
);
memcpy
((
void
*
)
buffer_pP
,
(
void
*
)
payload_pP
,
payload_size
);
...
...
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