Commit 9b4725ad authored by Robert Schmidt's avatar Robert Schmidt

Shortened UL-PP, remove CC and slicing

parent 4250f8ea
......@@ -3037,7 +3037,7 @@ void flexran_set_ue_dl_slice_idx(mid_t mod_id, mid_t ue_id, int slice_idx) {
int flexran_get_ue_ul_slice_id(mid_t mod_id, mid_t ue_id) {
if (!mac_is_present(mod_id)) return -1;
int slice_idx = RC.mac[mod_id]->UE_info.assoc_ul_slice_idx[ue_id];
int slice_idx = 0; //RC.mac[mod_id]->UE_info.assoc_ul_slice_idx[ue_id];
if (slice_idx >= 0 && slice_idx < RC.mac[mod_id]->slice_info.n_ul)
return RC.mac[mod_id]->slice_info.ul[slice_idx].id;
......@@ -3052,7 +3052,7 @@ void flexran_set_ue_ul_slice_idx(mid_t mod_id, mid_t ue_id, int slice_idx) {
if (!flexran_ul_slice_exists(mod_id, slice_idx)) return;
RC.mac[mod_id]->UE_info.assoc_ul_slice_idx[ue_id] = slice_idx;
//RC.mac[mod_id]->UE_info.assoc_ul_slice_idx[ue_id] = slice_idx;
}
int flexran_dl_slice_exists(mid_t mod_id, int slice_idx) {
......@@ -3397,12 +3397,12 @@ int flexran_remove_ul_slice(mid_t mod_id, int slice_idx) {
memset(&sli->ul[sli->n_ul], 0, sizeof(sli->ul[sli->n_ul]));
/* all UEs that have been in the old slice are put into slice index 0 */
int *assoc_list = RC.mac[mod_id]->UE_info.assoc_ul_slice_idx;
//int *assoc_list = RC.mac[mod_id]->UE_info.assoc_ul_slice_idx;
for (int i = 0; i < MAX_MOBILES_PER_ENB; ++i) {
if (assoc_list[i] == slice_idx)
assoc_list[i] = 0;
}
//for (int i = 0; i < MAX_MOBILES_PER_ENB; ++i) {
// if (assoc_list[i] == slice_idx)
// assoc_list[i] = 0;
//}
return sli->n_ul;
}
......
......@@ -2695,7 +2695,7 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
if ( rb_table[rb_table_index] <= average_rbs ) {
// assigne RBS( nb_rb)
first_rb[CC_id] = first_rb[CC_id] + rb_table[rb_table_index];
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul[0] = rb_table[rb_table_index];
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = rb_table[rb_table_index];
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = rb_table_index;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs;
}
......@@ -2711,7 +2711,7 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
}
first_rb[CC_id] = first_rb[CC_id] + rb_table[rb_table_index];
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul[0] = rb_table[rb_table_index];
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = rb_table[rb_table_index];
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = rb_table_index;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs;
}
......@@ -2719,13 +2719,13 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) {
// assigne RBS( 6 RBs)
first_rb[CC_id] = first_rb[CC_id] + 6;
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul[0] = 6;
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 6;
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 5;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10;
} else {
// assigne RBS( 3 RBs)
first_rb[CC_id] = first_rb[CC_id] + 3;
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul[0] = 3;
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 3;
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 2;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10;
}
......@@ -2733,7 +2733,7 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
} else if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_INACTIVE ) {
// assigne RBS( 3 RBs)
first_rb[CC_id] = first_rb[CC_id] + 3;
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul[0] = 3;
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 3;
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 2;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10;
}
......
......@@ -2209,8 +2209,6 @@ add_new_ue(module_id_t mod_idP,
0,
sizeof(eNB_UE_STATS));
UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0;
/* default slice in case there was something different */
UE_info->assoc_ul_slice_idx[UE_id] = 0;
UE_info->UE_sched_ctrl[UE_id].ta_update = 31;
for (j = 0; j < 8; j++) {
......@@ -5055,22 +5053,3 @@ nb_rbs_allowed_slice(float rb_percentage,
{
return (uint16_t) floor(rb_percentage * total_rbs);
}
//------------------------------------------------------------------------------
int
ue_ul_slice_membership(module_id_t mod_id,
int UE_id,
int slice_idx)
//------------------------------------------------------------------------------
{
eNB_MAC_INST *eNB = RC.mac[mod_id];
if (slice_idx < 0 || slice_idx >= eNB->slice_info.n_ul) {
LOG_W(MAC, "out of range slice index %d (slice ID %d)\n",
slice_idx,
eNB->slice_info.dl[slice_idx].id);
return 0;
}
return eNB->UE_info.active[UE_id] == TRUE && eNB->UE_info.assoc_ul_slice_idx[UE_id] == slice_idx;
}
......@@ -1334,7 +1334,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
exit(1);
}
UE_info->first_rb_offset[CC_id][0] = n_rb_ul_tab;
UE_info->first_rb_offset[CC_id] = n_rb_ul_tab;
/*
* ULSCH preprocessor: set UE_template->
......
......@@ -824,7 +824,7 @@ typedef struct {
uint16_t cshift[8]; // num_max_harq
/// Number of Allocated RBs by the ulsch preprocessor
uint8_t pre_allocated_nb_rb_ul[MAX_NUM_SLICES];
uint8_t pre_allocated_nb_rb_ul;
/// index of Allocated RBs by the ulsch preprocessor
int8_t pre_allocated_rb_table_index_ul;
......@@ -920,8 +920,6 @@ typedef struct {
/// number of bytes to schedule for each LC
uint32_t dl_lc_bytes[MAX_NUM_LCID];
uint16_t max_rbs_allowed_slice_uplink[NFAPI_CC_MAX][MAX_NUM_SLICES];
// resource scheduling information
/// Current DL harq round per harq_pid on each CC
......@@ -1149,8 +1147,7 @@ typedef struct {
/// Sorting criteria for the UE list in the MAC preprocessor
uint16_t sorting_criteria[MAX_NUM_SLICES][CR_NUM];
uint16_t first_rb_offset[NFAPI_CC_MAX][MAX_NUM_SLICES];
int assoc_ul_slice_idx[MAX_MOBILES_PER_ENB];
uint16_t first_rb_offset[NFAPI_CC_MAX];
} UE_info_t;
/*! \brief deleting control information*/
......
......@@ -686,8 +686,11 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
uint16_t *first_rb);
void store_ulsch_buffer(module_id_t module_idP, int frameP,
sub_frame_t subframeP);
void assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
sub_frame_t subframeP, uint16_t *first_rb);
void assign_max_mcs_min_rb(module_id_t module_idP,
int CC_id,
int frameP,
sub_frame_t subframeP,
uint16_t *first_rb);
void adjust_bsr_info(int buffer_occupancy, uint16_t TBS,
UE_TEMPLATE *UE_template);
......
......@@ -55,7 +55,6 @@ void init_UE_info(UE_info_t *UE_info)
memset(UE_info->eNB_UE_stats, 0, sizeof(UE_info->eNB_UE_stats));
memset(UE_info->UE_sched_ctrl, 0, sizeof(UE_info->UE_sched_ctrl));
memset(UE_info->active, 0, sizeof(UE_info->active));
memset(UE_info->assoc_ul_slice_idx, 0, sizeof(UE_info->assoc_ul_slice_idx));
}
void init_slice_info(slice_info_t *sli)
......
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