Commit 9b9eb6f4 authored by francescomani's avatar francescomani

common structure for non-BWP servingcell info

parent 15aeb34c
......@@ -569,7 +569,6 @@ typedef struct NR_UE_DL_BWP {
uint16_t initial_BWPStart;
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList_Common;
NR_PDSCH_Config_t *pdsch_Config;
NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig;
uint8_t mcsTableIdx;
nr_dci_format_t dci_format;
int bw_tbslbrm;
......@@ -585,13 +584,11 @@ typedef struct NR_UE_UL_BWP {
uint16_t initial_BWPSize;
uint16_t initial_BWPStart;
NR_RACH_ConfigCommon_t *rach_ConfigCommon;
NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig;
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList_Common;
NR_ConfiguredGrantConfig_t *configuredGrantConfig;
NR_PUSCH_Config_t *pusch_Config;
NR_PUCCH_Config_t *pucch_Config;
NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon;
NR_UplinkConfig_t *supplementaryUplink;
NR_CSI_MeasConfig_t *csi_MeasConfig;
NR_SRS_Config_t *srs_Config;
long *msg3_DeltaPreamble;
......@@ -602,6 +599,21 @@ typedef struct NR_UE_UL_BWP {
int max_fb_time;
} NR_UE_UL_BWP_t;
// non-BWP seving cell configuration
typedef struct {
NR_CrossCarrierSchedulingConfig_t *crossCarrierSchedulingConfig;
NR_SRS_CarrierSwitching_t *carrierSwitching;
NR_UplinkConfig_t *supplementaryUplink;
NR_PDSCH_CodeBlockGroupTransmission_t *pdsch_CGB_Transmission;
long *xOverhead_PDSCH;
long *nrofHARQ_ProcessesForPDSCH;
long *maxMIMO_Layers_PDSCH;
NR_PUSCH_CodeBlockGroupTransmission_t *pusch_CGB_Transmission;
long *rateMatching_PUSCH;
long *xOverhead_PUSCH;
long *maxMIMO_Layers_PUSCH;
} NR_UE_ServingCell_Info_t;
typedef enum {
defaultA = 0,
defaultB = 1,
......
......@@ -2865,7 +2865,7 @@ uint8_t get_pusch_nb_antenna_ports(NR_PUSCH_Config_t *pusch_Config,
}
// #define DEBUG_SRS_RESOURCE_IND
uint8_t compute_srs_resource_indicator(NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig,
uint8_t compute_srs_resource_indicator(long *maxMIMO_Layers,
NR_PUSCH_Config_t *pusch_Config,
NR_SRS_Config_t *srs_config,
nr_srs_feedback_t *srs_feedback,
......@@ -2930,15 +2930,10 @@ uint8_t compute_srs_resource_indicator(NR_PUSCH_ServingCellConfig_t *pusch_servi
// - otherwise, Lmax is given by the maximum number of layers for PUSCH supported by the UE for the serving cell
// for non-codebook based operation.
int Lmax = 0;
if (pusch_servingcellconfig != NULL) {
if (pusch_servingcellconfig->ext1->maxMIMO_Layers != NULL) {
Lmax = *pusch_servingcellconfig->ext1->maxMIMO_Layers;
} else {
AssertFatal(1 == 0, "MIMO on PUSCH not supported, maxMIMO_Layers needs to be set to 1\n");
}
} else {
if (maxMIMO_Layers != NULL)
Lmax = *maxMIMO_Layers;
else
AssertFatal(1 == 0, "MIMO on PUSCH not supported, maxMIMO_Layers needs to be set to 1\n");
}
int lmin = 0;
int lsum = 0;
int count = 0;
......@@ -3278,7 +3273,7 @@ uint16_t get_rb_bwp_dci(nr_dci_format_t format,
uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
const NR_UE_UL_BWP_t *UL_BWP,
const NR_CrossCarrierSchedulingConfig_t *crossCarrierSchedulingConfig,
const NR_UE_ServingCell_Info_t *sc_info,
long pdsch_HARQ_ACK_Codebook,
dci_pdu_rel15_t *dci_pdu,
nr_dci_format_t format,
......@@ -3329,13 +3324,13 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
/// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, ULSCH indicator 1 --16
size += 16;
// Carrier indicator
if (crossCarrierSchedulingConfig != NULL) {
dci_pdu->carrier_indicator.nbits=3;
if (sc_info->crossCarrierSchedulingConfig) {
dci_pdu->carrier_indicator.nbits = 3;
size += dci_pdu->carrier_indicator.nbits;
}
// UL/SUL indicator
if (UL_BWP->supplementaryUplink != NULL) {
dci_pdu->carrier_indicator.nbits=1;
if (sc_info->supplementaryUplink) {
dci_pdu->carrier_indicator.nbits = 1;
size += dci_pdu->ul_sul_indicator.nbits;
}
// BWP Indicator
......@@ -3384,12 +3379,12 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
size += dci_pdu->dai[0].nbits;
LOG_D(NR_MAC, "DAI1 nbits %d\n", dci_pdu->dai[0].nbits);
// 2nd DAI
if (DL_BWP->pdsch_servingcellconfig && DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
if (sc_info->pdsch_CGB_Transmission) {
dci_pdu->dai[1].nbits = 2;
size += dci_pdu->dai[1].nbits;
}
// SRS resource indicator
dci_pdu->srs_resource_indicator.nbits = compute_srs_resource_indicator(UL_BWP->pusch_servingcellconfig, pusch_Config, srs_config, NULL, NULL);
dci_pdu->srs_resource_indicator.nbits = compute_srs_resource_indicator(sc_info->maxMIMO_Layers_PUSCH, pusch_Config, srs_config, NULL, NULL);
size += dci_pdu->srs_resource_indicator.nbits;
LOG_D(NR_MAC, "dci_pdu->srs_resource_indicator.nbits %d\n", dci_pdu->srs_resource_indicator.nbits);
// Precoding info and number of layers
......@@ -3417,7 +3412,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
size += dci_pdu->antenna_ports.nbits;
LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits = %d\n",dci_pdu->antenna_ports.nbits);
// SRS request
if (UL_BWP->supplementaryUplink == NULL)
if (sc_info->supplementaryUplink == NULL)
dci_pdu->srs_request.nbits = 2;
else
dci_pdu->srs_request.nbits = 3;
......@@ -3430,8 +3425,8 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
}
}
// CBGTI
if (UL_BWP->pusch_servingcellconfig && UL_BWP->pusch_servingcellconfig->codeBlockGroupTransmission != NULL) {
int num = UL_BWP->pusch_servingcellconfig->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock;
if (sc_info->pusch_CGB_Transmission) {
int num = sc_info->pusch_CGB_Transmission->maxCodeBlockGroupsPerTransportBlock;
dci_pdu->cbgti.nbits = 2 + (num<<1);
size += dci_pdu->cbgti.nbits;
}
......@@ -3482,8 +3477,8 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
// Format identifier
size = 1;
// Carrier indicator
if (crossCarrierSchedulingConfig != NULL) {
dci_pdu->carrier_indicator.nbits=3;
if (sc_info->crossCarrierSchedulingConfig) {
dci_pdu->carrier_indicator.nbits = 3;
size += dci_pdu->carrier_indicator.nbits;
}
......@@ -3576,20 +3571,20 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
size += dci_pdu->transmission_configuration_indication.nbits;
}
// SRS request
if (UL_BWP->supplementaryUplink == NULL)
if (sc_info->supplementaryUplink == NULL)
dci_pdu->srs_request.nbits = 2;
else
dci_pdu->srs_request.nbits = 3;
size += dci_pdu->srs_request.nbits;
// CBGTI
if (DL_BWP->pdsch_servingcellconfig && DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
uint8_t maxCBGperTB = (DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock + 1) * 2;
if (sc_info->pdsch_CGB_Transmission) {
uint8_t maxCBGperTB = (sc_info->pdsch_CGB_Transmission->maxCodeBlockGroupsPerTransportBlock + 1) * 2;
long *maxCWperDCI_rrc = pdsch_Config->maxNrofCodeWordsScheduledByDCI;
uint8_t maxCW = (maxCWperDCI_rrc == NULL) ? 1 : *maxCWperDCI_rrc;
dci_pdu->cbgti.nbits = maxCBGperTB * maxCW;
size += dci_pdu->cbgti.nbits;
// CBGFI
if (DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission->choice.setup->codeBlockGroupFlushIndicator) {
if (sc_info->pdsch_CGB_Transmission->codeBlockGroupFlushIndicator) {
dci_pdu->cbgfi.nbits = 1;
size += dci_pdu->cbgfi.nbits;
}
......
......@@ -71,7 +71,7 @@ bool is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, s
bool is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, slot_t slotP, frame_type_t frame_type);
uint8_t compute_srs_resource_indicator(NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig,
uint8_t compute_srs_resource_indicator(long *maxMIMO_Layers,
NR_PUSCH_Config_t *pusch_Config,
NR_SRS_Config_t *srs_config,
nr_srs_feedback_t *srs_feedback,
......@@ -95,7 +95,7 @@ NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda
uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
const NR_UE_UL_BWP_t *UL_BWP,
const NR_CrossCarrierSchedulingConfig_t *crossCarrierSchedulingConfig,
const NR_UE_ServingCell_Info_t *sc_info,
long pdsch_HARQ_ACK_Codebook,
dci_pdu_rel15_t *dci_pdu,
nr_dci_format_t format,
......
......@@ -744,11 +744,7 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
}
if(spCellConfigDedicated) {
UL_BWP->supplementaryUplink = spCellConfigDedicated->supplementaryUplink;
UL_BWP->csi_MeasConfig = spCellConfigDedicated->csi_MeasConfig ? spCellConfigDedicated->csi_MeasConfig->choice.setup : NULL;
UL_BWP->pusch_servingcellconfig =
spCellConfigDedicated->uplinkConfig && spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig ? spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
DL_BWP->pdsch_servingcellconfig = spCellConfigDedicated->pdsch_ServingCellConfig ? spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup : NULL;
if (spCellConfigDedicated->firstActiveDownlinkBWP_Id)
DL_BWP->bwp_id = *spCellConfigDedicated->firstActiveDownlinkBWP_Id;
......@@ -1013,6 +1009,109 @@ void configure_maccellgroup(NR_UE_MAC_INST_t *mac, const NR_MAC_CellGroupConfig_
}
}
void configure_servingcell_info(NR_UE_ServingCell_Info_t *sc_info,
NR_ServingCellConfig_t *scd)
{
if (scd->supplementaryUplink)
updateMACie(sc_info->supplementaryUplink,
scd->supplementaryUplink,
NR_UplinkConfig_t);
if (scd->crossCarrierSchedulingConfig)
updateMACie(sc_info->crossCarrierSchedulingConfig,
scd->crossCarrierSchedulingConfig,
NR_CrossCarrierSchedulingConfig_t);
if (scd->pdsch_ServingCellConfig) {
switch (scd->pdsch_ServingCellConfig->present) {
case NR_SetupRelease_PDSCH_ServingCellConfig_PR_NOTHING :
break;
case NR_SetupRelease_PDSCH_ServingCellConfig_PR_release :
// release all configurations
if (sc_info->pdsch_CGB_Transmission) {
ASN_STRUCT_FREE(asn_DEF_NR_PDSCH_CodeBlockGroupTransmission,
sc_info->pdsch_CGB_Transmission);
sc_info->pdsch_CGB_Transmission = NULL;
}
if (sc_info->xOverhead_PDSCH) {
free(sc_info->xOverhead_PDSCH);
sc_info->xOverhead_PDSCH = NULL;
}
if (sc_info->maxMIMO_Layers_PDSCH) {
free(sc_info->maxMIMO_Layers_PDSCH);
sc_info->maxMIMO_Layers_PDSCH = NULL;
}
break;
case NR_SetupRelease_PDSCH_ServingCellConfig_PR_setup : {
NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig = scd->pdsch_ServingCellConfig->choice.setup;
if (pdsch_servingcellconfig->codeBlockGroupTransmission)
handleMACsetuprelease(sc_info->pdsch_CGB_Transmission,
pdsch_servingcellconfig->codeBlockGroupTransmission,
NR_PDSCH_CodeBlockGroupTransmission_t,
asn_DEF_NR_PDSCH_CodeBlockGroupTransmission);
updateMACie(sc_info->xOverhead_PDSCH,
pdsch_servingcellconfig->xOverhead,
long);
if (pdsch_servingcellconfig->ext1 &&
pdsch_servingcellconfig->ext1->maxMIMO_Layers)
updateMACie(sc_info->maxMIMO_Layers_PDSCH,
pdsch_servingcellconfig->ext1->maxMIMO_Layers,
long);
break;
}
default :
AssertFatal(false, "Invalid case\n");
}
}
if (scd->uplinkConfig &&
scd->uplinkConfig->pusch_ServingCellConfig) {
switch (scd->uplinkConfig->pusch_ServingCellConfig->present) {
case NR_SetupRelease_PUSCH_ServingCellConfig_PR_NOTHING :
break;
case NR_SetupRelease_PUSCH_ServingCellConfig_PR_release :
// release all configurations
if (sc_info->pusch_CGB_Transmission) {
ASN_STRUCT_FREE(asn_DEF_NR_PUSCH_CodeBlockGroupTransmission,
sc_info->pusch_CGB_Transmission);
sc_info->pdsch_CGB_Transmission = NULL;
}
if (sc_info->rateMatching_PUSCH) {
free(sc_info->rateMatching_PUSCH);
sc_info->rateMatching_PUSCH = NULL;
}
if (sc_info->xOverhead_PUSCH) {
free(sc_info->xOverhead_PUSCH);
sc_info->xOverhead_PUSCH = NULL;
}
if (sc_info->maxMIMO_Layers_PUSCH) {
free(sc_info->maxMIMO_Layers_PUSCH);
sc_info->maxMIMO_Layers_PUSCH = NULL;
}
break;
case NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup : {
NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig = scd->uplinkConfig->pusch_ServingCellConfig->choice.setup;
updateMACie(sc_info->rateMatching_PUSCH,
pusch_servingcellconfig->rateMatching,
long);
updateMACie(sc_info->xOverhead_PUSCH,
pusch_servingcellconfig->xOverhead,
long);
if (pusch_servingcellconfig->ext1 &&
pusch_servingcellconfig->ext1->maxMIMO_Layers)
updateMACie(sc_info->maxMIMO_Layers_PUSCH,
pusch_servingcellconfig->ext1->maxMIMO_Layers,
long);
if (pusch_servingcellconfig->codeBlockGroupTransmission)
handleMACsetuprelease(sc_info->pusch_CGB_Transmission,
pusch_servingcellconfig->codeBlockGroupTransmission,
NR_PUSCH_CodeBlockGroupTransmission_t,
asn_DEF_NR_PUSCH_CodeBlockGroupTransmission);
break;
}
default :
AssertFatal(false, "Invalid case\n");
}
}
}
void nr_rrc_mac_config_req_cg(module_id_t module_id,
int cc_idP,
NR_CellGroupConfig_t *cell_group_config)
......@@ -1029,14 +1128,15 @@ void nr_rrc_mac_config_req_cg(module_id_t module_id,
if (cell_group_config->spCellConfig) {
NR_SpCellConfig_t *spCellConfig = cell_group_config->spCellConfig;
NR_ServingCellConfig_t *scd = spCellConfig->spCellConfigDedicated;
mac->servCellIndex = spCellConfig->servCellIndex ? *spCellConfig->servCellIndex : 0;
if (spCellConfig->reconfigurationWithSync) {
LOG_A(NR_MAC, "Received reconfigurationWithSync\n");
handle_reconfiguration_with_sync(mac, module_id, cc_idP, spCellConfig->reconfigurationWithSync);
}
if (spCellConfig->spCellConfigDedicated) {
mac->crossCarrierSchedulingConfig = spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig;
configure_current_BWP(mac, NULL, spCellConfig->spCellConfigDedicated);
if (scd) {
configure_servingcell_info(&mac->sc_info, scd);
configure_current_BWP(mac, NULL, scd);
}
}
......
......@@ -445,6 +445,7 @@ typedef struct {
int si_window_start;
ssb_list_info_t ssb_list;
NR_UE_ServingCell_Info_t sc_info;
NR_UE_DL_BWP_t current_DL_BWP;
NR_UE_UL_BWP_t current_UL_BWP;
NR_BWP_DownlinkCommon_t *bwp_dlcommon;
......@@ -464,7 +465,6 @@ typedef struct {
NR_SearchSpace_t *search_space_zero;
NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon;
NR_CrossCarrierSchedulingConfig_t *crossCarrierSchedulingConfig;
bool phy_config_request_sent;
frame_type_t frame_type;
......
......@@ -39,11 +39,22 @@
#define NR_DL_MAX_DAI (4) /* TS 38.213 table 9.1.3-1 Value of counter DAI for DCI format 1_0 and 1_1 */
#define NR_DL_MAX_NB_CW (2) /* number of downlink code word */
#define updateMACie(destination, origin, type) { \
type *tmp = origin; \
origin = destination; \
destination = tmp; \
} \
#define updateMACie(destination, origin, type) { \
type *tmp = origin; \
origin = destination; \
destination = tmp; \
} \
#define handleMACsetuprelease(destination, origin, type, asn_DEF) { \
if (origin->present == 1) { \
ASN_STRUCT_FREE(asn_DEF, destination); \
destination = NULL; \
} \
if (origin->present == 2) \
updateMACie(destination, \
origin->choice.setup, \
type); \
} \
/**\brief initialize the field in nr_mac instance
\param module_id module id */
......
......@@ -175,20 +175,20 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
rel15->dci_format_options[1] = NR_UL_DCI_FORMAT_0_0;
}
NR_UE_ServingCell_Info_t *sc_info = &mac->sc_info;
// loop over RNTI type and configure resource allocation for DCI
for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->ss_type_options[i] = ss->searchSpaceType->present;
const int dci_format = rel15->dci_format_options[i];
uint16_t alt_size = 0;
if(current_DL_BWP) {
// computing alternative size for padding
dci_pdu_rel15_t temp_pdu;
if(dci_format == NR_DL_DCI_FORMAT_1_0)
alt_size =
nr_dci_size(current_DL_BWP,
current_UL_BWP,
mac->crossCarrierSchedulingConfig,
sc_info,
mac->pdsch_HARQ_ACK_Codebook,
&temp_pdu,
NR_UL_DCI_FORMAT_0_0,
......@@ -202,7 +202,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
alt_size =
nr_dci_size(current_DL_BWP,
current_UL_BWP,
mac->crossCarrierSchedulingConfig,
sc_info,
mac->pdsch_HARQ_ACK_Codebook,
&temp_pdu,
NR_DL_DCI_FORMAT_1_0,
......@@ -216,7 +216,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP,
current_UL_BWP,
mac->crossCarrierSchedulingConfig,
sc_info,
mac->pdsch_HARQ_ACK_Codebook,
&mac->def_dci_pdu_rel15[dl_config->slot][dci_format],
dci_format,
......
......@@ -715,7 +715,11 @@ static int nr_ue_process_dci_dl_10(module_id_t module_id,
int R = nr_get_code_rate_dl(dlsch_pdu->mcs, dlsch_pdu->mcs_table);
if (R > 0) {
dlsch_pdu->targetCodeRate = R;
int nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
int nb_rb_oh;
if (mac->sc_info.xOverhead_PDSCH)
nb_rb_oh = 6 * (1 + *mac->sc_info.xOverhead_PDSCH);
else
nb_rb_oh = 0;
int nb_re_dmrs = ((dlsch_pdu->dmrsConfigType == NFAPI_NR_DMRS_TYPE1) ? 6 : 4) * dlsch_pdu->n_dmrs_cdm_groups;
dlsch_pdu->TBS = nr_compute_tbs(dlsch_pdu->qamModOrder,
R,
......@@ -1133,7 +1137,13 @@ static int nr_ue_process_dci_dl_11(module_id_t module_id,
if ((dlsch_pdu->dmrs_ports >> i) & 0x01)
Nl += 1;
}
int nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
NR_UE_ServingCell_Info_t *sc_info = &mac->sc_info;
int nb_rb_oh;
if (sc_info->xOverhead_PDSCH)
nb_rb_oh = 6 * (1 + *sc_info->xOverhead_PDSCH);
else
nb_rb_oh = 0;
int nb_re_dmrs = ((dmrs_type == NULL) ? 6 : 4) * dlsch_pdu->n_dmrs_cdm_groups;
NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid];
......@@ -1158,9 +1168,8 @@ static int nr_ue_process_dci_dl_11(module_id_t module_id,
}
// TBS_LBRM according to section 5.4.2.1 of 38.212
long *maxMIMO_Layers = current_DL_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers;
AssertFatal(maxMIMO_Layers != NULL, "Option with max MIMO layers not configured is not supported\n");
int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4;
AssertFatal(sc_info->maxMIMO_Layers_PDSCH != NULL, "Option with max MIMO layers not configured is not supported\n");
int nl_tbslbrm = *sc_info->maxMIMO_Layers_PDSCH < 4 ? *sc_info->maxMIMO_Layers_PDSCH : 4;
dlsch_pdu->tbslbrm = nr_compute_tbslbrm(dlsch_pdu->mcs_table, current_DL_BWP->bw_tbslbrm, nl_tbslbrm);
/*PTRS configuration */
dlsch_pdu->pduBitmap = 0;
......@@ -1306,7 +1315,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
fapi_nr_ul_config_pucch_pdu *pucch_pdu)
{
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
NR_UE_ServingCell_Info_t *sc_info = &mac->sc_info;
NR_PUCCH_FormatConfig_t *pucchfmt;
long *pusch_id = NULL;
long *id0 = NULL;
......@@ -1363,7 +1372,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
mac->pdsch_HARQ_ACK_Codebook != NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic) {
LOG_E(MAC,"PUCCH Unsupported cell group configuration\n");
return;
} else if (current_DL_BWP && current_DL_BWP->pdsch_servingcellconfig && current_DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
} else if (sc_info->pdsch_CGB_Transmission) {
LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config\n");
return;
}
......
......@@ -429,6 +429,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
int rnti_type = get_rnti_type(mac, rnti);
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_UE_ServingCell_Info_t *sc_info = &mac->sc_info;
// Common configuration
pusch_config_pdu->dmrs_config_type = pusch_dmrs_type1;
......@@ -657,14 +658,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->start_symbol_index,
mac->dmrs_TypeA_Position);
// Num PRB Overhead from PUSCH-ServingCellConfig
if (current_UL_BWP->pusch_servingcellconfig && current_UL_BWP->pusch_servingcellconfig->xOverhead)
N_PRB_oh = *current_UL_BWP->pusch_servingcellconfig->xOverhead;
if (sc_info->xOverhead_PUSCH)
N_PRB_oh = 6 * (1 + *sc_info->xOverhead_PUSCH);
else
N_PRB_oh = 0;
if (current_UL_BWP->pusch_servingcellconfig && current_UL_BWP->pusch_servingcellconfig->rateMatching) {
long *maxMIMO_Layers = current_UL_BWP->pusch_servingcellconfig->ext1->maxMIMO_Layers;
if (sc_info->rateMatching_PUSCH) {
long *maxMIMO_Layers = sc_info->maxMIMO_Layers_PUSCH;
if (!maxMIMO_Layers)
maxMIMO_Layers = pusch_Config ? pusch_Config->maxRank : NULL;
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
......
......@@ -825,9 +825,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
dci_pdu_rel15_t uldci_payload;
memset(&uldci_payload, 0, sizeof(uldci_payload));
const NR_SIB1_t *sib1 = cc->sib1 ? cc->sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
config_uldci(sib1,
scc,
config_uldci(NULL,
pusch_pdu,
&uldci_payload,
NULL,
......@@ -836,8 +834,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
1, // Not toggling NDI in msg3 retransmissions
ul_bwp);
fill_dci_pdu_rel15(scc,
ra->CellGroup,
fill_dci_pdu_rel15(NULL, // parameter not needed for DCI 0_0
&ra->DL_BWP,
ul_bwp,
dci_pdu,
......@@ -1363,8 +1360,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
pdcch_pdu_rel15->StartSymbolIndex,
pdcch_pdu_rel15->DurationSymbols);
fill_dci_pdu_rel15(scc,
ra->CellGroup,
fill_dci_pdu_rel15(NULL, // parameter not needed for DCI 1_0
dl_bwp,
&ra->UL_BWP,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
......@@ -1586,8 +1582,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
pdcch_pdu_rel15->DurationSymbols,
pdsch_pdu_rel15->BWPSize);
fill_dci_pdu_rel15(scc,
ra->CellGroup,
fill_dci_pdu_rel15(NULL, // parameter not needed for DCI 1_0
dl_bwp,
&ra->UL_BWP,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
......
......@@ -495,8 +495,7 @@ static void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
int dci_format = NR_DL_DCI_FORMAT_1_0;
int rnti_type = NR_RNTI_SI;
fill_dci_pdu_rel15(scc,
NULL,
fill_dci_pdu_rel15(NULL,
NULL,
NULL,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
......
......@@ -932,7 +932,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
UE->mac_stats.dl.current_bytes = 0;
UE->mac_stats.dl.current_rbs = 0;
NR_CellGroupConfig_t *cg = UE->CellGroup;
/* update TA and set ta_apply every 10 frames.
* Possible improvement: take the periodicity from input file.
......@@ -1080,10 +1079,10 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu->precodingAndBeamforming.prg_size = pdsch_pdu->rbSize;
pdsch_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = sched_pdsch->pm_index;
// TBS_LBRM according to section 5.4.2.1 of 38.212
// TODO: verify the case where pdsch_servingcellconfig is NULL, in which case
// TODO: verify the case where maxMIMO_Layers is NULL, in which case
// in principle maxMIMO_layers should be given by the maximum number of layers
// for PDSCH supported by the UE for the serving cell (5.4.2.1 of 38.212)
long maxMIMO_Layers = current_BWP->pdsch_servingcellconfig ? *current_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers : 1;
long maxMIMO_Layers = UE->sc_info.maxMIMO_Layers_PDSCH ? *UE->sc_info.maxMIMO_Layers_PDSCH : 1;
const int nl_tbslbrm = min(maxMIMO_Layers, 4);
// Maximum number of PRBs across all configured DL BWPs
pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(current_BWP->mcsTableIdx,
......@@ -1187,8 +1186,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
pucch->timing_indicator);
const int rnti_type = NR_RNTI_C;
fill_dci_pdu_rel15(scc,
cg,
fill_dci_pdu_rel15(&UE->sc_info,
current_BWP,
&UE->current_UL_BWP,
dci_pdu,
......
......@@ -2075,13 +2075,11 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels[0].ServingCellConfigCommon;
NR_UEs_t *UE_info = &nr_mac->UE_info;
const NR_SIB1_t *sib1 = nr_mac->common_channels[0].sib1 ? nr_mac->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
UE_iterator( UE_info->list, UE) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
if (sched_ctrl->ul_failure && !get_softmodem_params()->phy_test)
continue;
NR_CellGroupConfig_t *cg = UE->CellGroup;
NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;
UE->mac_stats.ul.current_bytes = 0;
......@@ -2281,10 +2279,11 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size<<3,sched_pusch->R);
if(current_BWP->pusch_servingcellconfig &&
current_BWP->pusch_servingcellconfig->rateMatching) {
NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info;
if(sc_info->rateMatching_PUSCH) {
// TBS_LBRM according to section 5.4.2.1 of 38.212
long *maxMIMO_Layers = current_BWP->pusch_servingcellconfig->ext1->maxMIMO_Layers;
long *maxMIMO_Layers = sc_info->maxMIMO_Layers_PUSCH;
if (!maxMIMO_Layers)
maxMIMO_Layers = current_BWP->pusch_Config->maxRank;
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
......@@ -2373,8 +2372,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
dci_pdu_rel15_t uldci_payload;
memset(&uldci_payload, 0, sizeof(uldci_payload));
config_uldci(sib1,
scc,
config_uldci(&UE->sc_info,
pusch_pdu,
&uldci_payload,
&sched_ctrl->srs_feedback,
......@@ -2383,8 +2381,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
cur_harq->ndi,
current_BWP);
fill_dci_pdu_rel15(scc,
cg,
fill_dci_pdu_rel15(&UE->sc_info,
&UE->current_DL_BWP,
current_BWP,
dci_pdu,
......
......@@ -143,8 +143,7 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234);
void config_uldci(const NR_SIB1_t *sib1,
const NR_ServingCellConfigCommon_t *scc,
void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
const nfapi_nr_pusch_pdu_t *pusch_pdu,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_srs_feedback_t *srs_feedback,
......@@ -225,8 +224,7 @@ void fill_pdcch_vrb_map(gNB_MAC_INST *mac,
int first_cce,
int aggregation);
void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *CellGroup,
void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo,
const NR_UE_DL_BWP_t *current_DL_BWP,
const NR_UE_UL_BWP_t *current_UL_BWP,
nfapi_nr_dl_dci_pdu_t *pdcch_dci_pdu,
......@@ -239,7 +237,11 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
long pdsch_HARQ_ACK_Codebook,
uint16_t cset0_bwp_size);
void prepare_dci(const NR_CellGroupConfig_t *CellGroup, const NR_UE_DL_BWP_t *current_BWP, const NR_ControlResourceSet_t *coreset, dci_pdu_rel15_t *dci_pdu_rel15, nr_dci_format_t format);
void prepare_dci(const NR_UE_ServingCell_Info_t *servingCellInfo,
const NR_UE_DL_BWP_t *current_BWP,
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format);
void set_r_pucch_parms(int rsetindex,
int r_pucch,
......@@ -354,7 +356,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
const uint16_t rssi);
void create_dl_harq_list(NR_UE_sched_ctrl_t *sched_ctrl,
const NR_PDSCH_ServingCellConfig_t *pdsch);
const NR_UE_ServingCell_Info_t *sc_info);
void reset_dl_harq_list(NR_UE_sched_ctrl_t *sched_ctrl);
......
......@@ -699,6 +699,7 @@ typedef struct {
NR_UE_sched_ctrl_t UE_sched_ctrl;
NR_UE_DL_BWP_t current_DL_BWP;
NR_UE_UL_BWP_t current_UL_BWP;
NR_UE_ServingCell_Info_t sc_info;
NR_mac_stats_t mac_stats;
/// currently active CellGroupConfig
NR_CellGroupConfig_t *CellGroup;
......
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