Commit bbc82731 authored by Raphael Defosseux's avatar Raphael Defosseux

Merge remote-tracking branch 'origin/update-fhi7.2' into integration_2024_w24

parents 2b28b735 63125876
......@@ -109,6 +109,8 @@ elseif (xran_VERSION_STRING STREQUAL "oran_e_maintenance_release_v1.1")
set(xran_VERSION 5.1.1)
elseif (xran_VERSION_STRING STREQUAL "oran_e_maintenance_release_v1.2")
set(xran_VERSION 5.1.2)
elseif (xran_VERSION_STRING STREQUAL "oran_e_maintenance_release_v1.3")
set(xran_VERSION 5.1.3)
endif()
unset(xran_VERSION_LINE)
unset(xran_VERSION_STRING)
......
......@@ -7,7 +7,7 @@ index 7508117..0dbe0bd 100644
#include <rte_mbuf.h>
-#define VERSIONX "oran_e_maintenance_release_v1.0"
+#define VERSIONX "oran_e_maintenance_release_v1.2"
+#define VERSIONX "oran_e_maintenance_release_v1.3"
#define APP_O_DU 0
#define APP_O_RU 1
......@@ -114,7 +114,7 @@ index 7419ae1..a85f973 100644
* @ingroup xran
*
diff --git a/fhi_lib/lib/api/xran_up_api.h b/fhi_lib/lib/api/xran_up_api.h
index 7d3afc5..3e00c5a 100644
index 7d3afc5..e2f1f21 100644
--- a/fhi_lib/lib/api/xran_up_api.h
+++ b/fhi_lib/lib/api/xran_up_api.h
@@ -80,6 +80,7 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
......@@ -125,6 +125,16 @@ index 7d3afc5..3e00c5a 100644
union ecpri_seq_id *seq_id,
uint16_t *num_prbu,
uint16_t *start_prbu,
@@ -89,7 +90,8 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
int8_t expect_comp,
enum xran_comp_hdr_type staticComp,
uint8_t *compMeth,
- uint8_t *iqWidth);
+ uint8_t *iqWidth,
+ uint8_t *is_prach);
inline int xran_prepare_iq_symbol_portion(
struct rte_mbuf *mbuf,
diff --git a/fhi_lib/lib/ethernet/ethdi.c b/fhi_lib/lib/ethernet/ethdi.c
index b6ba257..b53325f 100644
--- a/fhi_lib/lib/ethernet/ethdi.c
......@@ -173,9 +183,18 @@ index e6d3067..8e0abee 100644
static int16_t saturateAbs(int16_t inVal)
{
diff --git a/fhi_lib/lib/src/xran_bfp_uplane.cpp b/fhi_lib/lib/src/xran_bfp_uplane.cpp
index a345df4..7831fa0 100644
index a345df4..109b05a 100644
--- a/fhi_lib/lib/src/xran_bfp_uplane.cpp
+++ b/fhi_lib/lib/src/xran_bfp_uplane.cpp
@@ -90,7 +90,7 @@ namespace BFP_UPlane
{
const __m512i* rawData = reinterpret_cast<const __m512i*>(dataIn.dataExpanded);
/// Abs
- const auto rawDataAbs = _mm512_abs_epi16(rawData[0]);
+ const auto rawDataAbs = _mm512_abs_epi16(_mm512_loadu_epi16(rawData));
/// No need to do a full horizontal max operation here, just do a max IQ step,
/// compute the exponents and then use a reduce max over all exponent values. This
/// is the fastest way to handle a single RB.
@@ -116,7 +116,7 @@ namespace BFP_UPlane
/// Get AVX512 pointer aligned to desired RB
const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + numREOffset);
......@@ -195,10 +214,18 @@ index a345df4..7831fa0 100644
dataOut->dataCompressed[thisRBExpAddr] = thisExp;
/// Now have 1 RB worth of bytes separated into 3 chunks (1 per lane)
diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
index baa673f..edd4ecb 100644
index baa673f..00bfdf2 100644
--- a/fhi_lib/lib/src/xran_common.c
+++ b/fhi_lib/lib/src/xran_common.c
@@ -656,6 +656,7 @@ process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid)
@@ -650,12 +650,15 @@ process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid)
uint8_t compMeth = 0;
uint8_t iqWidth = 0;
+ uint8_t is_prach = 0;
+
void *pHandle = NULL;
int ret = MBUF_FREE;
uint32_t mb_free = 0;
int32_t valid_res = 0;
int expect_comp = (p_dev_ctx->fh_cfg.ru_conf.compMeth != XRAN_COMPMETHOD_NONE);
enum xran_comp_hdr_type staticComp = p_dev_ctx->fh_cfg.ru_conf.xranCompHdrType;
......@@ -206,7 +233,7 @@ index baa673f..edd4ecb 100644
if (staticComp == XRAN_COMP_HDR_TYPE_STATIC)
{
@@ -674,6 +675,7 @@ process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid)
@@ -674,6 +677,7 @@ process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid)
&subframe_id,
&slot_id,
&symb_id,
......@@ -214,7 +241,14 @@ index baa673f..edd4ecb 100644
&seq,
&num_prbu,
&start_prbu,
@@ -688,23 +690,9 @@ process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid)
@@ -683,28 +687,15 @@ process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid)
expect_comp,
staticComp,
&compMeth,
- &iqWidth);
+ &iqWidth,
+ &is_prach);
if (num_bytes <= 0){
print_err("num_bytes is wrong [%d]\n", num_bytes);
return MBUF_FREE;
}
......@@ -241,7 +275,16 @@ index baa673f..edd4ecb 100644
#ifndef FCN_ADAPT
if(valid_res != 0) {
print_dbg("valid_res is wrong [%d] ant %u (%u : %u : %u : %u) seq %u num_bytes %d\n", valid_res, Ant_ID, frame_id, subframe_id, slot_id, symb_id, seq.seq_id, num_bytes);
@@ -1189,7 +1177,7 @@ int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struc
@@ -756,7 +747,7 @@ process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid)
print_dbg("Transport layer fragmentation (eCPRI) is not supported\n");
}
- } else if (Ant_ID >= p_dev_ctx->PrachCPConfig.eAxC_offset && p_dev_ctx->fh_cfg.prachEnable) {
+ } else if (/*Ant_ID >= p_dev_ctx->PrachCPConfig.eAxC_offset && */p_dev_ctx->fh_cfg.prachEnable && is_prach) {
/* PRACH packet has ruportid = num_eAxc + ant_id */
Ant_ID -= p_dev_ctx->PrachCPConfig.eAxC_offset;
symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID] += num_bytes;
@@ -1189,7 +1180,7 @@ int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struc
timeOffset += startSymId * (2048 + 144);
}
timeOffset = timeOffset >> nNumerology; //original number is Tc, convert to Ts based on mu
......@@ -250,7 +293,7 @@ index baa673f..edd4ecb 100644
timeOffset += 16;
params->dir = XRAN_DIR_UL;
@@ -1295,8 +1283,7 @@ int32_t ring_processing_func(void* args)
@@ -1295,8 +1286,7 @@ int32_t ring_processing_func(void* args)
for (i = 0; i < ctx->io_cfg.num_vfs && i < XRAN_VF_MAX; i++){
for(qi = 0; qi < ctx->rxq_per_port[i]; qi++) {
......@@ -430,7 +473,7 @@ index 36bd72c..f7f5678 100644
int idx = 0;
uint16_t *psrc = (uint16_t *)iq_data_start;
diff --git a/fhi_lib/lib/src/xran_up_api.c b/fhi_lib/lib/src/xran_up_api.c
index 397853a..4a714b5 100644
index 397853a..8977e3d 100644
--- a/fhi_lib/lib/src/xran_up_api.c
+++ b/fhi_lib/lib/src/xran_up_api.c
@@ -329,6 +329,7 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
......@@ -441,7 +484,26 @@ index 397853a..4a714b5 100644
union ecpri_seq_id *seq_id,
uint16_t *num_prbu,
uint16_t *start_prbu,
@@ -387,6 +388,8 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
@@ -338,7 +339,8 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
int8_t expect_comp,
enum xran_comp_hdr_type staticComp,
uint8_t *compMeth,
- uint8_t *iqWidth)
+ uint8_t *iqWidth,
+ uint8_t *is_prach)
{
#if XRAN_MLOG_VAR
uint32_t mlogVar[10];
@@ -374,6 +376,8 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
return 0; /* packet too short */
radio_hdr->sf_slot_sym.value = rte_be_to_cpu_16(radio_hdr->sf_slot_sym.value);
+ if (radio_hdr->data_feature.filter_id > 0) *is_prach = 1;
+ else *is_prach = 0;
if (frame_id)
*frame_id = radio_hdr->frame_id;
@@ -387,6 +391,8 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
if (symb_id)
*symb_id = radio_hdr->sf_slot_sym.symb_id;
......@@ -450,7 +512,7 @@ index 397853a..4a714b5 100644
/* Process data section hdr */
struct data_section_hdr *data_hdr =
(void *)rte_pktmbuf_adj(mbuf, sizeof(*radio_hdr));
@@ -401,6 +404,7 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
@@ -401,6 +407,7 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
*sym_inc = data_hdr->fields.sym_inc;
*rb = data_hdr->fields.rb;
*sect_id = data_hdr->fields.sect_id;
......
......@@ -391,6 +391,8 @@ Compile the fronthaul interface library by calling `make` and the option
environment variables `RTE_SDK` for the path to the source tree of DPDK, and
`XRAN_DIR` to set the path to the fronthaul library.
**Note**: you need at least gcc-11 and g++-11.
```bash
cd ~/phy/fhi_lib/lib
make clean
......@@ -790,7 +792,6 @@ Edit the sample OAI gNB configuration file and check following parameters:
compression
* `iq_width_prach`: Width of PRACH IQ samples: if 16, no compression, if <16, applies
compression
* `fft_size`: size of FFT performed by RU, set to 12 by default
* `prach_config`: PRACH-specific configuration
* `eAxC_offset`: PRACH antenna offset
* `kbar`: the PRACH guard interval, provided in RU
......
......@@ -912,7 +912,7 @@ static void fill_rf_config(RU_t *ru, char *rf_config_file)
}
}
static void fill_split7_2_config(split7_config_t *split7, const nfapi_nr_config_request_scf_t *config, int slots_per_frame)
static void fill_split7_2_config(split7_config_t *split7, const nfapi_nr_config_request_scf_t *config, int slots_per_frame, uint16_t ofdm_symbol_size)
{
const nfapi_nr_prach_config_t *prach_config = &config->prach_config;
const nfapi_nr_tdd_table_t *tdd_table = &config->tdd_table;
......@@ -934,6 +934,8 @@ static void fill_split7_2_config(split7_config_t *split7, const nfapi_nr_config_
}
}
}
split7->fftSize = log2(ofdm_symbol_size);
}
/* this function maps the RU tx and rx buffers to the available rf chains.
......@@ -1157,7 +1159,7 @@ void *ru_thread( void *param ) {
nr_dump_frame_parms(fp);
nr_phy_init_RU(ru);
fill_rf_config(ru, ru->rf_config_file);
fill_split7_2_config(&ru->openair0_cfg.split7, &ru->config, fp->slots_per_frame);
fill_split7_2_config(&ru->openair0_cfg.split7, &ru->config, fp->slots_per_frame, fp->ofdm_symbol_size);
if(!emulate_rf) {
// Start IF device if any
......@@ -1342,6 +1344,7 @@ void *ru_thread( void *param ) {
rx_tti_busy[info->slot_rx % RU_RX_SLOT_DEPTH] = false;
if ((info->slot_rx % RU_RX_SLOT_DEPTH) == (proc->tti_rx % RU_RX_SLOT_DEPTH))
not_done = false;
delNotifiedFIFO_elt(res);
}
if (!res)
break;
......
......@@ -160,7 +160,7 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB, int slot, int first_symb, int num_sy
} //rb
} // symb
int nb_rb=0;
int32_t n0_subband_tot=0;
int64_t n0_subband_tot=0;
int32_t n0_subband_tot_perANT[frame_parms->nb_antennas_rx];
memset(n0_subband_tot_perANT, 0, sizeof(n0_subband_tot_perANT));
......@@ -200,7 +200,7 @@ void nr_gnb_measurements(PHY_VARS_gNB *gNB,
unsigned char symbol,
uint8_t nrOfLayers)
{
int rx_power_tot = 0;
uint32_t rx_power_tot = 0;
unsigned short rx_power_avg_dB;
unsigned short rx_power_tot_dB;
RU_t *ru = gNB->RU_list[0];
......
......@@ -454,10 +454,9 @@ static void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
avg128U = simde_mm_add_epi32(avg128U, simde_mm_srai_epi32(simde_mm_madd_epi16(ul_ch128[i], ul_ch128[i]), x));
}
avg[aatx*frame_parms->nb_antennas_rx+aarx] = (((int32_t*)&avg128U)[0] +
((int32_t*)&avg128U)[1] +
((int32_t*)&avg128U)[2] +
((int32_t*)&avg128U)[3]) / y;
int32_t *avg32i = (int32_t *)&avg128U;
int64_t avg64 = (int64_t)avg32i[0] + avg32i[1] + avg32i[2] + avg32i[3];
avg[aatx * frame_parms->nb_antennas_rx + aarx] = avg64 / y;
}
}
......
......@@ -237,7 +237,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uint8_t index=0;
int nb_re_pucch = 12*pucch_pdu->prb_size; // prb size is 1
int signal_energy = 0, signal_energy_ant0 = 0;
int64_t signal_energy = 0, signal_energy_ant0 = 0;
for (int l=0; l<pucch_pdu->nr_of_symbols; l++) {
uint8_t l2 = l + pucch_pdu->start_symbol_index;
......
......@@ -343,13 +343,13 @@ typedef struct {
/// \f$\log_2(\max|H_i|^2)\f$
int16_t log2_maxh;
/// measured RX power based on DRS
int ulsch_power[8];
uint32_t ulsch_power[8];
/// total signal over antennas
int ulsch_power_tot;
uint32_t ulsch_power_tot;
/// measured RX noise power
int ulsch_noise_power[8];
/// total noise over antennas
int ulsch_noise_power_tot;
uint32_t ulsch_noise_power_tot;
/// \brief llr values.
/// - first index: ? [0..1179743] (hard coded)
int16_t *llr;
......
......@@ -195,6 +195,8 @@ typedef struct split7_config {
struct {
symbol_direction_t sym_dir[14];
} slot_dirs[160];
/*! this is the exponent in 2^X for the FFT size */
uint16_t fftSize;
} split7_config_t;
/*! \brief RF frontend parameters set by application */
......
# we need at least gcc-11 to build xran, so let's enforce it here
# (because xran might not check it, and we have control here)
if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 11.0
OR CMAKE_C_COMPILER_VERSION VERSION_LESS 11.0)
message(FATAL_ERROR "you need to have at least gcc/g++-11 to use 7.2 FHI through xran")
endif()
# use env var PKG_CONFIG_PATH to override paths to libdpdk.pc
pkg_check_modules(dpdk REQUIRED libdpdk)
pkg_check_modules(numa REQUIRED numa)
find_package(xran 5.1.2 EXACT REQUIRED) # E release -> 5
find_package(xran 5.1.3 EXACT REQUIRED) # E release -> 5
# Ignore xran-specific warning: we don't care/can't change the following warning, so suppress
# alignment 1 of 'struct XYZ' is less than 2
......
......@@ -729,7 +729,7 @@ static bool set_fh_frame_config(const openair0_config_t *oai0, struct xran_frame
return true;
}
static bool set_fh_ru_config(const paramdef_t *rup, int nru, struct xran_ru_config *ru_config)
static bool set_fh_ru_config(const paramdef_t *rup, uint16_t fftSize, int nru, struct xran_ru_config *ru_config)
{
ru_config->xranTech = XRAN_RAN_5GNR;
ru_config->xranCat = XRAN_CATEGORY_A;
......@@ -740,7 +740,8 @@ static bool set_fh_ru_config(const paramdef_t *rup, int nru, struct xran_ru_conf
ru_config->iqWidth_PRACH = *gpd(rup, nru, ORAN_RU_CONFIG_IQWIDTH_PRACH)->uptr;
AssertFatal(ru_config->iqWidth_PRACH <= 16, "IQ Width for PRACH cannot be > 16!\n");
ru_config->compMeth_PRACH = ru_config->iqWidth_PRACH < 16 ? XRAN_COMPMETHOD_BLKFLOAT : XRAN_COMPMETHOD_NONE;
ru_config->fftSize = *gpd(rup, nru, ORAN_RU_CONFIG_FFT_SIZE)->uptr;
AssertFatal(fftSize > 0, "FFT size cannot be 0\n");
ru_config->fftSize = fftSize;
ru_config->byteOrder = XRAN_NE_BE_BYTE_ORDER;
ru_config->iqOrder = XRAN_I_Q_ORDER;
ru_config->xran_max_frame = 0;
......@@ -779,6 +780,7 @@ bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0, struc
DevAssert(oai0->rx_freq[0] == oai0->rx_freq[i]);
DevAssert(oai0->nr_band > 0);
DevAssert(oai0->nr_scs_for_raster > 0);
AssertFatal(oai0->threequarter_fs == 0, "cannot use three-quarter sampling with O-RAN 7.2 split\n");
// we simply assume that the loading process provides function to_nrarfcn()
// to calculate the ARFCN numbers from frequency. That is not clean, but the
......@@ -869,7 +871,7 @@ bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0, struc
return false;
if (!set_fh_frame_config(oai0, &fh_config->frame_conf))
return false;
if (!set_fh_ru_config(rup, nru, &fh_config->ru_conf))
if (!set_fh_ru_config(rup, oai0->split7.fftSize, nru, &fh_config->ru_conf))
return false;
fh_config->bbdev_enc = NULL;
......
......@@ -123,6 +123,14 @@ static struct xran_prb_map get_xran_prb_map_ul(const struct xran_fh_config *f)
return prbmap;
}
static uint32_t next_power_2(uint32_t num)
{
uint32_t power = 2;
while (power < num)
power <<= 1;
return power;
}
static uint32_t oran_allocate_uplane_buffers(
void *instHandle,
struct xran_buffer_list list[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
......@@ -132,7 +140,10 @@ static uint32_t oran_allocate_uplane_buffers(
{
xran_status_t status;
uint32_t pool;
uint32_t numBufs = XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT;
// we need at least XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT
// buffers, but xran_bm_init() uses rte_pktmbuf_pool_create() which
// recommends to use a power of two for the buffers
uint32_t numBufs = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT);
status = xran_bm_init(instHandle, &pool, numBufs, bufSize);
AssertFatal(XRAN_STATUS_SUCCESS == status, "Failed at xran_bm_init(), status %d\n", status);
printf("xran_bm_init() hInstance %p poolIdx %u elements %u size %u\n", instHandle, pool, numBufs, bufSize);
......@@ -211,14 +222,14 @@ static void oran_allocate_cplane_buffers(void *instHandle,
{
xran_status_t status;
uint32_t poolSec;
uint32_t numBufsSec = XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT * sect * XRAN_MAX_FRAGMENT;
uint32_t numBufsSec = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT * sect * XRAN_MAX_FRAGMENT);
uint32_t bufSizeSec = sizeof(struct xran_section_desc);
status = xran_bm_init(instHandle, &poolSec, numBufsSec, bufSizeSec);
AssertFatal(XRAN_STATUS_SUCCESS == status, "Failed at xran_bm_init(), status %d\n", status);
printf("xran_bm_init() hInstance %p poolIdx %u elements %u size %u\n", instHandle, poolSec, numBufsSec, bufSizeSec);
uint32_t poolPrb;
uint32_t numBufsPrb = XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT;
uint32_t numBufsPrb = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT);
uint32_t bufSizePrb = size_of_prb_map;
status = xran_bm_init(instHandle, &poolPrb, numBufsPrb, bufSizePrb);
AssertFatal(XRAN_STATUS_SUCCESS == status, "Failed at xran_bm_init(), status %d\n", status);
......
......@@ -91,13 +91,11 @@
#define ORAN_RU_CONFIG_IQWIDTH "iq_width"
#define ORAN_RU_CONFIG_IQWIDTH_PRACH "iq_width_prach"
#define ORAN_RU_CONFIG_FFT_SIZE "fft_size"
// clang-format off
#define ORAN_RU_DESC {\
{ORAN_RU_CONFIG_IQWIDTH, "sample IQ width (16=uncompressed)\n", PARAMFLAG_MANDATORY, .u8ptr=NULL, .defuintval=16, TYPE_UINT8, 0}, \
{ORAN_RU_CONFIG_IQWIDTH_PRACH, "PRACH sample IQ width (16=uncompressed)\n", PARAMFLAG_MANDATORY, .u8ptr=NULL, .defuintval=16, TYPE_UINT8, 0}, \
{ORAN_RU_CONFIG_FFT_SIZE, "Size of FFT at RU\n", PARAMFLAG_MANDATORY, .u8ptr=NULL, .defuintval=12, TYPE_UINT8, 0}, \
}
// clang-format on
......
......@@ -34,6 +34,11 @@
#include "common/utils/threadPool/thread-pool.h"
#include "oaioran.h"
// include the following file for VERSIONX, version of xran lib, to print it during
// startup. Only relevant for printing, if it ever makes problem, remove this
// line and the use of VERSIONX further below. It is relative to phy/fhi_lib/lib/api
#include "../../app/src/common.h"
typedef struct {
eth_state_t e;
rru_config_msg_type_t last_msg;
......@@ -309,7 +314,7 @@ __attribute__((__visibility__("default"))) int transport_init(openair0_device *d
eth->last_msg = (rru_config_msg_type_t)-1;
printf("ORAN: %s\n", __FUNCTION__);
LOG_I(HW, "Initializing O-RAN 7.2 FH interface through xran library (compiled against headers of %s)\n", VERSIONX);
initNotifiedFIFO(&oran_sync_fifo);
eth->oran_priv = oai_oran_initialize(openair0_cfg);
......
......@@ -295,7 +295,6 @@ fhi_72 = {
ru_config = {
iq_width = 9;
iq_width_prach = 9;
fft_size = 12;
};
prach_config = {
eAxC_offset = 4;
......
......@@ -288,7 +288,6 @@ fhi_72 = {
ru_config = {
iq_width = 9;
iq_width_prach = 9;
fft_size = 12;
};
prach_config = {
eAxC_offset = 4;
......
......@@ -288,7 +288,6 @@ fhi_72 = {
ru_config = {
iq_width = 9;
iq_width_prach = 9;
fft_size = 12;
};
prach_config = {
eAxC_offset = 4;
......
......@@ -286,7 +286,6 @@ fhi_72 = {
ru_config = {
iq_width = 9;
iq_width_prach = 9;
fft_size = 12;
};
prach_config = {
eAxC_offset = 4;
......
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