Commit c0f03f29 authored by Sakthivel Velumani's avatar Sakthivel Velumani

Reduced scope of llr_buffer

Direct check on dlsim buffer
parent d4876669
......@@ -864,7 +864,6 @@ void *UE_thread(void *arg) {
bool syncRunning=false;
const int nb_slot_frame = UE->frame_parms.slots_per_frame;
int absolute_slot=0, decoded_frame_rx=INT_MAX, trashed_frames=0;
UE->phy_sim_mode = false;
while (!oai_exit) {
if (UE->lost_sync) {
......
......@@ -135,7 +135,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
uint32_t pdsch_est_size,
int32_t dl_ch_estimates[][pdsch_est_size],
int16_t *llr[2],
int16_t *layer_llr[NR_MAX_NB_LAYERS],
c16_t ptrs_phase_per_slot[][NR_SYMBOLS_PER_SLOT],
int32_t ptrs_re_per_slot[][NR_SYMBOLS_PER_SLOT],
uint32_t dl_valid_re[NR_SYMBOLS_PER_SLOT],
......@@ -470,6 +469,26 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
/* at last symbol in a slot calculate LLR's for whole slot */
if(symbol == (startSymbIdx + nbSymb -1)) {
uint8_t nb_re_dmrs;
if (dlsch[0].dlsch_config.dmrsConfigType == NFAPI_NR_DMRS_TYPE1) {
nb_re_dmrs = 6*dlsch[0].dlsch_config.n_dmrs_cdm_groups;
}
else {
nb_re_dmrs = 4*dlsch[0].dlsch_config.n_dmrs_cdm_groups;
}
uint16_t dmrs_len = get_num_dmrs(dlsch[0].dlsch_config.dlDmrsSymbPos);
const uint32_t rx_llr_size = nr_get_G(dlsch[0].dlsch_config.number_rbs,
dlsch[0].dlsch_config.number_symbols,
nb_re_dmrs,
dmrs_len,
dlsch[0].dlsch_config.qamModOrder,
dlsch[0].Nl);
const uint32_t rx_llr_layer_size = (rx_llr_size + dlsch[0].Nl - 1) / dlsch[0].Nl;
int16_t* layer_llr[NR_MAX_NB_LAYERS];
for (int i=0; i<NR_MAX_NB_LAYERS; i++)
layer_llr[i] = (int16_t *)malloc16_clear(rx_llr_layer_size*sizeof(int16_t));
for(uint8_t i =startSymbIdx; i < (startSymbIdx+nbSymb);i++) {
/* re evaluating the first symbol flag as LLR's are done in symbol loop */
if(i == startSymbIdx && i < 3) {
......@@ -500,15 +519,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
llr_offset);
}
int dmrs_type = dlsch[0].dlsch_config.dmrsConfigType;
uint8_t nb_re_dmrs;
uint16_t dmrs_len = get_num_dmrs(dlsch[0].dlsch_config.dlDmrsSymbPos);
if (dmrs_type==NFAPI_NR_DMRS_TYPE1) {
nb_re_dmrs = 6*dlsch[0].dlsch_config.n_dmrs_cdm_groups;
} else {
nb_re_dmrs = 4*dlsch[0].dlsch_config.n_dmrs_cdm_groups;
}
dlsch0_harq->G = nr_get_G(dlsch[0].dlsch_config.number_rbs,
dlsch[0].dlsch_config.number_symbols,
nb_re_dmrs,
......@@ -524,6 +534,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
codeword_TB1,
layer_llr);
for (int i=0; i<NR_MAX_NB_LAYERS; i++)
free(layer_llr[i]);
// Please keep it: useful for debugging
#ifdef DEBUG_PDSCH_RX
char filename[50];
......
......@@ -587,18 +587,14 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
dmrs_len,
dlsch[0].dlsch_config.qamModOrder,
dlsch[0].Nl);
const uint32_t rx_llr_layer_size = (rx_llr_size + dlsch[0].Nl - 1) / dlsch[0].Nl;
int16_t* llr[2];
int16_t* layer_llr[NR_MAX_NB_LAYERS];
llr[0] = (int16_t *)malloc16_clear(rx_llr_size*sizeof(int16_t));
for (int i=0; i<NR_MAX_NB_LAYERS; i++)
layer_llr[i] = (int16_t *)malloc16_clear(rx_llr_layer_size*sizeof(int16_t));
int ret = nr_ue_pdsch_procedures(ue,
proc,
phy_data.dlsch,
llr,
layer_llr,
rxdataF);
if (ret >= 0)
dec = nr_ue_dlsch_procedures(ue,
......
......@@ -876,7 +876,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
uint32_t pdsch_est_size,
int32_t dl_ch_estimates[][pdsch_est_size],
int16_t *llr[2],
int16_t *layer_llr[NR_MAX_NB_LAYERS],
c16_t ptrs_phase_per_slot[][NR_SYMBOLS_PER_SLOT],
int32_t ptrs_re_per_slot[][NR_SYMBOLS_PER_SLOT],
uint32_t dl_valid_re[NR_SYMBOLS_PER_SLOT],
......
......@@ -660,7 +660,6 @@ typedef struct {
void *phy_sim_pdsch_rxdataF_comp;
void *phy_sim_pdsch_dl_ch_estimates;
void *phy_sim_pdsch_dl_ch_estimates_ext;
bool phy_sim_mode;
} PHY_VARS_NR_UE;
typedef struct nr_phy_data_tx_s {
......
......@@ -177,7 +177,6 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t *llr[2],
int16_t *layer_llr[NR_MAX_NB_LAYERS],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
......
......@@ -573,7 +573,6 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t *llr[2],
int16_t *layer_llr[NR_MAX_NB_LAYERS],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) {
int frame_rx = proc->frame_rx;
......@@ -711,7 +710,6 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
pdsch_est_size,
pdsch_dl_ch_estimates,
llr,
layer_llr,
ptrs_phase_per_slot,
ptrs_re_per_slot,
dl_valid_re,
......@@ -738,12 +736,14 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UEscopeCopy(ue, pdschRxdataF_comp, rxdataF_comp, sizeof(struct complex16), ue->frame_parms.nb_antennas_rx, rx_size);
if (ue->phy_sim_mode) {
if (ue->phy_sim_pdsch_rxdataF_comp)
memcpy(ue->phy_sim_pdsch_rxdataF_comp, rxdataF_comp, sizeof(int32_t)*rx_size*ue->frame_parms.nb_antennas_rx);
if (ue->phy_sim_pdsch_rxdataF_ext)
memcpy(ue->phy_sim_pdsch_rxdataF_ext, rxdataF_ext, sizeof(int32_t)*rx_size*ue->frame_parms.nb_antennas_rx);
if (ue->phy_sim_pdsch_dl_ch_estimates_ext)
memcpy(ue->phy_sim_pdsch_dl_ch_estimates_ext, dl_ch_estimates_ext, sizeof(int32_t)*rx_size*ue->frame_parms.nb_antennas_rx);
if (ue->phy_sim_pdsch_dl_ch_estimates)
memcpy(ue->phy_sim_pdsch_dl_ch_estimates, dl_ch_estimates_ext, sizeof(int32_t)*rx_size*ue->frame_parms.nb_antennas_rx);
}
}
return 0;
}
......@@ -1282,21 +1282,16 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
dlsch[0].dlsch_config.qamModOrder,
dlsch[0].Nl);
const uint32_t rx_llr_buf_sz = ((rx_llr_size+15)/16)*16;
const uint32_t rx_llr_layer_size = (rx_llr_size + dlsch[0].Nl - 1) / dlsch[0].Nl;
const uint32_t nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
int16_t* llr[2];
int16_t* layer_llr[NR_MAX_NB_LAYERS];
for (int i=0; i<nb_codewords; i++)
llr[i] = (int16_t *)malloc16_clear(rx_llr_buf_sz*sizeof(int16_t));
for (int i=0; i<NR_MAX_NB_LAYERS; i++)
layer_llr[i] = (int16_t *)malloc16_clear(rx_llr_layer_size*sizeof(int16_t));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_C, VCD_FUNCTION_IN);
ret_pdsch = nr_ue_pdsch_procedures(ue,
proc,
dlsch,
llr,
layer_llr,
rxdataF);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_C, VCD_FUNCTION_OUT);
......@@ -1317,16 +1312,14 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_slot_rx,ue->dlsch_procedures_stat.p_time/(cpuf*1000.0));
}
if (ue->phy_sim_mode) {
if (ue->phy_sim_rxdataF)
memcpy(ue->phy_sim_rxdataF, rxdataF, sizeof(int32_t)*rxdataF_sz*ue->frame_parms.nb_antennas_rx);
if (ue->phy_sim_pdsch_llr)
memcpy(ue->phy_sim_pdsch_llr, llr[0], sizeof(int16_t)*rx_llr_buf_sz);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
for (int i=0; i<nb_codewords; i++)
free(llr[i]);
for (int i=0; i<NR_MAX_NB_LAYERS; i++)
free(layer_llr[i]);
}
// do procedures for CSI-IM
......
......@@ -957,7 +957,6 @@ int main(int argc, char **argv)
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
UE->frame_parms.nb_antennas_rx = n_rx;
UE->max_ldpc_iterations = max_ldpc_iterations;
UE->phy_sim_mode = true;
if (run_initial_sync==1) UE->is_synchronized = 0;
else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
......
......@@ -95,7 +95,6 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
int16_t *llr[2],
int16_t *layer_llr[NR_MAX_NB_LAYERS],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) {
return 0;
}
......
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