Commit dafaea7d authored by Raghavendra Dinavahi's avatar Raghavendra Dinavahi Committed by Thomas Schlichter

enable HARQ32, Changes in UE

	- num DL/UL harq processes, bits for harq id in DCIs, set according to IEs configured in RRC messages
	- removed going through all the harq processes before triggering nr_ue_ulsch_procedures in phy_procedures_nr_ue.c
	- did not remove usage of MAX_HARQ_PROCESSES in init phase
parent 9726a47f
......@@ -276,11 +276,10 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, n
LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);
start_meas_nr_ue_phy(ue, PHY_PROC_TX);
for (uint8_t harq_pid = 0; harq_pid < NR_MAX_ULSCH_HARQ_PROCESSES; harq_pid++) {
if (ue->ul_harq_processes[harq_pid].ULstatus == ACTIVE) {
nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, gNB_id, phy_data, (c16_t **)&txdataF);
}
}
int harq_pid = phy_data->ulsch.pusch_pdu.pusch_data.harq_process_id;
if (ue->ul_harq_processes[harq_pid].ULstatus == ACTIVE)
nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, gNB_id, phy_data, (c16_t **)&txdataF);
ue_srs_procedures_nr(ue, proc, (c16_t **)&txdataF);
......
......@@ -984,6 +984,13 @@ static void setup_puschconfig(NR_UE_MAC_INST_t *mac, NR_PUSCH_Config_t *source,
struct NR_UCI_OnPUSCH__betaOffsets);
}
}
if (source->ext2) {
if (!target->ext2)
target->ext2 = calloc(1, sizeof(*target->ext2));
UPDATE_IE(target->ext2->harq_ProcessNumberSizeDCI_0_1_r17, source->ext2->harq_ProcessNumberSizeDCI_0_1_r17, long);
} else if (target->ext2) {
free_and_zero(target->ext2->harq_ProcessNumberSizeDCI_0_1_r17);
}
}
static void configure_csi_resourcemapping(NR_CSI_RS_ResourceMapping_t *target, NR_CSI_RS_ResourceMapping_t *source)
......@@ -1131,6 +1138,13 @@ static void setup_pdschconfig(NR_PDSCH_Config_t *source, NR_PDSCH_Config_t *targ
asn_DEF_NR_ZP_CSI_RS_ResourceSet);
AssertFatal(source->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList == NULL, "Not handled\n");
AssertFatal(source->sp_ZP_CSI_RS_ResourceSetsToAddModList == NULL, "Not handled\n");
if (source->ext3) {
if (!target->ext3)
target->ext3 = calloc(1, sizeof(*target->ext3));
UPDATE_IE(target->ext3->harq_ProcessNumberSizeDCI_1_1_r17, source->ext3->harq_ProcessNumberSizeDCI_1_1_r17, long);
} else if (target->ext3) {
free_and_zero(target->ext3->harq_ProcessNumberSizeDCI_1_1_r17);
}
}
static void setup_sr_resource(NR_SchedulingRequestResourceConfig_t *target, NR_SchedulingRequestResourceConfig_t *source)
......@@ -1524,10 +1538,8 @@ static void configure_common_BWP_ul(NR_UE_MAC_INST_t *mac, int bwp_id, NR_BWP_Up
}
if (ul_common->pusch_ConfigCommon->present == NR_SetupRelease_PUSCH_ConfigCommon_PR_release) {
asn1cFreeStruc(asn_DEF_NR_PUSCH_TimeDomainResourceAllocationList, bwp->tdaList_Common);
free(bwp->msg3_DeltaPreamble);
bwp->msg3_DeltaPreamble = NULL;
free(bwp->p0_NominalWithGrant);
bwp->p0_NominalWithGrant = NULL;
free_and_zero(bwp->msg3_DeltaPreamble);
free_and_zero(bwp->p0_NominalWithGrant);
}
}
}
......@@ -2150,18 +2162,12 @@ static void configure_servingcell_info(NR_UE_MAC_INST_t *mac, NR_ServingCellConf
break;
case NR_SetupRelease_PDSCH_ServingCellConfig_PR_release:
// release all configurations
if (sc_info->pdsch_CGB_Transmission)
asn1cFreeStruc(asn_DEF_NR_PDSCH_CodeBlockGroupTransmission, sc_info->pdsch_CGB_Transmission);
if (sc_info->xOverhead_PDSCH) {
free(sc_info->xOverhead_PDSCH);
sc_info->xOverhead_PDSCH = NULL;
}
if (sc_info->maxMIMO_Layers_PDSCH) {
free(sc_info->maxMIMO_Layers_PDSCH);
sc_info->maxMIMO_Layers_PDSCH = NULL;
}
if (sc_info->downlinkHARQ_FeedbackDisabled_r17)
asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc_info->downlinkHARQ_FeedbackDisabled_r17);
asn1cFreeStruc(asn_DEF_NR_PDSCH_CodeBlockGroupTransmission, sc_info->pdsch_CGB_Transmission);
free_and_zero(sc_info->xOverhead_PDSCH);
free_and_zero(sc_info->maxMIMO_Layers_PDSCH);
free_and_zero(sc_info->nrofHARQ_ProcessesForPDSCH);
free_and_zero(sc_info->nrofHARQ_ProcessesForPDSCH_v1700);
asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc_info->downlinkHARQ_FeedbackDisabled_r17);
break;
case NR_SetupRelease_PDSCH_ServingCellConfig_PR_setup: {
NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig = scd->pdsch_ServingCellConfig->choice.setup;
......@@ -2173,13 +2179,17 @@ static void configure_servingcell_info(NR_UE_MAC_INST_t *mac, NR_ServingCellConf
UPDATE_IE(sc_info->xOverhead_PDSCH, pdsch_servingcellconfig->xOverhead, long);
if (pdsch_servingcellconfig->ext1 && pdsch_servingcellconfig->ext1->maxMIMO_Layers)
UPDATE_IE(sc_info->maxMIMO_Layers_PDSCH, pdsch_servingcellconfig->ext1->maxMIMO_Layers, long);
UPDATE_IE(sc_info->nrofHARQ_ProcessesForPDSCH, pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH, long);
if (pdsch_servingcellconfig->ext3)
UPDATE_IE(sc_info->nrofHARQ_ProcessesForPDSCH_v1700, pdsch_servingcellconfig->ext3->nrofHARQ_ProcessesForPDSCH_v1700, long);
else
free_and_zero(sc_info->nrofHARQ_ProcessesForPDSCH_v1700);
if (pdsch_servingcellconfig->ext3 && pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17) {
switch (pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17->present) {
case NR_SetupRelease_DownlinkHARQ_FeedbackDisabled_r17_PR_NOTHING:
break;
case NR_SetupRelease_DownlinkHARQ_FeedbackDisabled_r17_PR_release:
if (sc_info->downlinkHARQ_FeedbackDisabled_r17)
asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc_info->downlinkHARQ_FeedbackDisabled_r17);
asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc_info->downlinkHARQ_FeedbackDisabled_r17);
break;
case NR_SetupRelease_DownlinkHARQ_FeedbackDisabled_r17_PR_setup:
if (sc_info->downlinkHARQ_FeedbackDisabled_r17 == NULL) {
......@@ -2207,20 +2217,11 @@ static void configure_servingcell_info(NR_UE_MAC_INST_t *mac, NR_ServingCellConf
break;
case NR_SetupRelease_PUSCH_ServingCellConfig_PR_release:
// release all configurations
if (sc_info->pusch_CGB_Transmission)
asn1cFreeStruc(asn_DEF_NR_PUSCH_CodeBlockGroupTransmission, sc_info->pusch_CGB_Transmission);
if (sc_info->rateMatching_PUSCH) {
free(sc_info->rateMatching_PUSCH);
sc_info->rateMatching_PUSCH = NULL;
}
if (sc_info->xOverhead_PUSCH) {
free(sc_info->xOverhead_PUSCH);
sc_info->xOverhead_PUSCH = NULL;
}
if (sc_info->maxMIMO_Layers_PUSCH) {
free(sc_info->maxMIMO_Layers_PUSCH);
sc_info->maxMIMO_Layers_PUSCH = NULL;
}
asn1cFreeStruc(asn_DEF_NR_PUSCH_CodeBlockGroupTransmission, sc_info->pusch_CGB_Transmission);
free_and_zero(sc_info->rateMatching_PUSCH);
free_and_zero(sc_info->xOverhead_PUSCH);
free_and_zero(sc_info->maxMIMO_Layers_PUSCH);
free_and_zero(sc_info->nrofHARQ_ProcessesForPUSCH_r17);
break;
case NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup: {
NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig = scd->uplinkConfig->pusch_ServingCellConfig->choice.setup;
......@@ -2233,6 +2234,10 @@ static void configure_servingcell_info(NR_UE_MAC_INST_t *mac, NR_ServingCellConf
pusch_servingcellconfig->codeBlockGroupTransmission,
NR_PUSCH_CodeBlockGroupTransmission_t,
asn_DEF_NR_PUSCH_CodeBlockGroupTransmission);
if (pusch_servingcellconfig->ext3)
UPDATE_IE(sc_info->nrofHARQ_ProcessesForPUSCH_r17, pusch_servingcellconfig->ext3->nrofHARQ_ProcessesForPUSCH_r17, long);
else
free_and_zero(sc_info->nrofHARQ_ProcessesForPUSCH_r17);
break;
}
default:
......@@ -2316,10 +2321,8 @@ void release_ul_BWP(NR_UE_MAC_INST_t *mac, int index)
asn1cFreeStruc(asn_DEF_NR_PUCCH_Config, bwp->pucch_Config);
asn1cFreeStruc(asn_DEF_NR_PUCCH_ConfigCommon, bwp->pucch_ConfigCommon);
asn1cFreeStruc(asn_DEF_NR_SRS_Config, bwp->srs_Config);
free(bwp->msg3_DeltaPreamble);
bwp->msg3_DeltaPreamble = NULL;
free(bwp->p0_NominalWithGrant);
bwp->p0_NominalWithGrant = NULL;
free_and_zero(bwp->msg3_DeltaPreamble);
free_and_zero(bwp->p0_NominalWithGrant);
free(bwp);
}
......
......@@ -276,6 +276,8 @@ void release_mac_configuration(NR_UE_MAC_INST_t *mac, NR_UE_MAC_reset_cause_t ca
asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc->downlinkHARQ_FeedbackDisabled_r17);
free(sc->xOverhead_PDSCH);
free(sc->nrofHARQ_ProcessesForPDSCH);
free(sc->nrofHARQ_ProcessesForPDSCH_v1700);
free(sc->nrofHARQ_ProcessesForPUSCH_r17);
free(sc->rateMatching_PUSCH);
free(sc->xOverhead_PUSCH);
free(sc->maxMIMO_Layers_PDSCH);
......
......@@ -245,7 +245,9 @@ float nr_get_Pcmin(int bandwidth_index) {
int get_sum_delta_pucch(NR_UE_MAC_INST_t *mac, int slot, frame_t frame)
{
int delta_tpc_sum = 0;
for (int i = 0; i < NR_MAX_HARQ_PROCESSES; i++) {
const int num_dl_harq = get_nrofHARQ_ProcessesForPDSCH(&mac->sc_info);
for (int i = 0; i < num_dl_harq; i++) {
if (mac->dl_harq_info[i].active && mac->dl_harq_info[i].ul_slot == slot && mac->dl_harq_info[i].ul_frame == frame) {
delta_tpc_sum += mac->dl_harq_info[i].delta_pucch;
mac->dl_harq_info[i].delta_pucch = 0;
......
......@@ -805,7 +805,7 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac,
/* MCS */
dlsch_pdu->mcs = dci->mcs;
NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid];
NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid.val];
/* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
if (dl_conf_req->pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH ||
dl_conf_req->pdu_type == FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH ||
......@@ -873,7 +873,7 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac,
/* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
dlsch_pdu->rv = dci->rv;
/* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
dlsch_pdu->harq_process_nbr = dci->harq_pid;
dlsch_pdu->harq_process_nbr = dci->harq_pid.val;
/* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */
// according to TS 38.214 Table 5.1.3.2-3
if (dci->tb_scaling > 3) {
......@@ -926,7 +926,7 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac,
const int tpc[] = {-1, 0, 1, 3};
set_harq_status(mac,
dci->pucch_resource_indicator,
dci->harq_pid,
dci->harq_pid.val,
tpc[dci->tpc],
feedback_ti,
dci->dai[0].val,
......@@ -1125,7 +1125,7 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac,
/* MCS (for transport block 1)*/
dlsch_pdu->mcs = dci->mcs;
/* NDI (for transport block 1)*/
NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid];
NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid.val];
if (dci->ndi != current_harq->last_ndi) {
// new data
dlsch_pdu->new_data_indicator = true;
......@@ -1145,7 +1145,7 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac,
/* RV (for transport block 2)*/
dlsch_pdu->tb2_rv = dci->rv2.val;
/* HARQ_PROCESS_NUMBER */
dlsch_pdu->harq_process_nbr = dci->harq_pid;
dlsch_pdu->harq_process_nbr = dci->harq_pid.val;
/* TPC_PUCCH */
// according to TS 38.213 Table 7.2.1-1
if (dci->tpc > 3) {
......@@ -1266,7 +1266,7 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac,
const int tpc[] = {-1, 0, 1, 3};
set_harq_status(mac,
dci->pucch_resource_indicator,
dci->harq_pid,
dci->harq_pid.val,
tpc[dci->tpc],
feedback_ti,
dci->dai[0].val,
......@@ -1480,7 +1480,8 @@ void set_harq_status(NR_UE_MAC_INST_t *mac,
// we need to keep track of how many DAI we received in a slot (dai_cumul) despite the modulo operation
int highest_dai = -1;
int temp_dai = dai;
for (int i = 0; i < NR_MAX_HARQ_PROCESSES; i++) {
const int num_dl_harq = get_nrofHARQ_ProcessesForPDSCH(&mac->sc_info);
for (int i = 0; i < num_dl_harq; i++) {
// looking for other active HARQ processes with feedback in the same frame/slot
if (i == harq_id)
continue;
......@@ -2317,12 +2318,13 @@ bool get_downlink_ack(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sche
number_of_code_word = 2;
}
const int num_dl_harq = get_nrofHARQ_ProcessesForPDSCH(&mac->sc_info);
int res_ind = -1;
/* look for dl acknowledgment which should be done on current uplink slot */
for (int code_word = 0; code_word < number_of_code_word; code_word++) {
for (int dl_harq_pid = 0; dl_harq_pid < NR_MAX_HARQ_PROCESSES; dl_harq_pid++) {
for (int dl_harq_pid = 0; dl_harq_pid < num_dl_harq; dl_harq_pid++) {
NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dl_harq_pid];
......@@ -3058,8 +3060,8 @@ static void extract_10_c_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci
EXTRACT_DCI_ITEM(dci_pdu_rel15->ndi, 1);
// Redundancy version 2bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2);
// HARQ process number 4bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4);
// HARQ process number 4/5 bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, dci_pdu_rel15->harq_pid.nbits);
// Downlink assignment index 2bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->dai[0].val, 2);
// TPC command for scheduled PUCCH 2bit
......@@ -3088,7 +3090,7 @@ static void extract_00_c_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci
// Redundancy version 2bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2);
// HARQ process number 4bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4);
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, 4);
// TPC command for scheduled PUSCH  E2 bits
EXTRACT_DCI_ITEM(dci_pdu_rel15->tpc, 2);
// UL/SUL indicator  E1 bit
......@@ -3115,7 +3117,7 @@ static void extract_10_tc_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dc
// Redundancy version - 2 bits
EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2);
// HARQ process number - 4 bits
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4);
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, 4);
// Downlink assignment index - 2 bits
EXTRACT_DCI_ITEM(dci_pdu_rel15->dai[0].val, 2);
// TPC command for scheduled PUCCH - 2 bits
......@@ -3128,7 +3130,7 @@ static void extract_10_tc_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dc
static void extract_00_tc_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci_pdu, int pos)
{
LOG_D(NR_MAC_DCI, "Received dci 1_0 TC rnti\n");
LOG_D(NR_MAC_DCI, "Received dci 0_0 TC rnti\n");
// Frequency domain assignment
EXTRACT_DCI_ITEM(dci_pdu_rel15->frequency_domain_assignment.val, dci_pdu_rel15->frequency_domain_assignment.nbits);
......@@ -3143,7 +3145,7 @@ static void extract_00_tc_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dc
// Redundancy version 2bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2);
// HARQ process number 4bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4);
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, 4);
// TPC command for scheduled PUSCH  E2 bits
EXTRACT_DCI_ITEM(dci_pdu_rel15->tpc, 2);
}
......@@ -3182,8 +3184,8 @@ static void extract_11_c_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci
EXTRACT_DCI_ITEM(dci_pdu_rel15->ndi2.val, dci_pdu_rel15->ndi2.nbits);
// Redundancy version 2bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->rv2.val, dci_pdu_rel15->rv2.nbits);
// HARQ process number 4bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4);
// HARQ process number 4/5 bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, dci_pdu_rel15->harq_pid.nbits);
// Downlink assignment index
EXTRACT_DCI_ITEM(dci_pdu_rel15->dai[0].val, dci_pdu_rel15->dai[0].nbits);
// TPC command for scheduled PUCCH 2bit
......@@ -3231,8 +3233,8 @@ static void extract_01_c_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci
EXTRACT_DCI_ITEM(dci_pdu_rel15->ndi, 1);
// Redundancy version 2bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2);
// HARQ process number 4bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4);
// HARQ process number 4/5 bit
EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, dci_pdu_rel15->harq_pid.nbits);
// 1st Downlink assignment index
EXTRACT_DCI_ITEM(dci_pdu_rel15->dai[0].val, dci_pdu_rel15->dai[0].nbits);
// 2nd Downlink assignment index
......
......@@ -814,7 +814,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->mcs_table = get_pusch_mcs_table(mcs_table_config, tp_enabled, dci_format, rnti_type, ss_type, false);
/* NDI */
NR_UL_HARQ_INFO_t *harq = &mac->ul_harq_info[dci->harq_pid];
NR_UL_HARQ_INFO_t *harq = &mac->ul_harq_info[dci->harq_pid.val];
pusch_config_pdu->pusch_data.new_data_indicator = false;
if (dci->ndi != harq->last_ndi) {
pusch_config_pdu->pusch_data.new_data_indicator = true;
......@@ -825,7 +825,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
/* RV */
pusch_config_pdu->pusch_data.rv_index = dci->rv;
/* HARQ_PROCESS_NUMBER */
pusch_config_pdu->pusch_data.harq_process_id = dci->harq_pid;
pusch_config_pdu->pusch_data.harq_process_id = dci->harq_pid.val;
if (NR_DMRS_ulconfig != NULL)
add_pos = (NR_DMRS_ulconfig->dmrs_AdditionalPosition == NULL) ? 2 : *NR_DMRS_ulconfig->dmrs_AdditionalPosition;
......
......@@ -1179,7 +1179,7 @@ static uint32_t nr_ue_dl_processing(nr_downlink_indication_t *dl_info)
continue;
}
dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dl_info->slot][dci_format];
g_harq_pid = def_dci_pdu_rel15->harq_pid;
g_harq_pid = def_dci_pdu_rel15->harq_pid.val;
LOG_T(NR_MAC, "Setting harq_pid = %d and dci_index = %d (based on format)\n", g_harq_pid, dci_format);
ret_mask |= (1 << FAPI_NR_DCI_IND);
......
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