Commit 06fa8e36 authored by Francesco Mani's avatar Francesco Mani

frame number synchronization at UE

parent bbfa23e9
......@@ -383,7 +383,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
rvidx = 0;
//------------------------------------------------------------------------------//
scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT;
//scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT;
scheduled_response.ul_config->number_pdus = 1;
scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
......@@ -410,6 +410,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
uint8_t ssb_period = UE->nrUE_config.ssb_table.ssb_period;
//program DCI for slot 1
//TODO: all of this has to be moved to the MAC!!!
......@@ -427,6 +428,13 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
scheduled_response.tx_request = NULL;
scheduled_response.module_id = UE->Mod_id;
scheduled_response.CC_id = 0;
if (!((proc->frame_rx)%(1<<(ssb_period-1)))) {
if(proc->frame_rx > dcireq.dl_config_req.sfn)
UE->frame_gap = proc->frame_rx - dcireq.dl_config_req.sfn;
if(proc->frame_rx < dcireq.dl_config_req.sfn)
UE->frame_gap = dcireq.dl_config_req.sfn - proc->frame_rx;
proc->frame_rx = dcireq.dl_config_req.sfn;
}
scheduled_response.frame = proc->frame_rx;
scheduled_response.slot = proc->nr_tti_rx;
......@@ -618,7 +626,7 @@ void *UE_thread(void *arg) {
newNotifiedFIFO_elt(sizeof(processingData_t), 0,&nf,UE_processing));
bool syncRunning=false;
const int nb_slot_frame = 10*UE->frame_parms.slots_per_subframe;
const int nb_slot_frame = UE->frame_parms.slots_per_frame;
int absolute_slot=0, decoded_frame_rx=INT_MAX, trashed_frames=0;
while (!oai_exit) {
......@@ -691,8 +699,8 @@ void *UE_thread(void *arg) {
curMsg->proc.subframe_rx=table_sf_slot[slot_nr];
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = ( absolute_slot/nb_slot_frame ) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ( (absolute_slot + DURATION_RX_TO_TX) /nb_slot_frame ) % MAX_FRAME_NUMBER;
curMsg->proc.frame_rx = ((absolute_slot/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = (((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
......@@ -735,9 +743,9 @@ void *UE_thread(void *arg) {
readBlockSize,
UE->frame_parms.nb_antennas_rx),"");
if (slot_nr==18)
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
if (slot_nr==18)
AssertFatal(writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
timestamp+
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_slot) -
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0 -
......
......@@ -129,7 +129,8 @@ typedef struct {
///
#define NFAPI_RX_IND_MAX_PDU 100
typedef struct {
uint32_t sfn_slot;
uint16_t sfn;
uint16_t slot;
uint16_t number_pdus;
fapi_nr_rx_indication_body_t rx_indication_body[NFAPI_RX_IND_MAX_PDU];
} fapi_nr_rx_indication_t;
......@@ -148,7 +149,8 @@ typedef struct {
///
typedef struct {
uint32_t sfn_slot;
uint16_t sfn;
uint16_t slot;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_body_t *tx_request_body;
......@@ -304,7 +306,8 @@ typedef struct {
} fapi_nr_ul_config_request_pdu_t;
typedef struct {
uint32_t sfn_slot;
uint16_t sfn;
uint16_t slot;
uint8_t number_pdus;
fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM];
} fapi_nr_ul_config_request_t;
......@@ -383,7 +386,8 @@ typedef struct {
} fapi_nr_dl_config_request_pdu_t;
typedef struct {
uint32_t sfn_slot;
uint16_t sfn;
uint16_t slot;
uint8_t number_pdus;
fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
} fapi_nr_dl_config_request_t;
......
......@@ -25,7 +25,9 @@
/// Subcarrier spacings in Hz indexed by numerology index
uint32_t nr_subcarrier_spacing[MAX_NUM_SUBCARRIER_SPACING] = {15e3, 30e3, 60e3, 120e3, 240e3};
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 16, 32};
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 8, 16};
int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp)
{
......
......@@ -242,7 +242,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
///Payload generation
memset((void *)pbch, 0, sizeof(NR_gNB_PBCH));
pbch->pbch_a=0;
uint8_t ssb_index = ssb_pdu->ssb_pdu_rel15.SsbBlockIndex;
uint8_t ssb_index = frame_parms->ssb_index;
uint8_t *pbch_pdu = (uint8_t*)&ssb_pdu->ssb_pdu_rel15.bchPayload;
for (int i=0; i<NR_PBCH_PDU_BITS; i++)
pbch->pbch_a |= ((pbch_pdu[i>>3]>>(7-(i&7)))&1)<<i;
......
......@@ -588,6 +588,12 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
ue->symbol_offset = nr_get_ssb_start_symbol(frame_parms);
uint8_t frame_number_4lsb = 0;
for (int i=0; i<4; i++)
frame_number_4lsb |= ((nr_ue_pbch_vars->xtra_byte>>i)&1)<<(3-i);
proc->decoded_frame_rx = frame_number_4lsb;
#ifdef DEBUG_PBCH
printf("xtra_byte %x payload %x\n", nr_ue_pbch_vars->xtra_byte, payload);
......@@ -602,7 +608,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
dl_indication.proc=proc; // needed to signal back the frame number -> FIXME
dl_indication.proc=proc;
dl_indication.module_id=0;
dl_indication.cc_id=proc->CC_id;
......
......@@ -627,6 +627,8 @@ typedef struct PHY_VARS_gNB_s {
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu;
nfapi_nr_dl_tti_ssb_pdu ssb_pdu;
uint8_t skipped_slots; // for 120kHz SSB transmission
int num_pdsch_rnti;
NR_gNB_PBCH pbch;
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
......
......@@ -872,6 +872,8 @@ typedef struct {
fapi_nr_config_request_t nrUE_config;
uint16_t frame_gap;
// the following structures are not part of PHY_vars_UE anymore as it is not thread safe. They are now on the stack of the functions that actually need them
//nr_downlink_indication_t dl_indication;
......
......@@ -49,40 +49,6 @@
#endif
extern uint8_t nfapi_mode;
/*
int return_ssb_type(nfapi_config_request_t *cfg)
{
int mu = cfg->subframe_config.numerology_index_mu.value;
nr_ssb_type_e ssb_type;
switch(mu) {
case NR_MU_0:
ssb_type = nr_ssb_type_A;
break;
case NR_MU_1:
ssb_type = nr_ssb_type_B;
break;
case NR_MU_3:
ssb_type = nr_ssb_type_D;
break;
case NR_MU_4:
ssb_type = nr_ssb_type_E;
break;
default:
AssertFatal(0==1, "Invalid numerology index %d for the synchronization block\n", mu);
}
LOG_D(PHY, "SSB type %d\n", ssb_type);
return ssb_type;
}*/
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp) {
fp->ssb_start_subcarrier = (12 * cfg->ssb_table.ssb_offset_point_a.value + cfg->ssb_table.ssb_subcarrier_offset.value);
......@@ -90,13 +56,17 @@ void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME
}
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF;
uint8_t ssb_index, n_hf;
int ssb_start_symbol, rel_slot;
uint16_t ssb_start_symbol, rel_slot;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = fp->slots_per_frame / 2;
uint16_t slots_per_hf = (fp->slots_per_frame)>>1;
if (slot==0)
gNB->skipped_slots = 0;
n_hf = fp->half_frame_bit;
......@@ -108,41 +78,44 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
n_hf=1;
}
// to set a effective slot number between 0 to 9 in the half frame where the SSB is supposed to be
// to set a effective slot number in the half frame where the SSB is supposed to be
rel_slot = (n_hf)? (slot-slots_per_hf) : slot;
LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot);
if(rel_slot<10 && rel_slot>=0) {
for (int i=0; i<2; i++) { // max two SSB per frame
if ((slot==8) || (slot==9) || (slot==18) || (slot==19) || (slot==28) || (slot==29))
gNB->skipped_slots = gNB->skipped_slots + 1;
else {
if(rel_slot<slots_per_hf && rel_slot>=0) {
for (int i=0; i<2; i++) { // max two SSB per frame
ssb_index = i + 2*rel_slot; // computing the ssb_index
if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
ssb_index = i + ((rel_slot - gNB->skipped_slots)<<1); // computing the ssb_index
if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
gNB->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = ssb_index;
fp->ssb_index = ssb_index;
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot
fp->ssb_index = ssb_index;
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % fp->symbols_per_slot; // start symbol wrt slot
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
&gNB->ssb_pdu,
gNB->nr_pbch_interleaver,
&txdataF[0][txdataF_offset],
AMP,
ssb_start_symbol,
n_hf,cfg->carrier_config.num_tx_ant.value,
frame, cfg, fp);
nr_generate_pbch(&gNB->pbch,
&gNB->ssb_pdu,
gNB->nr_pbch_interleaver,
&txdataF[0][txdataF_offset],
AMP,
ssb_start_symbol,
n_hf,cfg->carrier_config.num_tx_ant.value,
frame, cfg, fp);
}
}
}
}
......@@ -161,7 +134,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
if (cfg->ssb_table.ssb_period.value > 1)
ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ; // 10ms is the frame length
ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ;
if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
(nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT)) return;
......
......@@ -370,7 +370,7 @@ void nr_compute_srs_pos(lte_frame_type_t frameType,uint16_t isrs,uint16_t *psrsP
void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx);
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp, int mib_sfn);
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
/*@}*/
......
......@@ -4027,9 +4027,9 @@ void *UE_thread_slot1_dl_processing(void *arg) {
#endif
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp, int mib_sfn) {
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp) {
int ssb_slot_decoded = (fp->ssb_index)/2;
int ssb_slot_decoded = (fp->ssb_index>>1) + ((fp->ssb_index>>4)<<1); //slot in which the decoded SSB can be found
if (config->ssb_table.ssb_period == 0) {
// check for pbch in corresponding slot each half frame
......@@ -4040,7 +4040,7 @@ int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL
}
else {
// if the current frame is supposed to contain ssb
if (!((frame-(mib_sfn))%(1<<config->ssb_table.ssb_period)))
if (!(frame%(1<<(config->ssb_table.ssb_period-1))))
return(slot == ssb_slot_decoded);
else
return 0;
......@@ -4081,7 +4081,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
if (pdcch_vars->nb_search_space > 0)
get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_tti_rx, fp, proc->decoded_frame_rx);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_tti_rx, fp);
// looking for pbch only in slot where it is supposed to be
if ((ue->decode_MIB == 1) && slot_pbch)
......
......@@ -49,7 +49,6 @@
\param pdu_length length of pdu
\param cell_id cell id */
int8_t nr_ue_decode_mib(
UE_nr_rxtx_proc_t *proc,
module_id_t module_id,
int cc_id,
uint8_t gNB_index,
......
......@@ -223,8 +223,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
return 0;
}
int8_t nr_ue_decode_mib(UE_nr_rxtx_proc_t *proc,
module_id_t module_id,
int8_t nr_ue_decode_mib(module_id_t module_id,
int cc_id,
uint8_t gNB_index,
uint8_t extra_bits, // 8bits 38.212 c7.1.1
......@@ -247,7 +246,6 @@ int8_t nr_ue_decode_mib(UE_nr_rxtx_proc_t *proc,
frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i);
uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4]
uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5]
uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset;
//uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64
......@@ -609,7 +607,9 @@ int8_t nr_ue_decode_mib(UE_nr_rxtx_proc_t *proc,
mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_id;
proc->decoded_frame_rx=frame;
mac->dl_config_request.sfn = frame;
mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS
//}
return 0;
......
......@@ -44,17 +44,16 @@
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
// L2 Abstraction Layer
int handle_bcch_bch(UE_nr_rxtx_proc_t *proc, module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
return nr_ue_decode_mib( proc,
module_id,
cc_id,
gNB_index,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
pduP,
cell_id);
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
return nr_ue_decode_mib(module_id,
cc_id,
gNB_index,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
pduP,
cell_id);
}
......@@ -218,16 +217,14 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->proc,
dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
LOG_D(MAC,"[L2][IF MODULE][DL INDICATION][RX_IND], MIB case Number of PDUs: %d \n", dl_info->rx_ind->number_pdus);
/*ret_mask |= (handle_bcch_bch( dl_info->proc,
dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
/*ret_mask |= (handle_bcch_bch( dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
dl_info->rx_ind->rx_indication_body[i].mib_pdu.pdu,
dl_info->rx_ind->rx_indication_body[i].mib_pdu.additional_bits,
dl_info->rx_ind->rx_indication_body[i].mib_pdu.ssb_index,
......@@ -306,11 +303,10 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
fapi_nr_dl_config_request_t *dl_config=&dcireq->dl_config_req;
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
dl_config->sfn=UE_mac->dl_config_request.sfn;
dl_config->slot=UE_mac->dl_config_request.slot;
dl_config->number_pdus=0;
ue_dci_configuration(UE_mac,dl_config,dcireq->frame,dcireq->slot);
ue_dci_configuration(UE_mac,dl_config,dcireq->frame,dcireq->slot);
return 0;
}
......@@ -215,7 +215,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq);
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
\param ssb_length corresponding to L1 parameter L_ssb
\param cell_id cell id */
int handle_bcch_bch(UE_nr_rxtx_proc_t *proc, module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
// TODO check
/**\brief handle BCCH-DL-SCH message from dl_indication
......
......@@ -148,7 +148,7 @@ gNBs =
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 15;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
......
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