Commit 10a98de7 authored by Francesco Mani's avatar Francesco Mani

fix for ssb vrb map in fr2

parent f87c9794
...@@ -770,7 +770,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { ...@@ -770,7 +770,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
flags |= beam<<8; flags |= beam<<8;
//} //}
LOG_I(HW,"slot %d, beam %d\n",slot,ru->common.beam_id[0][slot*fp->symbols_per_slot]); LOG_D(HW,"slot %d, beam %d\n",slot,ru->common.beam_id[0][slot*fp->symbols_per_slot]);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
......
...@@ -184,27 +184,38 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, ...@@ -184,27 +184,38 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
break; break;
case 3: case 3:
AssertFatal(*cc->ServingCellConfigCommon->ssbSubcarrierSpacing == AssertFatal(*cc->ServingCellConfigCommon->ssbSubcarrierSpacing ==
NR_SubcarrierSpacing_kHz120, NR_SubcarrierSpacing_kHz120,
"240kHZ subcarrier spacing currently not supported for SSBs\n"); "240kHZ subcarrier spacing currently not supported for SSBs\n");
if ((abs_slot % slot_per_period) < 8) { if ((abs_slot % slot_per_period) < 8) {
eff_120_slot = slotP; eff_120_slot = slotP;
buf = longBitmap->buf[0]; if((abs_slot % slot_per_period) < 3)
} else if ((abs_slot % slot_per_period) < 17) { buf = longBitmap->buf[0];
eff_120_slot = slotP - 9; else
buf = longBitmap->buf[1]; buf = longBitmap->buf[1];
} else if ((abs_slot % slot_per_period) < 26) { } else if ((abs_slot % slot_per_period) < 18) {
eff_120_slot = slotP - 18; eff_120_slot = slotP - 10;
buf = longBitmap->buf[2]; if((abs_slot % slot_per_period) < 13)
} else if ((abs_slot % slot_per_period) < 35) { buf = longBitmap->buf[2];
eff_120_slot = slotP - 27; else
buf = longBitmap->buf[3]; buf = longBitmap->buf[3];
} else if ((abs_slot % slot_per_period) < 28) {
eff_120_slot = slotP - 20;
if((abs_slot % slot_per_period) < 23)
buf = longBitmap->buf[4];
else
buf = longBitmap->buf[5];
} else if ((abs_slot % slot_per_period) < 38) {
eff_120_slot = slotP - 30;
if((abs_slot % slot_per_period) < 33)
buf = longBitmap->buf[6];
else
buf = longBitmap->buf[7];
} }
if (((buf >> (6 - (eff_120_slot << 1))) & 3) != 0) if ((eff_120_slot>=0) && (((buf >> (6 - (eff_120_slot << 1))) & 3) != 0))
fill_ssb_vrb_map(cc, ssb_offset0 / (ratio * 12) - 10, CC_id); fill_ssb_vrb_map(cc, ssb_offset0 / (ratio * 12) - 10, CC_id);
break; break;
default: default:
AssertFatal(0, AssertFatal(0,"SSB bitmap size value %d undefined (allowed values 1,2,3)\n",
"SSB bitmap size value %d undefined (allowed values 1,2,3)\n",
cc->ServingCellConfigCommon->ssb_PositionsInBurst->present); cc->ServingCellConfigCommon->ssb_PositionsInBurst->present);
} }
} }
......
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