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wangwenhui
OpenXG-RAN
Commits
17b8ff50
Commit
17b8ff50
authored
Nov 24, 2020
by
Shweta Shrivastava
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Plain Diff
Minor edits for consistency and clarity
parent
06f55552
Changes
1
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1 changed file
with
9 additions
and
9 deletions
+9
-9
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+9
-9
No files found.
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
17b8ff50
...
...
@@ -2918,9 +2918,9 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
pusch_config_pdu
->
rb_start
=
NRRIV2PRBOFFSET
(
riv
,
n_RB_ULBWP
);
// Sanity check in case a false or erroneous DCI is received
if
(
pusch_config_pdu
->
rb_size
+
pusch_config_pdu
->
rb_start
>
n_RB_ULBWP
)
{
if
(
(
pusch_config_pdu
->
rb_size
)
||
(
pusch_config_pdu
->
rb_size
>
n_RB_ULBWP
-
pusch_config_pdu
->
rb_start
)
)
{
// DCI is invalid!
LOG_W
(
MAC
,
"Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_
D
LBWP: %d
\n
"
,
pusch_config_pdu
->
rb_size
,
pusch_config_pdu
->
rb_start
,
n_RB_ULBWP
);
LOG_W
(
MAC
,
"Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_
U
LBWP: %d
\n
"
,
pusch_config_pdu
->
rb_size
,
pusch_config_pdu
->
rb_start
,
n_RB_ULBWP
);
return
-
1
;
}
...
...
@@ -3147,7 +3147,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int
bwp_id
=
1
;
int
mu
=
0
;
long
k2
=
0
;
int
pucch_res_set_
id
=
0
,
valid
=
0
;
int
pucch_res_set_
cnt
=
0
,
valid
=
0
;
uint16_t
frame_tx
=
0
,
slot_tx
=
0
;
NR_UE_MAC_INST_t
*
mac
=
get_mac_inst
(
module_id
);
...
...
@@ -3745,9 +3745,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0
->
pucch_resource_id
=
dci
->
pucch_resource_indicator
;
// Sanity check for pucch_resource_indicator value received to check for false DCI.
valid
=
0
;
pucch_res_set_
id
=
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
resourceSetToAddModList
->
list
.
count
;
for
(
int
id
=
0
;
id
<
pucch_res_set_
id
;
id
++
)
{
if
(
dlsch_config_pdu_1_0
->
pucch_resource_id
<
mac
->
ULbwp
[
bwp_id
-
1
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
resourceSetToAddModList
->
list
.
array
[
id
]
->
resourceList
.
list
.
count
)
{
pucch_res_set_
cnt
=
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
resourceSetToAddModList
->
list
.
count
;
for
(
int
id
=
0
;
id
<
pucch_res_set_
cnt
;
id
++
)
{
if
(
dlsch_config_pdu_1_0
->
pucch_resource_id
<
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
resourceSetToAddModList
->
list
.
array
[
id
]
->
resourceList
.
list
.
count
)
{
valid
=
1
;
break
;
}
...
...
@@ -3892,9 +3892,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1
->
pucch_resource_id
=
dci
->
pucch_resource_indicator
;
// Sanity check for pucch_resource_indicator value received to check for false DCI.
valid
=
0
;
pucch_res_set_
id
=
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
resourceSetToAddModList
->
list
.
count
;
for
(
int
id
=
0
;
id
<
pucch_res_set_
id
;
id
++
)
{
if
(
dlsch_config_pdu_1_1
->
pucch_resource_id
<
mac
->
ULbwp
[
bwp_id
-
1
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
resourceSetToAddModList
->
list
.
array
[
id
]
->
resourceList
.
list
.
count
)
{
pucch_res_set_
cnt
=
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
resourceSetToAddModList
->
list
.
count
;
for
(
int
id
=
0
;
id
<
pucch_res_set_
cnt
;
id
++
)
{
if
(
dlsch_config_pdu_1_1
->
pucch_resource_id
<
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
resourceSetToAddModList
->
list
.
array
[
id
]
->
resourceList
.
list
.
count
)
{
valid
=
1
;
break
;
}
...
...
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