Commit 2529c20b authored by Remi Hardy's avatar Remi Hardy

Integration 2020 wk48

MR932 : Nr sa ngap rrc wk42 
- Initial implementation of NGAP and RRC extensions for SA
 
MR956 : Correct use of ssb_position bitmaps  

MR958 : 5G NR Downlink DMRS Type 2
- Implementation of 5G NR Downlink DMRS type 2 (generation on gNB side, channel estimation with linear interpolation in frequency domain on UE side), needed for MIMO
  
MR961 : 5G NR UE TTI cleanup  
- Remove current_thread_id array, nr_tti_rx, nr_tti_tx, subframe_rx and subframe_tx

MR965 : fix a segdev
parents 40141270 291c94d3
This diff is collapsed.
......@@ -66,6 +66,7 @@ UE_TIMING_TRACE="False"
USRP_REC_PLAY="False"
BUILD_ECLIPSE=0
NR="False"
ITTI_SIM="False"
OPTIONAL_LIBRARIES="telnetsrv enbscope uescope nrscope msc"
trap handle_ctrl_c INT
......@@ -159,6 +160,8 @@ Options
Build for I/Q record-playback modes
-k | --skip-shared-libraries
Skip build for shared libraries to reduce compilation time when building frequently for debugging purposes
--ittiSIM
Makes the itti simulator
-h | --help
Print this help
......@@ -413,6 +416,11 @@ function main() {
CMAKE_CMD="$CMAKE_CMD -GNinja"
MAKE_CMD=ninja
shift;;
--ittiSIM)
ittiSIM=1
ITTI_SIM="True"
echo_info "Will compile itti simulator"
shift;;
-h | --help)
print_help
exit 1;;
......@@ -571,7 +579,7 @@ function main() {
config_libconfig_shlib=params_libconfig
# first generate the CMakefile in the right directory
if [ "$eNB" = "1" -o "$eNBocp" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$nrUE" = "1" -o "$HW" = "EXMIMO" ] ; then
if [ "$eNB" = "1" -o "$eNBocp" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$nrUE" = "1" -o "$HW" = "EXMIMO" -o "$ittiSIM" = "1" ] ; then
# softmodem compilation
......@@ -595,6 +603,7 @@ function main() {
echo "set ( UE_TIMING_TRACE $UE_TIMING_TRACE )" >> $cmake_file
echo "set ( USRP_REC_PLAY $USRP_REC_PLAY )" >> $cmake_file
echo "set ( SKIP_SHARED_LIB_FLAG $SKIP_SHARED_LIB_FLAG )" >> $cmake_file
echo "set ( ITTI_SIM $ITTI_SIM )" >> $cmake_file
echo 'include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)' >> $cmake_file
cd $DIR/$build_dir/build
eval $CMAKE_CMD
......@@ -616,6 +625,10 @@ function main() {
execlist="$execlist nr-uesoftmodem"
fi
if [ "$ittiSIM" = "1" ] ; then
execlist="$execlist nr-ittisim"
fi
for f in $execlist ; do
echo_info "Compiling $f..."
compilations \
......
......@@ -16,4 +16,5 @@ set ( UE_DEBUG_TRACE False )
set ( UE_TIMING_TRACE False )
set ( USRP_REC_PLAY False )
set ( SKIP_SHARED_LIB_FLAG False )
set ( PHYSIM True)
include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)
......@@ -19,6 +19,10 @@ if [ "$done_flag" -ot $ASN1_SOURCE_DIR ] ; then
sed -i 's/18446744073709551615))/18446744073709551615U))/g' "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}E-RABUsageReportItem.c
sed -i 's/18446744073709551615 }/18446744073709551615U }/g' "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}E-RABUsageReportItem.c
fi
if [ "$ASN1C_PREFIX" = "NGAP_" ] ; then
sed -i 's/18446744073709551615))/18446744073709551615U))/g' "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}VolumeTimedReport-Item.c
sed -i 's/18446744073709551615 }/18446744073709551615U }/g' "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}VolumeTimedReport-Item.c
fi
fi
touch $done_flag
......@@ -445,6 +445,7 @@ int logInit (void)
register_log_component("NR_RRC","log",NR_RRC);
register_log_component("NR_MAC","log",NR_MAC);
register_log_component("NR_PHY","log",NR_PHY);
register_log_component("NGAP","",NGAP);
for (int i=0 ; log_level_names[i].name != NULL ; i++)
g_log->level2string[i] = toupper(log_level_names[i].name[0]); // uppercased first letter of level name
......
......@@ -226,6 +226,7 @@ typedef enum {
X2AP,
M2AP,
M3AP,
NGAP,
GNB_APP,
NR_RRC,
NR_MAC,
......
......@@ -400,6 +400,27 @@ ID = LEGACY_S1AP_TRACE
GROUP = ALL:LEGACY_S1AP:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_INFO
DESC = NGAP legacy logs - info level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_INFO:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_ERROR
DESC = NGAP legacy logs - error level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_ERROR:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_WARNING
DESC = NGAP legacy logs - warning level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_WARNING:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_DEBUG
DESC = NGAP legacy logs - debug level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_DEBUG:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_TRACE
DESC = NGAP legacy logs - trace level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_X2AP_INFO
DESC = X2AP legacy logs - info level
GROUP = ALL:LEGACY_X2AP:LEGACY_GROUP_INFO:LEGACY
......
......@@ -49,11 +49,14 @@ typedef enum {
MSC_RLC_ENB,
MSC_PDCP_ENB,
MSC_RRC_ENB,
MSC_RRC_GNB,
MSC_IP_ENB,
MSC_S1AP_ENB,
MSC_NGAP_GNB,
MSC_GTPU_ENB,
MSC_GTPU_SGW,
MSC_S1AP_MME,
MSC_NGAP_AMF,
MSC_MMEAPP_MME,
MSC_NAS_MME,
MSC_NAS_EMM_MME,
......
......@@ -16,3 +16,8 @@
#include "openair2/COMMON/gtpv1_u_messages_def.h"
#include "openair2/COMMON/flexran_messages_def.h"
#include "openair2/COMMON/f1ap_messages_def.h"
#include "openair2/COMMON/ngap_messages_def.h"
#if ITTI_SIM
#include "openair2/COMMON/itti_sim_messages_def.h"
#endif
......@@ -194,7 +194,8 @@ task_list_t tasks[TASK_MAX];
t->next_timer=UINT64_MAX;
// Proceed expired timer
for ( auto it=t->timer_map.begin() ; it != t->timer_map.end() ; ++it ) {
for ( auto it=t->timer_map.begin() , next_it = it; it != t->timer_map.end() ; it = next_it ) {
++next_it;
if ( it->second.timeout < current_time ) {
MessageDef *message = itti_alloc_new_message(TASK_TIMER, TIMER_HAS_EXPIRED);
message->ittiMsg.timer_has_expired.timer_id=it->first;
......
......@@ -230,6 +230,7 @@ typedef struct IttiMsgText_s {
#include <openair2/COMMON/sctp_messages_types.h>
#include <openair2/COMMON/udp_messages_types.h>
#include <openair2/COMMON/gtpv1_u_messages_types.h>
#include <openair2/COMMON/ngap_messages_types.h>
#include <openair3/SCTP/sctp_eNB_task.h>
#include <openair3/NAS/UE/nas_proc_defs.h>
#include <openair3/NAS/UE/ESM/esmData.h>
......@@ -260,6 +261,11 @@ typedef struct IttiMsgText_s {
void *rrc_enb_process_itti_msg(void *);
#include <openair3/SCTP/sctp_eNB_task.h>
#include <openair3/S1AP/s1ap_eNB.h>
#include <openair3/NGAP/ngap_gNB.h>
#ifdef ITTI_SIM
#include <openair2/COMMON/itti_sim_messages_types.h>
#endif
/*
static const char *const messages_definition_xml = {
......@@ -312,6 +318,7 @@ void * rrc_enb_process_msg(void*);
TASK_DEF(TASK_RRC_GNB, TASK_PRIORITY_MED, 200, NULL,NULL)\
TASK_DEF(TASK_RAL_ENB, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_S1AP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_NGAP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_X2AP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_M2AP_ENB, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_M2AP_MCE, TASK_PRIORITY_MED, 200, NULL, NULL) \
......@@ -329,6 +336,7 @@ void * rrc_enb_process_msg(void*);
TASK_DEF(TASK_RLC_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_PDCP_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_NRUE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_NAS_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RAL_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_MSC, TASK_PRIORITY_MED, 200, NULL, NULL)\
......@@ -336,6 +344,8 @@ void * rrc_enb_process_msg(void*);
TASK_DEF(TASK_UDP, TASK_PRIORITY_MED, 1000, NULL, NULL)\
TASK_DEF(TASK_CU_F1, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_DU_F1, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_UE_SIM, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_GNB_SIM, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_MAX, TASK_PRIORITY_MED, 200, NULL, NULL)
#define TASK_DEF(TaskID, pRIO, qUEUEsIZE, FuNc, ThreadFunc) { pRIO, qUEUEsIZE, #TaskID, FuNc, ThreadFunc },
......
......@@ -164,8 +164,6 @@ nr_schedule_ue_spec() is called
Calls nr_fill_nfapi_dl_pdu() to actually populate what should be done by the lower layers to make the Tx subframe
# RRC
RRC is a regular thread with itti loop on queue: TASK_RRC_GNB
it receives it's configuration in message NRRRC_CONFIGURATION_REQ, then real time mesages for all events: S1/NGAP events, X2AP messages and RRC_SUBFRAME_PROCESS
......@@ -176,14 +174,56 @@ how does it communicate to scheduler ?
# RLC
RLC code is new implementation, not using OAI mechanisms: it is implmented directly on pthreads, ignoring OAI common functions.
It runs a thread waiting incoming data, but it is mainly running inside calling thread.
It is a library, running in thread RRC (except on itti message: F1AP_UL_RRC_MESSAGE for F1).
RLC code is new implementation, not using OAI mechanisms: it is implemented directly on pthreads, ignoring OAI common functions.
It is a library, running in thread RRC but also in PHY layer threads and some bits in pdcp running thread or F1 interface threads.
# NGAP
NGAP would be a itti thread as is S1AP (+twin thread SCTP that is almost void processing)?
About all messages are exchanged with RRC thread
RLC data is isolated and encapsulated.
It is stored under a global var: nr_rlc_ue_manager
The init function rlc_module_init() populates this global variable.
A small effort could lead us to return the pointer to the caller of rlc_module_init() (internal type: nr_rlc_ue_manager_internal_t)
but it returns void.
It could return the initialized pointer (as FILE* fopen() for example), then the RLC layer could have multiple instances in one process.
Even, a future evolution could remove this global rlc layer: rlc can be only a library that we create a instance for each UE because it doesn't shareany data between UEs.
For DL (respectively from UL in UE), the scheduler need to know the quantity of data waitin to be sent: it calls mac_rlc_status_ind()
That "peek" the size of the waiting data for a UE.
The scheduler then push orders to lower layers. The transport layer will actually pull data from RLC with: mac_rlc_data_req()
the low layer push data into rlc by: mac_rlc_data_ind()
Still on DL (gNB side), PDCP push incoming data into RLC by calling: rlc_data_req()
For UL, the low layer push data into rlc by: mac_rlc_data_ind()
Then, rlc push it to pdcp by calling pdcp_data_ind() from a complex rlc internal call back (deliver_sdu())
When adding a UE, external code have to call nr_rrc_rlc_config_asn1_req(), to remove it: rrc_rlc_remove_ue()
Inside UE, channels called drd or srb can be created: ??? and deleted: rrc_rlc_config_req()
nr_rlc_tick() must be called periodically to manage the internal timers
successful_delivery() and max_retx_reached(): in ??? trigger, the RLC sends a itti message to RRC: RLC_SDU_INDICATION (neutralized by #if 0 right now)
#PDCP
The PDCP implementation is also protected through a general mutex.
The design is very similar to rlc layer. The pdcp data is isolated and encapsulated.
pdcp_layer_init(): same as rlc init
we have to call a second init function: pdcp_module_init()
At Tx side (DL in gNB), pdcp_data_req() is the entry function that the upper layer calls.
The upper layer can be GTP or a PDCP internal thread enb_tun_read_thread() that read directly from Linux socket in case we skip 3GPP core implementation.
PDCP internals for pdcp_data_req() is thread safe: inside pdcp_data_req_drb(), the pdcp manager protects with the mutex the access to the SDU receiving function of PDCP (recv_sdu() callback, corresponding to nr_pdcp_entity_drb_am_recv_sdu() for DRBs). When it needs, the pdcp layer push this data to rlc by calling : rlc_data_req()
Also, incoming downlink sdu can comme from internal RRC: in this case, pdcp_run() reads a itti queue, for message RRC_DCCH_DATA_REQ, to0 only call 'pdcp_data_req()'
At Rx side, pdcp_data_ind() is the entry point that receives the data from RLC.
- Inside pdcp_data_ind(), the pdcp manager mutex protects the access to the PDU receiving function of PDCP (recv_pdu() callback corresponding to nr_pdcp_entity_drb_am_recv_pdu() for DRBs)
- Then deliver_sdu_drb() function sends the received data to GTP thread through an ITTI message (GTPV1U_ENB_TUNNEL_DATA_REQ).
pdcp_config_set_security(): not yet developped
nr_DRB_preconfiguration(): the mac layer calls this for ???
nr_rrc_pdcp_config_asn1_req() adds a UE in pdcp, pdcp_remove_UE() removes it
# GTP
Gtp + UDP are two twin threads performing the data plane interface to the core network
......@@ -200,6 +240,10 @@ gtp thread calls directly pdcp_data_req(), so it runs inside it's context intern
## inside other threads
gtpv1u_create_s1u_tunnel(), delete tunnel, ... functions are called inside the other threads, without mutex.
# NGAP
NGAP would be a itti thread as is S1AP (+twin thread SCTP that is almost void processing)?
About all messages are exchanged with RRC thread
<div class="panel panel-info">
**Note**
......
......@@ -48,6 +48,7 @@
#include "SCHED_NR/sched_nr.h"
#include "SCHED_NR/fapi_nr_l1.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/MODULATION/nr_modulation.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
......
......@@ -83,6 +83,8 @@ unsigned short config_frames[4] = {2,9,11,13};
#include "executables/thread-common.h"
#include "NB_IoT_interface.h"
#include "x2ap_eNB.h"
#include "ngap_gNB.h"
#include "gnb_paramdef.h"
pthread_cond_t nfapi_sync_cond;
pthread_mutex_t nfapi_sync_mutex;
......@@ -387,30 +389,52 @@ int create_gNB_tasks(uint32_t gnb_nb) {
return -1;
}*/
if(itti_create_task(TASK_SCTP, sctp_eNB_task, NULL) < 0){
LOG_E(SCTP, "Create task for SCTP failed\n");
return -1;
LOG_E(SCTP, "Create task for SCTP failed\n");
return -1;
}
if (is_x2ap_enabled()) {
if(itti_create_task(TASK_X2AP, x2ap_task, NULL) < 0){
LOG_E(X2AP, "Create task for X2AP failed\n");
}
if(itti_create_task(TASK_X2AP, x2ap_task, NULL) < 0){
LOG_E(X2AP, "Create task for X2AP failed\n");
}
}
else {
LOG_I(X2AP, "X2AP is disabled.\n");
LOG_I(X2AP, "X2AP is disabled.\n");
}
}
paramdef_t NETParams[] = GNBNETPARAMS_DESC;
char aprefix[MAX_OPTNAME_SIZE*2 + 8];
sprintf(aprefix,"%s.[%i].%s",GNB_CONFIG_STRING_GNB_LIST,0,GNB_CONFIG_STRING_NETWORK_INTERFACES_CONFIG);
config_get( NETParams,sizeof(NETParams)/sizeof(paramdef_t),aprefix);
for(int i = GNB_INTERFACE_NAME_FOR_NG_AMF_IDX; i <= GNB_IPV4_ADDRESS_FOR_NG_AMF_IDX; i++){
if( NETParams[i].strptr == NULL){
LOG_E(NGAP, "No configuration in the file.\n");
NGAP_CONF_MODE = 0;
}
else {
LOG_D(NGAP, "Configuration in the file: %s.\n",*NETParams[i].strptr);
}
}
if (EPC_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0)) {
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0)) {
if (gnb_nb > 0) {
/*if (itti_create_task (TASK_SCTP, sctp_eNB_task, NULL) < 0) {
/*
if (itti_create_task (TASK_SCTP, sctp_eNB_task, NULL) < 0) {
LOG_E(SCTP, "Create task for SCTP failed\n");
return -1;
}
if (itti_create_task (TASK_S1AP, s1ap_eNB_task, NULL) < 0) {
LOG_E(S1AP, "Create task for S1AP failed\n");
return -1;
}*/
*/
if(NGAP_CONF_MODE){
if (itti_create_task (TASK_NGAP, ngap_gNB_task, NULL) < 0) {
LOG_E(NGAP, "Create task for NGAP failed\n");
return -1;
}
} else {
LOG_E(NGAP, "Ngap task not created\n");
}
if(!emulate_rf){
......@@ -430,9 +454,9 @@ int create_gNB_tasks(uint32_t gnb_nb) {
if (gnb_nb > 0) {
if (itti_create_task (TASK_GNB_APP, gNB_app_task, NULL) < 0) {
LOG_E(GNB_APP, "Create task for gNB APP failed\n");
return -1;
}
LOG_E(GNB_APP, "Create task for gNB APP failed\n");
return -1;
}
LOG_I(NR_RRC,"Creating NR RRC gNB Task\n");
if (itti_create_task (TASK_RRC_GNB, rrc_gnb_task, NULL) < 0) {
......@@ -821,7 +845,8 @@ int main( int argc, char **argv )
}
openair0_cfg[0].threequarter_fs = threequarter_fs;
EPC_MODE_ENABLED = !IS_SOFTMODEM_NOS1; //!get_softmodem_params()->phy_test;
AMF_MODE_ENABLED = !IS_SOFTMODEM_NOS1; //!get_softmodem_params()->phy_test;
NGAP_CONF_MODE = !IS_SOFTMODEM_NOS1; //!get_softmodem_params()->phy_test;
if (get_softmodem_params()->do_ra)
AssertFatal(get_softmodem_params()->phy_test == 0,"RA and phy_test are mutually exclusive\n");
......
......@@ -355,7 +355,7 @@ static void UE_synch(void *arg) {
void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_tti_tx);
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
uint8_t gNB_id = 0;
if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){
......@@ -370,16 +370,16 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
ul_indication.gNB_index = gNB_id;
ul_indication.cc_id = UE->CC_id;
ul_indication.frame_rx = proc->frame_rx;
ul_indication.slot_rx = proc->nr_tti_rx;
ul_indication.slot_rx = proc->nr_slot_rx;
ul_indication.frame_tx = proc->frame_tx;
ul_indication.slot_tx = proc->nr_tti_tx;
ul_indication.slot_tx = proc->nr_slot_tx;
ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&ul_indication);
}
if (UE->mode != loop_through_memory) {
uint8_t thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_rx];
phy_procedures_nrUE_TX(UE,proc,0,thread_id);
phy_procedures_nrUE_TX(UE,proc,0);
}
}
}
......@@ -387,7 +387,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_tti_rx);
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_slot_rx);
uint8_t gNB_id = 0;
if (rx_slot_type == NR_DOWNLINK_SLOT || rx_slot_type == NR_MIXED_SLOT){
......@@ -400,7 +400,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = UE->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_tti_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
UE->if_inst->dl_indication(&dl_indication, NULL);
}
......@@ -411,16 +412,16 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
#else
uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, UE->mode);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_slot_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n");
#endif
if(IS_SOFTMODEM_NOS1){ //&& proc->nr_tti_rx==1
if(IS_SOFTMODEM_NOS1){ //&& proc->nr_slot_rx==1
//Hardcoded rnti value
protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, UE->Mod_id, ENB_FLAG_NO,
0x1234, proc->frame_rx,
proc->nr_tti_rx, 0);
proc->nr_slot_rx, 0);
pdcp_run(&ctxt);
}
}
......@@ -435,7 +436,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->ul_indication.slot = proc->nr_slot_rx;
UE->ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
......@@ -470,7 +472,7 @@ void UE_processing(void *arg) {
if (UE->mac_enabled == 1) {
uint8_t gNB_id = 0;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
int slot_tx = proc->nr_tti_tx;
int slot_tx = proc->nr_slot_tx;
int frame_tx = proc->frame_tx;
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
......@@ -688,14 +690,12 @@ void *UE_thread(void *arg) {
processingData_t *curMsg=(processingData_t *)NotifiedFifoData(msgToPush);
curMsg->UE=UE;
// update thread index for received subframe
curMsg->UE->current_thread_id[slot_nr] = thread_idx;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_tti_rx= slot_nr;
curMsg->proc.subframe_rx=slot_nr/(nb_slot_frame/10);
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.thread_id = thread_idx;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_slot_rx = slot_nr;
curMsg->proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
......
......@@ -290,9 +290,9 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
fp->slots_per_frame = 10* fp->slots_per_subframe;
fp->nb_antenna_ports_gNB = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_rx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_tx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antenna_ports_gNB = cfg->carrier_config.num_tx_ant.value;// It corresponds to pdsch_AntennaPorts
fp->nb_antennas_rx = cfg->carrier_config.num_rx_ant.value; // It denotes the number of rx antennas at gNB
fp->nb_antennas_tx = 1; // It corresponds to the number of UE Tx antennas
fp->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe;
......
......@@ -49,12 +49,14 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
int reset_freq_est);
int nr_slot_fep(PHY_VARS_NR_UE *phy_vars_ue,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix);
UE_nr_rxtx_proc_t *proc,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix);
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
......
......@@ -37,6 +37,7 @@
#endif*/
int nr_slot_fep(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
......@@ -125,7 +126,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
memset(&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit
......@@ -157,14 +158,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
#endif
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
......@@ -185,11 +186,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
......@@ -206,9 +207,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
int symb_offset = (Ns%frame_parms->slots_per_subframe)*frame_parms->symbols_per_slot;
int32_t rot2 = ((uint32_t*)frame_parms->symbol_rotation)[symbol+symb_offset];
((int16_t*)&rot2)[1]=-((int16_t*)&rot2)[1];
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t*)&rot2,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size,
15);
......@@ -222,6 +223,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
......@@ -310,7 +312,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
memset(&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit
......@@ -342,7 +344,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
......@@ -350,7 +352,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
......@@ -371,10 +373,10 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
......@@ -393,9 +395,9 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
symbol+symb_offset,((int16_t*)&rot2)[0],((int16_t*)&rot2)[1]);
#endif
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t*)&rot2,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size,
15);
......
......@@ -37,6 +37,7 @@
uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint16_t ofdm_symbol_size,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type) {
uint8_t delta;
......@@ -44,7 +45,7 @@ uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
if (k>start_sc)
diff = k-start_sc;
else
diff = start_sc-k;
diff = (ofdm_symbol_size-start_sc)+k;
for (int i = 0; i<numDmrsCdmGrpsNoData; i++){
if (dmrs_type==NFAPI_NR_DMRS_TYPE1) {
delta = i;
......@@ -53,7 +54,7 @@ uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
}
else {
delta = i<<1;
if ( (((diff)%6) == delta) || (((k-start_sc)%6) == (delta+1)) )
if (((diff%6) == delta) || ((diff%6) == (delta+1)))
return (0);
}
}
......
......@@ -58,6 +58,7 @@ uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_
uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint16_t ofdm_symbol_size,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type);
......
......@@ -121,18 +121,18 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
array_of_w *wf;
array_of_w *wt;
config_type = 0; //to be updated by higher layer
config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
wf = (config_type==0) ? wf1 : wf2;
wt = (config_type==0) ? wt1 : wt2;
wf = (config_type==pdsch_dmrs_type1) ? wf1 : wf2;
wt = (config_type==pdsch_dmrs_type1) ? wt1 : wt2;
if (config_type > 1)
LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
if ((p>=1000) && (p<((config_type==0) ? 1008 : 1012))) {
if ((p>=1000) && (p<((config_type==pdsch_dmrs_type1) ? 1008 : 1012))) {
if (ue->frame_parms.Ncp == NORMAL) {
for (int i=0; i<nb_pdsch_rb*((config_type==0) ? 6:4); i++) {
for (int i=0; i<nb_pdsch_rb*((config_type==pdsch_dmrs_type1) ? 6:4); i++) {
w = (wf[p-1000][i&1])*(wt[p-1000][lp]);
mod_table = (w==1) ? nr_rx_mod_table : nr_rx_nmod_table;
......
......@@ -92,13 +92,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR]);
int _do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss, uint8_t doSss,
uint8_t subframe);
int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric, uint8_t *phase_max);
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max);
#undef INIT_VARIABLES_SSS_NR_H
#undef EXTERN
......
......@@ -140,7 +140,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **mod_symbs = (int16_t**)dlsch->mod_symbs;
int16_t **tx_layers = (int16_t**)dlsch->txdataF;
int8_t Wf[2], Wt[2], l0, l_prime[2], delta;
int8_t Wf[2], Wt[2], l0, l_prime, l_overline, delta;
uint8_t dmrs_Type = rel15->dmrsConfigType;
int nb_re_dmrs;
uint16_t n_dmrs;
......@@ -153,10 +153,10 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
n_dmrs = ((rel15->rbSize+rel15->rbStart)*4)<<1;
}
uint16_t nb_re;
nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs-xOverhead)*rel15->rbSize*rel15->NrOfCodewords;
nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs-xOverhead)*rel15->rbSize*rel15->nrOfLayers;
uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_re*Qm;
int16_t mod_dmrs[n_dmrs<<1] __attribute__ ((aligned(16)));
int16_t mod_dmrs[14][n_dmrs] __attribute__ ((aligned(16)));
/// CRC, coding, interleaving and rate matching
......@@ -248,18 +248,19 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
/// Antenna port mapping
//to be moved to init phase potentially, for now tx_layers 1-8 are mapped on antenna ports 1000-1007
/// DMRS QPSK modulation
l0 = get_l0(rel15->dlDmrsSymbPos);
nr_modulation(pdsch_dmrs[l0][0], n_dmrs, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
for (int l=rel15->StartSymbolIndex; l<rel15->StartSymbolIndex+rel15->NrOfSymbols; l++) {
if (rel15->dlDmrsSymbPos & (1 << l))
nr_modulation(pdsch_dmrs[l][0], n_dmrs, DMRS_MOD_ORDER, mod_dmrs[l]); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
}
#ifdef DEBUG_DLSCH
l0 = get_l0(rel15->dlDmrsSymbPos);
printf("DMRS modulation (single symbol %d, %d symbols, type %d):\n", l0, n_dmrs>>1, dmrs_Type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[((i<<3)+j)<<1], mod_dmrs[(((i<<3)+j)<<1)+1]);
printf("%d %d\t", mod_dmrs[((i<<3)+j)<<1], mod_dmrs[(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
......@@ -283,55 +284,71 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
get_Wt(Wt, ap, dmrs_Type);
get_Wf(Wf, ap, dmrs_Type);
delta = get_delta(ap, dmrs_Type);
l_prime[0] = 0; // single symbol ap 0
uint8_t dmrs_symbol = l0+l_prime[0];
l_prime = 0; // single symbol ap 0
l0 = get_l0(rel15->dlDmrsSymbPos);
l_overline = l0;
#ifdef DEBUG_DLSCH_MAPPING
uint8_t dmrs_symbol = l0+l_prime;
printf("DMRS Type %d params for ap %d: Wt %d %d \t Wf %d %d \t delta %d \t l_prime %d \t l0 %d\tDMRS symbol %d\n",
1+dmrs_Type,ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
1+dmrs_Type,ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime, l0, dmrs_symbol);
#endif
uint8_t k_prime=0;
uint16_t m=0, n=0, dmrs_idx=0, k=0;
int txdataF_offset = (slot%2)*frame_parms->samples_per_slot_wCP;
if (dmrs_Type == NFAPI_NR_DMRS_TYPE1) // another if condition to be included to check pdsch config type (reference of k)
dmrs_idx = rel15->rbStart*6;
else
dmrs_idx = rel15->rbStart*4;
for (int l=rel15->StartSymbolIndex; l<rel15->StartSymbolIndex+rel15->NrOfSymbols; l++) {
k = start_sc;
for (int i=0; i<rel15->rbSize*NR_NB_SC_PER_RB; i++) {
if ((l == dmrs_symbol) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
k = start_sc;
n = 0;
k_prime = 0;
if (dmrs_Type == NFAPI_NR_DMRS_TYPE1) // another if condition to be included to check pdsch config type (reference of k)
dmrs_idx = rel15->rbStart*6;
else
dmrs_idx = rel15->rbStart*4;
for (int i=0; i<rel15->rbSize*NR_NB_SC_PER_RB; i++) {
if ((rel15->dlDmrsSymbPos & (1 << l)) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) {
if (l==(l_overline+1)) //take into account the double DMRS symbols
l_prime = 1;
else if (l>(l_overline+1)) {//new DMRS pair
l_overline = l;
l_prime = 0;
}
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
#endif
dmrs_idx++;
k_prime++;
k_prime&=1;
n+=(k_prime)?0:1;
}
else {
if( (l != dmrs_symbol) || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
dmrs_idx++;
k_prime++;
k_prime&=1;
n+=(k_prime)?0:1;
} else {
if( (!(rel15->dlDmrsSymbPos & (1 << l))) || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
#endif
m++;
}
}
if (++k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
} //RE loop
m++;
}
}
if (++k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
} //RE loop
} // symbol loop
}// layer loop
dlsch->slot_tx[slot]=0;
}// dlsch loop
return 0;
......
......@@ -67,12 +67,12 @@ void get_antenna_ports(uint8_t *ap, uint8_t n_symbs, uint8_t config) {
void get_Wt(int8_t *Wt, uint8_t ap, uint8_t config) {
for (int i=0; i<2; i++)
*(Wt+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][3+i]):(pdsch_dmrs_2[ap][3+i]);
*(Wt+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][5+i]):(pdsch_dmrs_2[ap][5+i]);
}
void get_Wf(int8_t *Wf, uint8_t ap, uint8_t config) {
for (int i=0; i<2; i++)
*(Wf+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][5+i]):(pdsch_dmrs_2[ap][5+i]);
*(Wf+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][3+i]):(pdsch_dmrs_2[ap][3+i]);
}
uint8_t get_delta(uint8_t ap, uint8_t config) {
......
......@@ -44,7 +44,7 @@
void nr_group_sequence_hopping(pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id,
uint8_t n_hop,
int nr_tti_tx,
int nr_slot_tx,
uint8_t *u,
uint8_t *v);
......@@ -53,7 +53,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs,
uint8_t lnormal,
uint8_t lprime,
int nr_tti_tx);
int nr_slot_tx);
/** \brief Computes available bits G. */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint16_t length_dmrs, uint8_t Qm, uint8_t Nl);
......
......@@ -33,11 +33,11 @@
#include "nr_dci.h"
void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id,
uint8_t n_hop,
int nr_tti_tx,
uint8_t *u,
uint8_t *v) {
uint32_t n_id,
uint8_t n_hop,
int nr_slot_tx,
uint8_t *u,
uint8_t *v) {
/*
* Implements TS 38.211 subclause 6.3.2.2.1 Group and sequence hopping
* The following variables are set by higher layers:
......@@ -65,7 +65,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
*v=0;
uint32_t c_init = 0;
uint32_t x1,s; // TS 38.211 Subclause 5.2.1
int l = 32, minShift = ((2*nr_tti_tx+n_hop)<<3);
int l = 32, minShift = ((2*nr_slot_tx+n_hop)<<3);
int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_group_sequence_hopping] calculating u,v -> ");
......@@ -92,7 +92,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
f_gh = f_gh%30;
f_ss = n_id%30;
/* for (int m=0; m<8; m++){
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_tti_tx+n_hop)+m))&1))); // Not sure we have to use nr_tti_tx FIXME!!!
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_slot_tx+n_hop)+m))&1))); // Not sure we have to use nr_slot_tx FIXME!!!
}
f_gh = f_gh%30;
f_ss = n_id%30;*/
......@@ -102,7 +102,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
c_init = (1<<5)*floor(n_id/30)+(n_id%30); // we initialize c_init to calculate u,v
s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
f_ss = n_id%30;
l = 32, minShift = (2*nr_tti_tx+n_hop);
l = 32, minShift = (2*nr_slot_tx+n_hop);
while(minShift >= l) {
s = lte_gold_generic(&x1, &c_init, 0);
......@@ -111,7 +111,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
*v = (uint8_t)((s>>tmpShift)&1);
// *v = (uint8_t)((s>>(2*nr_tti_tx+n_hop))&1); // Not sure we have to use nr_tti_tx FIXME!!!
// *v = (uint8_t)((s>>(2*nr_slot_tx+n_hop))&1); // Not sure we have to use nr_slot_tx FIXME!!!
}
*u = (f_gh+f_ss)%30;
......@@ -125,7 +125,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs,
uint8_t lnormal,
uint8_t lprime,
int nr_tti_tx) {
int nr_slot_tx) {
/*
* Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping
* - n_id: higher-layer parameter hoppingId
......@@ -140,7 +140,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint8_t n_cs=0;
int l = 32, minShift = (14*8*nr_tti_tx )+ 8*(lnormal+lprime);
int l = 32, minShift = (14*8*nr_slot_tx )+ 8*(lnormal+lprime);
int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init);
......@@ -155,8 +155,8 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
minShift ++;
n_cs = n_cs+((1<<m)*((uint8_t)((s>>tmpShift)&1)));
// calculating n_cs (Not sure we have to use nr_tti_tx FIXME!!!)
// n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_tti_tx) + 8*(lnormal+lprime) + m))&1)));
// calculating n_cs (Not sure we have to use nr_slot_tx FIXME!!!)
// n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_slot_tx) + 8*(lnormal+lprime) + m))&1)));
}
alpha = (alpha * (double)((m0+mcs+n_cs)%12));
......
......@@ -185,3 +185,57 @@ short filt8_rr1[8] = {
short filt8_rr2[8] = {
-4096,-8192,-12288,-16384,0,0,0,0};
short filt8_l2[8] = {
0,0,13107,9830,6554,3277,0,0};
short filt8_r2[8] = {
0,0,3277,6554,9830,13107,0,0};
short filt8_m2[8] = {
0,0,0,0,13107,9830,6554,3277};
short filt8_mm2[8]= {
0,0,0,0,3277,6554,9830,13107};
short filt8_rl2[8] = {
19661,22938,26214,29491,0,0,0,0};
short filt8_rm2[8] = {
-3277,-6554,-9830,-13107,0,0,0,0};//-3277,-6554,-9830,-13107
short filt8_l3[8] = {
22938,19661,0,0,13107,9830,6554,3277};
short filt8_r3[8] = {
-7537,-4260,0,0,3277,6554,9830,13107};//-6554,-3277
short filt8_rl3[8] = {
0,0,19661,22938,0,0,0,0};
short filt8_rr3[8] = {
0,0,-4260,-7537,0,0,0,0};//-3277,-6554
short filt8_dcrl1[8] = {
14895,13405,11916,10426,8937,7447,5958,4468};
short filt8_dcrh1[8] = {
2979,1489,0,0,0,0,0,0};
short filt8_dcll1[8] = {
13405,14895,0,0,0,0,0,0};
short filt8_dclh1[8] = {
1489,2979,4468,5958,7447,8937,10426,11916};
short filt8_dcrl2[8] = {
0,0,0,0,14895,13405,11916,10426};
short filt8_dcrh2[8] = {
8937,7447,5958,4468,2979,1489,0,0,};
short filt8_dcll2[8] = {
7447,8937,10426,11916,13405,14895,0,0};
short filt8_dclh2[8] = {
0,0,0,0,1489,2979,4468,5958};
......@@ -133,4 +133,40 @@ extern short filt8_rr1[8];
extern short filt8_rr2[8];
extern short filt8_rm2[8];
extern short filt8_rl2[8];
extern short filt8_l2[8];
extern short filt8_r2[8];
extern short filt8_m2[8];
extern short filt8_mm2[8];
extern short filt8_l3[8];
extern short filt8_r3[8];
extern short filt8_rr3[8];
extern short filt8_rl3[8];
extern short filt8_dcrl1[8];
extern short filt8_dcrh1[8];
extern short filt8_dcll1[8];
extern short filt8_dclh1[8];
extern short filt8_dcrl2[8];
extern short filt8_dcrh2[8];
extern short filt8_dcll2[8];
extern short filt8_dclh2[8];
#endif
\ No newline at end of file
......@@ -103,7 +103,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
//dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id);
//dl_phy_sync_success(ue->Mod_id,frame,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
ue->prach_resources[gNB_id]->sync_frame = frame;
ue->prach_resources[gNB_id]->init_msg1 = 0;
......@@ -122,9 +122,8 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_PHY
LOG_D(PHY,"AbsSubframe %d: ThreadId %d diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n",
LOG_D(PHY,"AbsSubframe %d: diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n",
subframe,
ue->current_thread_id[subframe],
diff,
ue->rx_offset,
clear,
......
......@@ -43,6 +43,7 @@
\param symbol symbol within frame
*/
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
......@@ -50,6 +51,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_coreset);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
......@@ -57,6 +59,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
NR_UE_SSB *current_ssb);
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
......@@ -65,6 +68,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t n_hf);
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned short p,
......@@ -81,6 +85,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
short coef);
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
......@@ -88,8 +93,9 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
uint8_t subframe);
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t slot,
uint8_t abstraction_flag);
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag);
void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
uint32_t rx_power_fil_dB,
......
......@@ -107,11 +107,12 @@ float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index)
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
unsigned char rank_adaptation,
uint8_t subframe)
UE_nr_rxtx_proc_t *proc,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
unsigned char rank_adaptation,
uint8_t subframe)
{
int aarx,aatx,eNB_id=0; //,gain_offset=0;
//int rx_power[NUMBER_OF_CONNECTED_eNB_MAX];
......@@ -131,7 +132,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
/*int16_t *dl_ch;
dl_ch = (int16_t *)&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset];*/
dl_ch = (int16_t *)&ue->pdsch_vars[proc->thread_id][0]->dl_ch_estimates[eNB_id][ch_offset];*/
ch_offset = ue->frame_parms.ofdm_symbol_size*2;
......@@ -142,7 +143,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
ue->measurements.rx_spatial_power[eNB_id][aatx][aarx] =
(signal_energy_nodc(&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset],
(signal_energy_nodc(&ue->pdsch_vars[proc->thread_id][0]->dl_ch_estimates[eNB_id][ch_offset],
(50*12)));
//- ue->measurements.n0_power[aarx];
......@@ -224,6 +225,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
}
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag)
{
......@@ -234,7 +236,7 @@ void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset=0,l,nushift;
uint16_t off,nb_rb;
// NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
......
This diff is collapsed.
......@@ -131,7 +131,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
#endif
// computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_dmrs_correlation(ue,0,0,i,i-pbch_initial_symbol,current_ssb);
nr_pbch_dmrs_correlation(ue,proc,0,0,i,i-pbch_initial_symbol,current_ssb);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
......@@ -155,7 +155,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
#endif
// computing channel estimation for selected best ssb
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_channel_estimation(ue,0,0,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf);
nr_pbch_channel_estimation(ue,proc,0,0,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
......@@ -286,16 +286,17 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
for(int i=0; i<4;i++)
nr_slot_fep_init_sync(ue,
i,
0,
is*fp->samples_per_frame+ue->ssb_offset,
0);
proc,
i,
0,
is*fp->samples_per_frame+ue->ssb_offset,
0);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"Calling sss detection (normal CP)\n");
#endif
rx_sss_nr(ue,&metric_tdd_ncp,&phase_tdd_ncp);
rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp);
nr_gold_pbch(ue);
ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss
......@@ -318,8 +319,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
int nb_prefix_samples0 = fp->nb_prefix_samples0;
fp->nb_prefix_samples0 = fp->nb_prefix_samples;
nr_slot_fep(ue,0, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue, proc, 0, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue, proc, 1, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
fp->nb_prefix_samples0 = nb_prefix_samples0;
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
......
......@@ -418,12 +418,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
uint8_t gNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag) {
int Ns = proc->nr_tti_rx;
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
int max_h=0;
int symbol;
......@@ -457,15 +456,15 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#ifdef DEBUG_PBCH
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF);
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF);
write_output("rxdataF0_pbch.m","rxF0pbch",
&nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
&nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
#endif
// symbol refers to symbol within SSB. symbol_offset is the offset of the SSB wrt start of slot
for (symbol=1; symbol<4; symbol++) {
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF,
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
nr_ue_pbch_vars->dl_ch_estimates,
nr_ue_pbch_vars->rxdataF_ext,
nr_ue_pbch_vars->dl_ch_estimates_ext,
......@@ -609,11 +608,14 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
dl_indication.proc=proc;
dl_indication.module_id=0;
dl_indication.cc_id=proc->CC_id;
dl_indication.module_id = ue->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = proc->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change
......
......@@ -360,7 +360,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
ptrs_idx++;
} else if (!is_dmrs_sym || allowed_xlsch_re_in_dmrs_symbol(k, start_sc, cdm_grps_no_data, dmrs_type)) {
} else if (!is_dmrs_sym || allowed_xlsch_re_in_dmrs_symbol(k, start_sc, frame_parms->ofdm_symbol_size, cdm_grps_no_data, dmrs_type)) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) ulsch_ue->y)[m<<1];
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) ulsch_ue->y)[(m<<1) + 1];
......
This diff is collapsed.
......@@ -52,7 +52,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t mcs,
uint8_t nrofSymbols,
......@@ -64,7 +64,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
......@@ -81,7 +81,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
......@@ -95,7 +95,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
......
......@@ -84,7 +84,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
uint32_t f_gh = 0;
SRS_Resource_t *p_SRS_Resource;
int frame_number = proc->frame_tx;
int slot_number = proc->nr_tti_tx;
int slot_number = proc->nr_slot_tx;
uint16_t n_SRS, n_SRS_cs_i;
double alpha_i;
uint8_t K_TC_p;
......@@ -445,7 +445,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
/* SRS resource configurated ? */
if (p_srs_resource != NULL) {
if (p_srs_resource_set->resourceType == periodic) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_tti_tx) == 0) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_slot_tx) == 0) {
generate_srs = 1;
}
}
......@@ -459,7 +459,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
if (generate_srs == 1) {
int16_t txptr = AMP;
uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12;
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_tti_tx*nsymb)+(nsymb-1));
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_slot_tx*nsymb)+(nsymb-1));
if (generate_srs_nr(p_srs_resource_set, frame_parms, &ue->common_vars.txdataF[eNB_id][symbol_offset], txptr, proc) == 0) {
return 0;
}
......
......@@ -314,6 +314,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
*********************************************************************/
int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss, uint8_t doSss,
......@@ -331,7 +332,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
pss_symbol = 0;
sss_symbol = SSS_SYMBOL_NB-PSS_SYMBOL_NB;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
unsigned int ofdm_symbol_size = frame_parms->ofdm_symbol_size;
......@@ -386,7 +387,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
/*******************************************************************
*
* NAME : rx_sss_nr
* NAME : pss_sss_extract_nr
*
* PARAMETERS : none
*
......@@ -397,11 +398,12 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
*********************************************************************/
int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t subframe)
{
return do_pss_sss_extract_nr(phy_vars_ue, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe);
return do_pss_sss_extract_nr(phy_vars_ue, proc, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe);
}
/*******************************************************************
......@@ -417,7 +419,7 @@ int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
*
*********************************************************************/
int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max)
{
uint8_t i;
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR];
......@@ -433,6 +435,7 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
// pss sss extraction
pss_sss_extract_nr(ue,
proc,
pss_ext,
sss_ext,
0); /* subframe */
......@@ -440,8 +443,8 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
#ifdef DEBUG_PLOT_SSS
write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][0],ue->frame_parms.samples_per_subframe,1,1);
write_output("rxdataF0_pss.m","rxF0_pss",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[0]].rxdataF[0][0],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_sss.m","rxF0_sss",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[0]].rxdataF[0][(SSS_SYMBOL_NB-PSS_SYMBOL_NB)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_pss.m","rxF0_pss",&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][0],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_sss.m","rxF0_sss",&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][(SSS_SYMBOL_NB-PSS_SYMBOL_NB)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
write_output("pss_ext.m","pss_ext",pss_ext,LENGTH_PSS_NR,1,1);
#endif
......
......@@ -848,9 +848,6 @@ typedef struct {
/// UE FAPI indication for DCI reception
//fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[NR_MAX_SLOTS_PER_FRAME];
t_nrPolar_params *polarList;
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
NR_UE_PBCH *pbch_vars[NUMBER_OF_CONNECTED_eNB_MAX];
......
......@@ -496,8 +496,8 @@ typedef struct{ // CSI-MeasConfig IE is used to configure CSI-RS (reference sign
uint8_t reportTriggerSize;
} csi_MeasConfig_t;
typedef enum {
pdsch_dmrs_type1 = 1,
pdsch_dmrs_type2 = 2
pdsch_dmrs_type1 = 0,
pdsch_dmrs_type2 = 1
} pdsch_dmrs_type_t;
typedef enum {
pusch_dmrs_type1 = 0,
......
......@@ -4,26 +4,18 @@
#include <targets/ARCH/COMMON/common_lib.h>
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// index of the current UE RX/TX proc
int proc_id;
/// index of the current UE RX/TX thread
int thread_id;
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. slots_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. slots_per_subframe - 1] to act upon for reception
int nr_tti_rx;
/// NR slot index within frame_tx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_tx;
/// NR slot index within frame_rx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_rx;
//#endif
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
......
......@@ -308,7 +308,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) {
*
*********************************************************************/
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) {
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot) {
/* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common.value,check_slot=0;
......@@ -318,7 +318,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
}
......@@ -330,7 +330,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++;
}
}
......@@ -342,7 +342,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
}
......@@ -354,7 +354,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++;
}
}
......
......@@ -75,10 +75,10 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type*/
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti);
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
......
......@@ -257,7 +257,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
// if all segments are done
if (rdata->nbSegments == ulsch_harq->processedSegments) {
if (decodeSuccess) {
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d TBS %d\n",
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for slot %d TBS %d\n",
gNB->Mod_id,ulsch_harq->slot,ulsch_harq->TBS);
ulsch_harq->status = SCH_IDLE;
ulsch_harq->round = 0;
......
......@@ -103,14 +103,11 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type);
/*! \brief Scheduling for UE TX procedures in normal subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param ue Pointer to UE variables on which to act
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calib/normal mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, uint8_t thread_id);
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param ue Pointer to UE variables on which to act
......@@ -306,7 +303,7 @@ int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
@param mu numerology index (0,1,2..)
*/
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint16_t timing_advance);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue, int frame_rx, int nr_slot_rx, uint16_t ta_command);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
......
......@@ -52,7 +52,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int slot = scheduled_response->slot;
// Note: we have to handle the thread IDs for this. To be revisited completely.
thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
thread_id = scheduled_response->thread_id;
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
......
......@@ -73,12 +73,12 @@
@param nr_dci_info_extracted extracted information from dci
@param dlsch downlink context
@param ulsch uplink context
@param nr_tti_rx rx slot
@param nr_slot_rx rx slot
@param tx_offset slot offset for tx
@returns none */
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_tti_rx, uint8_t tx_offset);
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_slot_rx, uint8_t tx_offset);
/** \brief This function configures uplink HARQ context
@param PHY_VARS_NR_UE ue context
......
......@@ -61,18 +61,18 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink or uplink */
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_slot);
/** \brief This function checks nr UE slot direction : downlink or uplink
* @param cfg : FAPI Config Request
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type */
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti);
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
......
......@@ -39,7 +39,7 @@
*
*********************************************************************/
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot) {
/* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common, check_slot = 0;
......@@ -49,7 +49,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
......@@ -61,7 +61,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
......@@ -73,7 +73,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
......@@ -85,7 +85,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
......
This diff is collapsed.
......@@ -97,7 +97,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
G_b_f_c = 0;
}
else {
G_b_f_c = ue->dlsch[ue->current_thread_id[proc->subframe_rx]][gNB_id][0]->g_pucch;
G_b_f_c = ue->dlsch[proc->thread_id][gNB_id][0]->g_pucch;
LOG_W(PHY,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
......@@ -169,7 +169,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
//int K_PUCCH = 0;
if (O_ACK != 0) {
/* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */
//int slots_gap = (proc->nr_tti_tx > proc->nr_tti_rx ? (proc->nr_tti_tx - proc->nr_tti_rx - 1) : ((proc->nr_tti_tx + ue->frame_parms.slots_per_subframe) - proc->nr_tti_rx - 1));
//int slots_gap = (proc->nr_slot_tx > proc->nr_slot_rx ? (proc->nr_slot_tx - proc->nr_slot_rx - 1) : ((proc->nr_slot_tx + ue->frame_parms.slots_per_subframe) - proc->nr_slot_rx - 1));
//K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1;
}
else {
......
This diff is collapsed.
......@@ -52,6 +52,7 @@
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
UE_nr_rxtx_proc_t proc;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
......@@ -559,7 +560,7 @@ int main(int argc, char **argv)
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_IN);
ret = nr_dlsch_decoding(UE, channel_output_fixed, &UE->frame_parms,
ret = nr_dlsch_decoding(UE, &proc, 0, channel_output_fixed, &UE->frame_parms,
dlsch0_ue, dlsch0_ue->harq_processes[0], frame, nb_symb_sch,
slot,harq_pid, is_crnti, llr8_flag);
......
......@@ -686,7 +686,6 @@ int main(int argc, char **argv)
else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
UE->perfect_ce = 0;
for (i=0;i<10;i++) UE->current_thread_id[i] = 0;
if (init_nr_ue_signal(UE, 1, 0) != 0)
{
......@@ -748,7 +747,7 @@ int main(int argc, char **argv)
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.thread_id = UE_proc.thread_id;
nr_ue_phy_config_request(&UE_mac->phy_config);
NR_UE_info_t *UE_info = &RC.nrmac[0]->UE_info;
......@@ -787,14 +786,14 @@ int main(int argc, char **argv)
//multipath_channel(gNB2UE,s_re,s_im,r_re,r_im,frame_length_complex_samples,0);
UE->rx_offset=0;
UE_proc.frame_rx = frame;
UE_proc.nr_tti_rx= slot;
UE_proc.subframe_rx = slot;
UE_proc.thread_id = 0;
UE_proc.frame_rx = frame;
UE_proc.nr_slot_rx = slot;
dcireq.frame = frame;
dcireq.slot = slot;
NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE->current_thread_id[UE_proc.nr_tti_rx]][0][0];
NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE_proc.thread_id][0][0];
int harq_pid = slot;
NR_DL_UE_HARQ_t *UE_harq_process = dlsch0->harq_processes[harq_pid];
......@@ -926,21 +925,21 @@ int main(int argc, char **argv)
//----------------------------------------------------------
//---------------------- count errors ----------------------
//----------------------------------------------------------
if (UE->dlsch[UE->current_thread_id[slot]][0][0]->last_iteration_cnt >=
UE->dlsch[UE->current_thread_id[slot]][0][0]->max_ldpc_iterations+1)
if (UE->dlsch[UE_proc.thread_id][0][0]->last_iteration_cnt >=
UE->dlsch[UE_proc.thread_id][0][0]->max_ldpc_iterations+1)
n_errors++;
NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]];
NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id];
int16_t *UE_llr = pdsch_vars[0]->llr[0];
TBS = UE_harq_process->TBS;//rel15->TBSize[0];
uint16_t length_dmrs = 1;
uint16_t nb_rb = rel15->rbSize;
uint8_t nb_re_dmrs = rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4;
uint8_t mod_order = rel15->qamModOrder[0];
uint8_t nb_symb_sch = rel15->NrOfSymbols;
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15->nrOfLayers);
for (i = 0; i < available_bits; i++) {
......@@ -1030,9 +1029,9 @@ int main(int argc, char **argv)
printStatIndent(&UE->dlsch_unscrambling_stats,"DLSCH unscrambling time");
printStatIndent(&UE->dlsch_rate_unmatching_stats,"DLSCH Rate Unmatching");
printf("|__ DLSCH Turbo Decoding(%d bits), avg iterations: %.1f %.2f us (%d cycles, %d trials)\n",
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Cminus ?
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Kminus :
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Kplus,
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Cminus ?
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kminus :
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kplus,
UE->dlsch_tc_intl1_stats.trials/(double)UE->dlsch_tc_init_stats.trials,
(double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials*timeBase,
(int)((double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials),
......@@ -1054,7 +1053,7 @@ int main(int argc, char **argv)
LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1], frame_length_complex_samples, 1, 1);
LOG_M("chestF0.m","chF0",UE->pdsch_vars[0][0]->dl_ch_estimates_ext,N_RB_DL*12*14,1,1);
write_output("rxF_comp.m","rxFc",&UE->pdsch_vars[0][0]->rxdataF_comp0[0][0],N_RB_DL*12*14,1,1);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]][0]->llr[0],available_bits,1,0);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE_proc.thread_id][0]->llr[0],available_bits,1,0);
break;
}
......
......@@ -235,8 +235,8 @@ void fill_scc(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL
void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap);
void prepare_scc(NR_ServingCellConfigCommon_t *scc);
s1ap_eNB_config_t s1ap_config;
uint32_t s1ap_generate_eNB_id(void) {return 0;}
ngap_gNB_config_t ngap_config;
uint32_t ngap_generate_gNB_id(void) {return 0;}
void configure_nfapi_pnf(char *vnf_ip_addr, int vnf_p5_port, char *pnf_ip_addr, int pnf_p7_port, int vnf_p7_port) { return;}
void configure_nfapi_vnf(char *vnf_addr, int vnf_p5_port) { return;}
......
......@@ -680,6 +680,7 @@ int main(int argc, char **argv)
if (ret<0) n_errors++;
}
else {
UE_nr_rxtx_proc_t proc={0};
UE->rx_offset=0;
uint8_t ssb_index = 0;
while (!((SSB_positions >> ssb_index) & 0x01)) ssb_index++; // to select the first transmitted ssb
......@@ -688,16 +689,16 @@ int main(int argc, char **argv)
int ssb_slot = (ssb_index>>1)+(n_hf*frame_parms->slots_per_frame);
for (int i=UE->symbol_offset+1; i<UE->symbol_offset+4; i++) {
nr_slot_fep(UE,
i%frame_parms->symbols_per_slot,
ssb_slot,
0,
0);
nr_slot_fep(UE,
&proc,
i%frame_parms->symbols_per_slot,
ssb_slot,
0,
0);
nr_pbch_channel_estimation(UE,0,ssb_slot,i%frame_parms->symbols_per_slot,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
nr_pbch_channel_estimation(UE,&proc,0,ssb_slot,i%frame_parms->symbols_per_slot,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
}
UE_nr_rxtx_proc_t proc={0};
ret = nr_rx_pbch(UE,
&proc,
......
......@@ -627,8 +627,8 @@ int main(int argc, char **argv){
subframe); */ //commented for testing purpose
UE_nr_rxtx_proc_t proc={0};
proc.frame_tx = frame;
proc.nr_tti_tx = slot;
proc.frame_tx = frame;
proc.nr_slot_tx = slot;
nr_ue_prach_procedures(UE,&proc,0,0);
/* tx_lev_dB not used later, no need to set */
......
......@@ -90,7 +90,7 @@ int main(int argc, char **argv)
FILE *input_fd=NULL;
//uint8_t nacktoack_flag=0;
int16_t amp=0x7FFF;
int nr_tti_tx=0;
int nr_slot_tx=0;
uint64_t actual_payload=0,payload_received;
int nr_bit=1; // maximum value possible is 2
uint8_t m0=0;// higher layer paramater initial cyclic shift
......@@ -501,13 +501,13 @@ int main(int argc, char **argv)
for (trial=0; trial<n_trials; trial++) {
bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int));
if(format==0){
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_tti_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_slot_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
}
else if (format == 1){
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
}
else {
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit);
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit);
}
int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size],
......@@ -536,21 +536,21 @@ int main(int argc, char **argv)
if (n_trials==1) printf("rxlev %d (%d dB), sigma2 %f dB, SNR %f, TX %f\n",rxlev,dB_fixed(rxlev),sigma2_dB,SNR,10*log10((double)txlev*UE->frame_parms.ofdm_symbol_size/12));
if(format==0){
nfapi_nr_uci_pucch_pdu_format_0_1_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_harq = nr_bit;
pucch_pdu.bit_len_csi_part1 = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = sr_flag;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_start = startingPRB;
nr_decode_pucch0(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu);
nfapi_nr_uci_pucch_pdu_format_0_1_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_harq = nr_bit;
pucch_pdu.bit_len_csi_part1 = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = sr_flag;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_start = startingPRB;
nr_decode_pucch0(gNB,nr_slot_tx,&uci_pdu,&pucch_pdu);
if(sr_flag==1){
if (uci_pdu.sr->sr_indication == 0 || uci_pdu.sr->sr_confidence_level == 1)
sr_errors+=1;
......@@ -565,7 +565,7 @@ int main(int argc, char **argv)
}
else if (format==1) {
nr_decode_pucch1(rxdataF,PUCCH_GroupHopping,hopping_id,
&(payload_received),frame_parms,amp,nr_tti_tx,
&(payload_received),frame_parms,amp,nr_slot_tx,
m0,nrofSymbols,startingSymbolIndex,startingPRB,
startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
if(nr_bit==1)
......@@ -574,34 +574,34 @@ int main(int argc, char **argv)
ack_nack_errors+=((actual_payload^payload_received)&1) + (((actual_payload^payload_received)&2)>>1);
}
else if (format==2) {
nfapi_nr_uci_pucch_pdu_format_2_3_4_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.rnti = 0x1234;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_csi_part1 = nr_bit;
pucch_pdu.bit_len_harq = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = 0;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_size = nrofPRB;
pucch_pdu.prb_start = startingPRB;
pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_pdu.data_scrambling_id = data_scrambling_id;
nr_decode_pucch2(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu);
int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3;
if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++;
for (int i=0;i<csi_part1_bytes;i++) {
if (uci_pdu.csi_part1.csi_part1_payload[i] != ((uint8_t*)&actual_payload)[i]) {
ack_nack_errors++;
break;
}
}
free(uci_pdu.csi_part1.csi_part1_payload);
nfapi_nr_uci_pucch_pdu_format_2_3_4_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.rnti = 0x1234;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_csi_part1 = nr_bit;
pucch_pdu.bit_len_harq = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = 0;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_size = nrofPRB;
pucch_pdu.prb_start = startingPRB;
pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_pdu.data_scrambling_id = data_scrambling_id;
nr_decode_pucch2(gNB,nr_slot_tx,&uci_pdu,&pucch_pdu);
int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3;
if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++;
for (int i=0;i<csi_part1_bytes;i++) {
if (uci_pdu.csi_part1.csi_part1_payload[i] != ((uint8_t*)&actual_payload)[i]) {
ack_nack_errors++;
break;
}
}
free(uci_pdu.csi_part1.csi_part1_payload);
}
n_errors=((actual_payload^payload_received)&1)+(((actual_payload^payload_received)&2)>>1)+(((actual_payload^payload_received)&4)>>2)+n_errors;
......
......@@ -833,7 +833,8 @@ int main(int argc, char **argv)
gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round;
rv_index = nr_rv_round_map[round];
UE_proc.nr_tti_tx = slot;
UE_proc.thread_id = 0;
UE_proc.nr_slot_tx = slot;
UE_proc.frame_tx = frame;
UL_tti_req->SFN = frame;
......@@ -904,6 +905,7 @@ int main(int argc, char **argv)
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.thread_id = UE_proc.thread_id;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
scheduled_response.tx_request = &tx_req;
......@@ -959,7 +961,7 @@ int main(int argc, char **argv)
/////////////////////////phy_procedures_nr_ue_TX///////////////////////
///////////
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id, 0);
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id);
if (n_trials==1) {
......
......@@ -94,6 +94,7 @@ extern int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode);
int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int pss_sequence_number)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
UE_nr_rxtx_proc_t proc = {0};
int synchro_position;
int offset;
int16_t *tmp;
......@@ -130,7 +131,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, in
#endif
rx_sss_nr(PHY_vars_UE, &metric_fdd_ncp, &phase_fdd_ncp);
rx_sss_nr(PHY_vars_UE, &proc, &metric_fdd_ncp, &phase_fdd_ncp);
#if TEST_SYNCHRO_TIMING_PSS
......@@ -244,7 +245,7 @@ void set_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset, int slot_offset)
void insert_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_half_frame = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti)>>1;
int samples_for_half_frame = frame_parms->samples_per_frame / 2;
set_sequence_sss(PHY_vars_UE, offset, 0);
......@@ -327,7 +328,7 @@ int test_synchro_pss_sss(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int s
int sync_pos2 = synchro_position - frame_parms->nb_prefix_samples;
int sync_pos_slot = (frame_parms->samples_per_tti>>1) - frame_parms->ofdm_symbol_size - frame_parms->nb_prefix_samples;
int sync_pos_slot = (frame_parms->samples_per_slot>>1) - frame_parms->ofdm_symbol_size - frame_parms->nb_prefix_samples;
if (sync_pos2 >= sync_pos_slot)
PHY_vars_UE->rx_offset = sync_pos2 - sync_pos_slot;
......
......@@ -300,7 +300,7 @@ typedef enum {
void set_random_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int amp) {
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti);
int samples_for_frame = frame_parms->samples_per_frame;
int16_t random;
int16_t *data_p;
random_data_format_t data_format = SINUSOIDAL_DATA;
......@@ -394,7 +394,7 @@ void set_random_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int amp) {
int set_pss_in_rx_buffer_from_external_buffer(PHY_VARS_NR_UE *PHY_vars_UE, short *input_buffer) {
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe; /* both i and q */
int samples_for_frame = frame_parms->samples_per_frame; /* both i and q */
for (int aa=0; aa<PHY_vars_UE->frame_parms.nb_antennas_rx; aa++) {
for (int i = 0; i < samples_for_frame; i++) {
......
......@@ -69,12 +69,6 @@ typedef struct {
int number_of_fail;
} test_t;
typedef struct {
uint16_t ofdm_symbol_size;
uint32_t samples_per_tti;
uint32_t samples_per_subframe;
} save_frame_parms_t;
/*************** GLOBAL VARIABLES***********************************/
EXTERN PHY_VARS_eNB *PHY_vars_eNB;
......
......@@ -58,7 +58,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
int occ_Index = 0;
uint64_t pucch_payload = 0;
int tx_amp = 512;
int nr_tti_tx = 0;
int nr_slot_tx = 0;
int N_UCI = 0; /* size in bits for Uplink Control Information */
switch(format) {
......@@ -67,7 +67,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
(uint8_t)m_CS,
nb_symbols_total,
......@@ -82,7 +82,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
nb_symbols_total,
starting_symbol_index,
......@@ -95,13 +95,13 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
case pucch_format2_nr: {
nr_generate_pucch2(ue,
ue->pdcch_vars[ue->current_thread_id[nr_tti_tx]][gNB_id]->crnti,
ue->pdcch_vars[thread_number][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
......@@ -113,14 +113,14 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
case pucch_format3_nr:
case pucch_format4_nr: {
nr_generate_pucch3_4(ue,
ue->pdcch_vars[ue->current_thread_id[nr_tti_tx]][gNB_id]->crnti,
ue->pdcch_vars[thread_number][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
......
......@@ -229,7 +229,6 @@ int test_srs_periodicity(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc)
for (int slot_tx = 0; slot_tx < frame_parms->slots_per_frame; slot_tx++) {
proc->frame_tx = frame_tx;
proc->nr_slot_tx = slot_tx;
proc->nr_tti_tx = slot_tx % frame_parms->slots_per_subframe;
if (ue_srs_procedure_nr( ue, proc, 0) == 0) {
printf("test_srs_periodicity srs at frame %d slot %d \n", frame_tx, slot_tx);
}
......@@ -373,7 +372,7 @@ int test_srs(PHY_VARS_NR_UE *PHY_vars_UE)
/* start test of sounding reference signals */
default_srs_configuration(frame_parms);
txptr = calloc(frame_parms->samples_per_tti , sizeof(int32_t));
txptr = calloc(frame_parms->samples_per_slot , sizeof(int32_t));
if (txptr == NULL) {
printf("Error test_srs: memory allocation problem txptr \n");
assert(0);
......
......@@ -84,6 +84,7 @@
int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR_DL_FRAME_PARMS *frame_parms_gNB, test_t *test)
{
UE_nr_rxtx_proc_t proc = {0};
VOID_PARAMETER test;
int synchro_position;
int offset;
......@@ -133,7 +134,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR
#endif
rx_sss_nr(PHY_vars_UE, &metric_fdd_ncp, &phase_fdd_ncp);
rx_sss_nr(PHY_vars_UE, &proc, &metric_fdd_ncp, &phase_fdd_ncp);
#if TEST_SYNCHRO_TIMING_PSS
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file itti_sim_messages_def.h
* \brief itti message for itti simulator
* \author Yoshio INOUE, Masayuki HARADA
* \email yoshio.inoue@fujitsu.com,masayuki.harada@fujitsu.com
* \date 2020
* \version 0.1
*/
MESSAGE_DEF(GNB_RRC_BCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, GNBBCCHind)
MESSAGE_DEF(GNB_RRC_CCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, GNBCCCHind)
MESSAGE_DEF(GNB_RRC_DCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, GNBDCCHind)
MESSAGE_DEF(UE_RRC_CCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, UECCCHind)
MESSAGE_DEF(UE_RRC_DCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, UEDCCHind)
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......@@ -41,10 +41,16 @@ MESSAGE_DEF(RRC_MAC_CCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcMacCcchDat
MESSAGE_DEF(RRC_MAC_CCCH_DATA_CNF, MESSAGE_PRIORITY_MED_PLUS, RrcMacCcchDataCnf, rrc_mac_ccch_data_cnf)
MESSAGE_DEF(RRC_MAC_CCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, RrcMacCcchDataInd, rrc_mac_ccch_data_ind)
MESSAGE_DEF(RRC_MAC_MCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcMacMcchDataReq, rrc_mac_mcch_data_req)
MESSAGE_DEF(RRC_MAC_MCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, RrcMacMcchDataInd, rrc_mac_mcch_data_ind)
MESSAGE_DEF(RRC_MAC_PCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcMacPcchDataReq, rrc_mac_pcch_data_req)
/* RRC configures DRX context (MAC timers) of a UE */
MESSAGE_DEF(RRC_MAC_DRX_CONFIG_REQ, MESSAGE_PRIORITY_MED, rrc_mac_drx_config_req_t, rrc_mac_drx_config_req)
\ No newline at end of file
MESSAGE_DEF(RRC_MAC_DRX_CONFIG_REQ, MESSAGE_PRIORITY_MED, rrc_mac_drx_config_req_t, rrc_mac_drx_config_req)
// gNB
MESSAGE_DEF(NR_RRC_MAC_CCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, NRRrcMacCcchDataInd, nr_rrc_mac_ccch_data_ind)
MESSAGE_DEF(NR_RRC_MAC_BCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, NRRrcMacBcchDataInd, nr_rrc_mac_bcch_data_ind)
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......@@ -31,3 +31,6 @@
MESSAGE_DEF(RRC_DCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcDcchDataReq, rrc_dcch_data_req)
MESSAGE_DEF(RRC_DCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, RrcDcchDataInd, rrc_dcch_data_ind)
MESSAGE_DEF(RRC_PCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcPcchDataReq, rrc_pcch_data_req)
// gNB
MESSAGE_DEF(NR_RRC_DCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, NRRrcDcchDataInd, nr_rrc_dcch_data_ind)
......@@ -35,6 +35,9 @@
#define RRC_DCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.rrc_dcch_data_ind
#define RRC_PCCH_DATA_REQ(mSGpTR) (mSGpTR)->ittiMsg.rrc_pcch_data_req
// gNB
#define NR_RRC_DCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.nr_rrc_dcch_data_ind
//-------------------------------------------------------------------------------------------//
// Messages between RRC and PDCP layers
typedef struct RrcDcchDataReq_s {
......@@ -61,6 +64,16 @@ typedef struct RrcDcchDataInd_s {
uint8_t eNB_index; // LG: needed in UE
} RrcDcchDataInd;
typedef struct NRRrcDcchDataInd_s {
uint32_t frame;
uint8_t dcch_index;
uint32_t sdu_size;
uint8_t *sdu_p;
uint16_t rnti;
uint8_t module_id;
uint8_t gNB_index; // LG: needed in UE
} NRRrcDcchDataInd;
typedef struct RrcPcchDataReq_s {
uint32_t sdu_size;
uint8_t *sdu_p;
......
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