Commit 7580b4b2 authored by Raymond Knopp's avatar Raymond Knopp

added simple CCE allocation in MAC scheduler

parent decf6ed0
...@@ -339,6 +339,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -339,6 +339,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame_txP, slot_txP); clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame_txP, slot_txP);
} }
memset(RC.nrmac[module_idP]->cce_list[0][0],0,sizeof(int)*MAX_NUM_CCE);
// refresh UE list based on UEs dropped by PHY in previous subframe // refresh UE list based on UEs dropped by PHY in previous subframe
/* /*
......
...@@ -69,15 +69,20 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -69,15 +69,20 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
uint16_t rnti = 0x1234; uint16_t rnti = 0x1234;
// int time_domain_assignment,k0;
NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon;
int dlBWP_carrier_bandwidth = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275); int dlBWP_carrier_bandwidth = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
// everything here is hard-coded to 30 kHz
/*
int scs = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing; int scs = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
int slots_per_frame = 10*(1<<scs); int slots_per_frame = 10*(1<<scs);
int FR = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257 ? nr_FR2 : nr_FR1; int FR = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257 ? nr_FR2 : nr_FR1;
*/
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_D(MAC, "Scheduling common search space DCI type 1 dlBWP BW.firstRB %d.%d\n", LOG_D(MAC, "Scheduling common search space DCI type 1 dlBWP BW.firstRB %d.%d\n",
...@@ -97,7 +102,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -97,7 +102,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu)); dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; // nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
pdsch_pdu_rel15->pduBitmap = 0; pdsch_pdu_rel15->pduBitmap = 0;
...@@ -132,9 +137,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -132,9 +137,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
pdsch_pdu_rel15->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP pdsch_pdu_rel15->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP
// choose shortest PDSCH // choose shortest PDSCH
int startSymbolAndLength=0; int startSymbolAndLength=0;
int StartSymbolIndex,NrOfSymbols=14,k0=0; int StartSymbolIndex=-1,NrOfSymbols=14;
int StartSymbolIndex_tmp,NrOfSymbols_tmp; int StartSymbolIndex_tmp,NrOfSymbols_tmp;
int time_domain_assignment=0;
for (int i=0; for (int i=0;
i<scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i<scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
...@@ -144,10 +148,11 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -144,10 +148,11 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
if (NrOfSymbols_tmp < NrOfSymbols) { if (NrOfSymbols_tmp < NrOfSymbols) {
NrOfSymbols = NrOfSymbols_tmp; NrOfSymbols = NrOfSymbols_tmp;
StartSymbolIndex = StartSymbolIndex_tmp; StartSymbolIndex = StartSymbolIndex_tmp;
k0 = *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0; // k0 = *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
time_domain_assignment = i; // time_domain_assignment = i;
} }
} }
AssertFatal(StartSymbolIndex>=0,"StartSymbolIndex is negative\n");
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex; pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols; pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
...@@ -241,6 +246,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -241,6 +246,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
} }
int configure_fapi_dl_Tx(int Mod_idP, int configure_fapi_dl_Tx(int Mod_idP,
int *CCEIndex,
nfapi_nr_dl_tti_request_body_t *dl_req, nfapi_nr_dl_tti_request_body_t *dl_req,
nfapi_nr_pdu_t *TX_req) { nfapi_nr_pdu_t *TX_req) {
...@@ -255,15 +261,10 @@ int configure_fapi_dl_Tx(int Mod_idP, ...@@ -255,15 +261,10 @@ int configure_fapi_dl_Tx(int Mod_idP,
int bwp_id=1; int bwp_id=1;
int UE_id = 0; int UE_id = 0;
NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id);
LOG_I(PHY,"UE_id %d\n",UE_id); LOG_I(PHY,"UE_id %d\n",UE_id);
...@@ -364,20 +365,20 @@ int configure_fapi_dl_Tx(int Mod_idP, ...@@ -364,20 +365,20 @@ int configure_fapi_dl_Tx(int Mod_idP,
dci_pdu_rel15[0].tb_scaling, dci_pdu_rel15[0].tb_scaling,
dci_pdu_rel15[0].ndi, dci_pdu_rel15[0].ndi,
dci_pdu_rel15[0].rv); dci_pdu_rel15[0].rv);
nr_configure_pdcch(pdcch_pdu_rel15, nr_configure_pdcch(pdcch_pdu_rel15,
1, // ue-specific 1, // ue-specific
scc, scc,
bwp); bwp);
pdcch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
pdcch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
pdcch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
pdcch_pdu_rel15->numDlDci = 1; pdcch_pdu_rel15->numDlDci = 1;
pdcch_pdu_rel15->AggregationLevel[0] = 4; pdcch_pdu_rel15->AggregationLevel[0] = 4;
pdcch_pdu_rel15->RNTI[0]=UE_list->rnti[0]; pdcch_pdu_rel15->RNTI[0]=UE_list->rnti[0];
pdcch_pdu_rel15->CceIndex[0] = 0; pdcch_pdu_rel15->CceIndex[0] = CCEIndex[0];
pdcch_pdu_rel15->beta_PDCCH_1_0[0]=0; pdcch_pdu_rel15->beta_PDCCH_1_0[0]=0;
pdcch_pdu_rel15->powerControlOffsetSS[0]=1; pdcch_pdu_rel15->powerControlOffsetSS[0]=1;
...@@ -469,7 +470,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -469,7 +470,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
//NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon; //NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon;
nfapi_nr_dl_tti_request_body_t *dl_req; nfapi_nr_dl_tti_request_body_t *dl_req;
nfapi_nr_pdu_t *TX_req; nfapi_nr_pdu_t *TX_req;
uint16_t rnti = 0x1234;
int TBS; int TBS;
int TBS_bytes; int TBS_bytes;
...@@ -486,12 +487,12 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -486,12 +487,12 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
int UE_id = 0; int UE_id = 0;
unsigned char sdu_lcids[NB_RB_MAX]; unsigned char sdu_lcids[NB_RB_MAX];
int padding = 0, post_padding = 0; int padding = 0, post_padding = 0;
UE_list_t *UE_list = &nr_mac->UE_list; NR_UE_list_t *UE_list = &nr_mac->UE_list;
uint16_t rnti = UE_list->rnti[UE_id];
DLSCH_PDU dlsch_pdu; DLSCH_PDU dlsch_pdu;
//PDSCH_PDU *pdsch_pdu = (PDSCH_PDU*) malloc(sizeof(PDSCH_PDU)); //PDSCH_PDU *pdsch_pdu = (PDSCH_PDU*) malloc(sizeof(PDSCH_PDU));
int CCEIndex=-1;
LOG_D(MAC, "Scheduling UE specific search space DCI type 1\n"); LOG_D(MAC, "Scheduling UE specific search space DCI type 1\n");
int CC_id=0; int CC_id=0;
...@@ -540,7 +541,16 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -540,7 +541,16 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
lcid, lcid,
header_length_total, header_length_total,
TBS); TBS);
CCEIndex = allocate_nr_CCEs(nr_mac,
1, // bwp_id
0, // coreset_id
4, // aggregation,
1, // search_space, 0 common, 1 ue-specific
UE_id,
0); // m
if (CCEIndex == -1) return;
sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP, rnti, module_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_NO, lcid, sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP, rnti, module_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_NO, lcid,
TBS, TBS,
(char *)&dlsch_buffer[sdu_length_total] (char *)&dlsch_buffer[sdu_length_total]
...@@ -557,17 +567,10 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -557,17 +567,10 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
sdu_lcids[num_sdus] = lcid; sdu_lcids[num_sdus] = lcid;
sdu_length_total += sdu_lengths[num_sdus]; sdu_length_total += sdu_lengths[num_sdus];
UE_list->eNB_UE_stats[CC_id][UE_id].num_pdu_tx[lcid]++;
UE_list->eNB_UE_stats[CC_id][UE_id].lcid_sdu[num_sdus] = lcid;
UE_list->eNB_UE_stats[CC_id][UE_id].sdu_length_tx[lcid] = sdu_lengths[num_sdus];
UE_list->eNB_UE_stats[CC_id][UE_id].num_bytes_tx[lcid] += sdu_lengths[num_sdus];
header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128); header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128);
header_length_total += header_length_last; header_length_total += header_length_last;
num_sdus++; num_sdus++;
UE_list->UE_sched_ctrl[UE_id].uplane_inactivity_timer = 0;
} }
} else { } else {
// no TBS left // no TBS left
...@@ -615,8 +618,13 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -615,8 +618,13 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
//UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset + sdu_length_total + j] = 0; //UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset + sdu_length_total + j] = 0;
nr_mac->UE_list.DLSCH_pdu[0][0].payload[0][offset + sdu_length_total + j] = 0; nr_mac->UE_list.DLSCH_pdu[0][0].payload[0][offset + sdu_length_total + j] = 0;
} }
AssertFatal(CCEIndex>0,"CCEIndex is negative\n");
int CCEIndices[2];
CCEIndices[0] = CCEIndex;
TBS_bytes = configure_fapi_dl_Tx(module_idP, TBS_bytes = configure_fapi_dl_Tx(module_idP,
CCEIndices,
dl_req, dl_req,
TX_req); TX_req);
...@@ -641,7 +649,19 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -641,7 +649,19 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
//When the --NOS1 option is not enabled, DLSCH transmissions with random data //When the --NOS1 option is not enabled, DLSCH transmissions with random data
//occur every time that the current function is called (dlsch phytest mode) //occur every time that the current function is called (dlsch phytest mode)
else{ else{
TBS_bytes = configure_fapi_dl_Tx(module_idP,dl_req, TX_req); CCEIndex = allocate_nr_CCEs(nr_mac,
1, // bwp_id
0, // coreset_id
4, // aggregation,
1, // search_space, 0 common, 1 ue-specific
UE_id,
0); // m
if (CCEIndex == -1) return;
int CCEIndices[2];
CCEIndices[0] = CCEIndex;
TBS_bytes = configure_fapi_dl_Tx(module_idP,CCEIndices,dl_req, TX_req);
// HOT FIX for all zero pdu problem // HOT FIX for all zero pdu problem
// ------------------------------------------------------------------------------------------------ // ------------------------------------------------------------------------------------------------
......
...@@ -64,6 +64,8 @@ ...@@ -64,6 +64,8 @@
#define ENABLE_MAC_PAYLOAD_DEBUG #define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_gNB_SCHEDULER 1 #define DEBUG_gNB_SCHEDULER 1
#define CEILIDIV(a,b) ((a+b-1)/b)
#include "common/ran_context.h" #include "common/ran_context.h"
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
...@@ -134,6 +136,67 @@ int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slot){ ...@@ -134,6 +136,67 @@ int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slot){
return (0); return (0);
} }
int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
int bwp_id,
int coreset_id,
int aggregation,
int search_space, // 0 common, 1 ue-specific
int UE_id,
int m
) {
NR_COMMON_channels_t *cc = nr_mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_UE_list_t *UE_list = &nr_mac->UE_list;
NR_BWP_Downlink_t *bwp;
NR_CellGroupConfig_t *secondaryCellGroup;
NR_ControlResourceSet_t *coreset;
if (search_space == 1) {
AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id);
bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
secondaryCellGroup = UE_list->secondaryCellGroup[UE_id];
coreset = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[coreset_id];
}
else {
AssertFatal(1==0,"Add code for common search space\n");
}
int *cce_list = nr_mac->cce_list[bwp_id][coreset_id];
int n_rb=0;
for (int i=0;i<6;i++)
for (int j=0;j<8;j++) {
n_rb+=((coreset->frequencyDomainResources.buf[i]>>j)&1);
}
n_rb*=6;
uint16_t N_reg = n_rb * coreset->duration;
uint16_t Y=0, N_cce, M_s_max, n_CI=0, tmp, C=0;
uint16_t n_RNTI = search_space == 1 ? UE_list->rnti[UE_id]:0;
uint32_t A[3]={39827,39829,39839};
N_cce = N_reg / NR_NB_REG_PER_CCE;
M_s_max = (aggregation==4)?4:(aggregation==8)?2:1;
if (search_space == 1) {
Y = (A[0]*n_RNTI)%65537; // Candidate 0, antenna port 0
}
int first_cce = aggregation * (( Y + (m*N_cce)/(aggregation*M_s_max) + n_CI ) % CEILIDIV(N_cce,aggregation));
for (int i=0;i<aggregation;i++)
if (cce_list[first_cce+i] != 0) return(-1);
for (int i=0;i<aggregation;i++) cce_list[first_cce+i] = 1;
return(first_cce);
}
void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
nr_scs_e scs_common, nr_scs_e scs_common,
nr_scs_e pdcch_scs, nr_scs_e pdcch_scs,
......
...@@ -66,6 +66,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -66,6 +66,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
sub_frame_t subframeP); sub_frame_t subframeP);
int configure_fapi_dl_Tx(int Mod_id, int configure_fapi_dl_Tx(int Mod_id,
int *CCEIndeces,
nfapi_nr_dl_tti_request_body_t *dl_req, nfapi_nr_dl_tti_request_body_t *dl_req,
nfapi_nr_pdu_t *TX_req); nfapi_nr_pdu_t *TX_req);
...@@ -155,4 +156,13 @@ uint16_t nr_dci_size(nr_dci_format_t format, ...@@ -155,4 +156,13 @@ uint16_t nr_dci_size(nr_dci_format_t format,
nr_rnti_type_t rnti_type, nr_rnti_type_t rnti_type,
uint16_t N_RB); uint16_t N_RB);
int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
int bwp_id,
int coreset_id,
int aggregation,
int search_space, // 0 common, 1 ue-specific
int UE_id,
int m
);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/ #endif /*__LAYER2_NR_MAC_PROTO_H__*/
...@@ -59,6 +59,9 @@ ...@@ -59,6 +59,9 @@
#include "PHY/TOOLS/time_meas.h" #include "PHY/TOOLS/time_meas.h"
#include "targets/ARCH/COMMON/common_lib.h" #include "targets/ARCH/COMMON/common_lib.h"
#define MAX_NUM_BWP 2
#define MAX_NUM_CORESET 2
#define MAX_NUM_CCE 90
/*! \brief gNB common channels */ /*! \brief gNB common channels */
typedef struct { typedef struct {
...@@ -173,6 +176,8 @@ typedef struct gNB_MAC_INST_s { ...@@ -173,6 +176,8 @@ typedef struct gNB_MAC_INST_s {
time_stats_t rx_ulsch_sdu; // include rlc_data_ind time_stats_t rx_ulsch_sdu; // include rlc_data_ind
/// processing time of eNB PCH scheduler /// processing time of eNB PCH scheduler
time_stats_t schedule_pch; time_stats_t schedule_pch;
/// CCE lists
int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE];
} gNB_MAC_INST; } gNB_MAC_INST;
typedef struct { typedef struct {
......
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