Commit 7ab0b200 authored by k.ramya's avatar k.ramya

code rearrangement

parent 0e24d8f4
...@@ -309,7 +309,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -309,7 +309,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
} }
} }
#if 0
//!TODO : smae function can be written to handle csi_resources //!TODO : smae function can be written to handle csi_resources
void update_csi_bitlen (NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_list_t *UE_list, int UE_id, module_id_t Mod_idP) { void update_csi_bitlen (NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_list_t *UE_list, int UE_id, module_id_t Mod_idP) {
uint8_t csi_report_id = 0; uint8_t csi_report_id = 0;
...@@ -636,7 +636,7 @@ void update_csi_bitlen (NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_list_t *UE_li ...@@ -636,7 +636,7 @@ void update_csi_bitlen (NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_list_t *UE_li
} }
} }
} }
#endif
extern uint16_t sl_ahead; extern uint16_t sl_ahead;
int rrc_mac_config_req_gNB(module_id_t Mod_idP, int rrc_mac_config_req_gNB(module_id_t Mod_idP,
...@@ -754,7 +754,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ...@@ -754,7 +754,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
UE_info->secondaryCellGroup[UE_id] = secondaryCellGroup; UE_info->secondaryCellGroup[UE_id] = secondaryCellGroup;
LOG_I(PHY,"Modified UE_id %d/%x with secondaryCellGroup\n",UE_id,rnti); LOG_I(PHY,"Modified UE_id %d/%x with secondaryCellGroup\n",UE_id,rnti);
} }
update_csi_bitlen (secondaryCellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_list, UE_id, Mod_idP); //update_csi_bitlen (secondaryCellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_list, UE_id, Mod_idP);
} }
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
......
...@@ -310,7 +310,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -310,7 +310,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
} }
*/ */
/*
void nr_schedule_pusch(int Mod_idP, void nr_schedule_pusch(int Mod_idP,
int UE_id, int UE_id,
int num_slots_per_tdd, int num_slots_per_tdd,
...@@ -321,7 +321,7 @@ void nr_schedule_pusch(int Mod_idP, ...@@ -321,7 +321,7 @@ void nr_schedule_pusch(int Mod_idP,
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0]; nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
int k = slotP + ul_slots - num_slots_per_tdd; int k = slotP + ul_slots - num_slots_per_tdd;
NR_sched_pusch *pusch = &UE_info->UE_sched_ctrl[UE_id].sched_pusch[k]; NR_sched_pusch_t *pusch = &UE_info->UE_sched_ctrl[UE_id].sched_pusch[k];
if ((pusch->active == true) && (frameP == pusch->frame) && (slotP == pusch->slot)) { if ((pusch->active == true) && (frameP == pusch->frame) && (slotP == pusch->slot)) {
UL_tti_req->SFN = pusch->frame; UL_tti_req->SFN = pusch->frame;
UL_tti_req->Slot = pusch->slot; UL_tti_req->Slot = pusch->slot;
...@@ -333,7 +333,7 @@ void nr_schedule_pusch(int Mod_idP, ...@@ -333,7 +333,7 @@ void nr_schedule_pusch(int Mod_idP,
0, sizeof(NR_sched_pusch)); 0, sizeof(NR_sched_pusch));
} }
} }
*/
bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) { bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) {
return (bitmap >> slot) & 0x01; return (bitmap >> slot) & 0x01;
...@@ -348,7 +348,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -348,7 +348,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP); PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
int nb_periods_per_frame; int nb_periods_per_frame;
const int UE_id = 0; const int UE_id = 0;
const int bwp_id = 1; const int bwp_id = 1;
gNB_MAC_INST *gNB = RC.nrmac[module_idP]; gNB_MAC_INST *gNB = RC.nrmac[module_idP];
...@@ -471,12 +470,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -471,12 +470,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedules the DCI for Downlink and PDSCH // This schedules the DCI for Downlink and PDSCH
if (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd) if (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd)
&& slot < 10) { && slot < 10) {
ue_sched_ctl->current_harq_pid = slot % num_slots_per_tdd; //ue_sched_ctl->current_harq_pid = slot % num_slots_per_tdd;
nr_acknack_scheduling(module_idP, UE_id, frame, slot, num_slots_per_tdd,&pucch_sched,&pucch_occ); nr_schedule_ue_spec(module_idP, frame, slot, num_slots_per_tdd);
//TCI handling function
//tci_handling(module_idP, UE_id, CC_id, ue_sched_ctl, frame, slot);
nr_schedule_uss_dlsch_phytest(module_idP, frame, slot, &UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched][pucch_occ], NULL);
ue_sched_ctl->ta_apply = false;
} }
......
...@@ -40,6 +40,11 @@ extern RAN_CONTEXT_t RC; ...@@ -40,6 +40,11 @@ extern RAN_CONTEXT_t RC;
#define L1_RSRP_HYSTERIS 10 //considering 10 dBm as hysterisis for avoiding frequent SSB Beam Switching. !Fixme provide exact value if any #define L1_RSRP_HYSTERIS 10 //considering 10 dBm as hysterisis for avoiding frequent SSB Beam Switching. !Fixme provide exact value if any
//#define L1_DIFF_RSRP_STEP_SIZE 2 //#define L1_DIFF_RSRP_STEP_SIZE 2
void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats);
int ssb_index_sorted[MAX_NUM_SSB] = {0}; int ssb_index_sorted[MAX_NUM_SSB] = {0};
int ssb_rsrp_sorted[MAX_NUM_SSB] = {0}; int ssb_rsrp_sorted[MAX_NUM_SSB] = {0};
//Sorts ssb_index and ssb_rsrp array data and keeps in ssb_index_sorted and //Sorts ssb_index and ssb_rsrp array data and keeps in ssb_index_sorted and
...@@ -94,7 +99,6 @@ void nr_schedule_pucch(int Mod_idP, ...@@ -94,7 +99,6 @@ void nr_schedule_pucch(int Mod_idP,
for (int k=0; k<nr_ulmix_slots; k++) { for (int k=0; k<nr_ulmix_slots; k++) {
for (int l=0; l<2; l++) { for (int l=0; l<2; l++) {
<<<<<<< HEAD
NR_sched_pucch *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l]; NR_sched_pucch *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
const uint16_t O_ack = curr_pucch->dai_c; const uint16_t O_ack = curr_pucch->dai_c;
const uint16_t O_csi = curr_pucch->csi_bits; const uint16_t O_csi = curr_pucch->csi_bits;
...@@ -555,7 +559,8 @@ void nr_csi_meas_reporting(int Mod_idP, ...@@ -555,7 +559,8 @@ void nr_csi_meas_reporting(int Mod_idP,
void handle_nr_uci_pucch_0_1(module_id_t mod_id, void handle_nr_uci_pucch_0_1(module_id_t mod_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01) const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
NR_UL_IND_t *UL_info)
{ {
int UE_id = find_nr_UE_id(mod_id, uci_01->rnti); int UE_id = find_nr_UE_id(mod_id, uci_01->rnti);
if (UE_id < 0) { if (UE_id < 0) {
...@@ -576,21 +581,22 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, ...@@ -576,21 +581,22 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
} }
if (((uci_01->pduBitmap >> 1) & 0x01)) { if (((uci_01->pduBitmap >> 1) & 0x01)) {
nr_rx_acknack(NULL,uci_01,NULL,UL_info,sched_ctrl,stats); nr_rx_acknack(NULL,uci_01,NULL,UL_info,sched_ctrl,&UE_info->mac_stats[0]);
} }
} }
void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234) const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
NR_UL_IND_t *UL_info)
{ {
NR_CSI_MeasConfig_t *csi_MeasConfig = RC.nrmac[Mod_idP]->UE_list.secondaryCellGroup[UE_id]->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
int UE_id = find_nr_UE_id(mod_id, uci_234->rnti); int UE_id = find_nr_UE_id(mod_id, uci_234->rnti);
if (UE_id < 0) { if (UE_id < 0) {
LOG_E(MAC, "%s(): unknown RNTI %04x in PUCCH UCI\n", __func__, uci_234->rnti); LOG_E(MAC, "%s(): unknown RNTI %04x in PUCCH UCI\n", __func__, uci_234->rnti);
return; return;
} }
NR_CSI_MeasConfig_t *csi_MeasConfig = RC.nrmac[mod_id]->UE_info.secondaryCellGroup[UE_id]->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
NR_UE_info_t *UE_info = &RC.nrmac[mod_id]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[mod_id]->UE_info;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
...@@ -604,29 +610,29 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, ...@@ -604,29 +610,29 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
uint8_t sr_id = 0; uint8_t sr_id = 0;
for (sr_id = 0; sr_id < uci_234->sr.sr_bit_len; sr_id++) { for (sr_id = 0; sr_id < uci_234->sr.sr_bit_len; sr_id++) {
sched_ctrl->sr_req.ul_SR[sr_id] = uci_234->sr.sr_payload & 1; sched_ctrl->sr_req.ul_SR[sr_id] = *(uci_234->sr.sr_payload) & 1;
uci_234->sr.sr_payload >>= 1; *(uci_234->sr.sr_payload) >>= 1;
} }
sched_ctrl->sr_req.nr_of_srs = uci_234->sr.sr_bit_len; sched_ctrl->sr_req.nr_of_srs = uci_234->sr.sr_bit_len;
} }
// TODO // TODO
if ((uci_234->pduBitmap >> 1) & 0x01) { if ((uci_234->pduBitmap >> 1) & 0x01) {
nr_rx_acknack(NULL,NULL,uci_234,UL_info,sched_ctrl,stats); nr_rx_acknack(NULL,NULL,uci_234,UL_info,sched_ctrl,&UE_info->mac_stats[0]);
} }
if ((uci_234->pduBitmap >> 1) & 0x01) { if ((uci_234->pduBitmap >> 1) & 0x01) {
NR_SubcarrierSpacing_t scs=*(RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon->ssbSubcarrierSpacing); NR_SubcarrierSpacing_t scs=*(RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon->ssbSubcarrierSpacing);
LOG_I(PHY,"SFN/SF:%d%d scs %ld \n", LOG_I(PHY,"SFN/SF:%d%d scs %ld \n",
UL_info->frame,UL_info->slot, UL_info->frame,UL_info->slot,
scs); scs);
//API to parse the csi report and store it into sched_ctrl //API to parse the csi report and store it into sched_ctrl
extract_pucch_csi_report (csi_MeasConfig, uci_pdu, sched_ctrl,UL_info->frame, UL_info->slot, scs, UE_id, Mod_idP); extract_pucch_csi_report (csi_MeasConfig, uci_234, sched_ctrl,UL_info->frame, UL_info->slot, scs, UE_id, mod_id);
//TCI handling function //TCI handling function
tci_handling(Mod_idP, UE_id, UL_info->CC_id, sched_ctrl, UL_info->frame, UL_info->slot); tci_handling(mod_id, UE_id, UL_info->CC_id, sched_ctrl, UL_info->frame, UL_info->slot);
} }
if (uci_pdu -> pduBitmap & 0x08) { if (uci_234 -> pduBitmap & 0x08) {
///Handle CSI Report 2 ///Handle CSI Report 2
} }
} }
......
...@@ -180,14 +180,22 @@ void nr_fill_nfapi_dl_pdu(int Mod_id, ...@@ -180,14 +180,22 @@ void nr_fill_nfapi_dl_pdu(int Mod_id,
int ndi, int ndi,
int round); int round);
void tci_handling(module_id_t Mod_idP,
int UE_id,
int CC_id,
NR_UE_sched_ctrl_t *sched_ctrl,
frame_t frame,
slot_t slot);
void handle_nr_uci_pucch_0_1(module_id_t mod_id, void handle_nr_uci_pucch_0_1(module_id_t mod_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01); const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
NR_UL_IND_t *UL_info);
void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234); const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
NR_UL_IND_t *UL_info);
void config_uldci(NR_BWP_Uplink_t *ubwp, void config_uldci(NR_BWP_Uplink_t *ubwp,
......
...@@ -84,7 +84,6 @@ void handle_nr_uci(NR_UL_IND_t *UL_info) ...@@ -84,7 +84,6 @@ void handle_nr_uci(NR_UL_IND_t *UL_info)
const sub_frame_t slot = UL_info->slot; const sub_frame_t slot = UL_info->slot;
int num_ucis = UL_info->uci_ind.num_ucis; int num_ucis = UL_info->uci_ind.num_ucis;
nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list; nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
uint8_t UE_id = 0;
for (int i = 0; i < num_ucis; i++) { for (int i = 0; i < num_ucis; i++) {
switch (uci_list[i].pdu_type) { switch (uci_list[i].pdu_type) {
...@@ -94,13 +93,13 @@ void handle_nr_uci(NR_UL_IND_t *UL_info) ...@@ -94,13 +93,13 @@ void handle_nr_uci(NR_UL_IND_t *UL_info)
case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: { case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1; const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
handle_nr_uci_pucch_0_1(mod_id, frame, slot, uci_pdu); handle_nr_uci_pucch_0_1(mod_id, frame, slot, uci_pdu, UL_info);
break; break;
} }
case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: { case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: {
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4; const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4;
handle_nr_uci_pucch_2_3_4(mod_id, frame, slot, uci_pdu); handle_nr_uci_pucch_2_3_4(mod_id, frame, slot, uci_pdu, UL_info);
break; break;
} }
} }
......
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