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wangwenhui
OpenXG-RAN
Commits
d474f4a1
Commit
d474f4a1
authored
Jul 09, 2020
by
Francesco Mani
Browse files
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Plain Diff
fix some warnings
parent
1fa7a61b
Changes
10
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10 changed files
with
26 additions
and
32 deletions
+26
-32
openair1/PHY/INIT/nr_init_ru.c
openair1/PHY/INIT/nr_init_ru.c
+0
-3
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+6
-6
openair1/PHY/NR_TRANSPORT/nr_prach.c
openair1/PHY/NR_TRANSPORT/nr_prach.c
+1
-1
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+1
-1
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+9
-11
openair1/SIMULATION/NR_PHY/dlsim.c
openair1/SIMULATION/NR_PHY/dlsim.c
+3
-3
openair1/SIMULATION/NR_PHY/ulsim.c
openair1/SIMULATION/NR_PHY/ulsim.c
+3
-5
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+2
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+0
-1
No files found.
openair1/PHY/INIT/nr_init_ru.c
View file @
d474f4a1
...
@@ -40,9 +40,6 @@ int nr_phy_init_RU(RU_t *ru) {
...
@@ -40,9 +40,6 @@ int nr_phy_init_RU(RU_t *ru) {
int
p
;
int
p
;
int
re
;
int
re
;
// For memory allocation of ru->prach_rxsigF
int
mu
=
fp
->
numerology_index
;
LOG_I
(
PHY
,
"Initializing RU signal buffers (if_south %s) nb_tx %d
\n
"
,
ru_if_types
[
ru
->
if_south
],
ru
->
nb_tx
);
LOG_I
(
PHY
,
"Initializing RU signal buffers (if_south %s) nb_tx %d
\n
"
,
ru_if_types
[
ru
->
if_south
],
ru
->
nb_tx
);
nfapi_nr_config_request_scf_t
*
cfg
;
nfapi_nr_config_request_scf_t
*
cfg
;
...
...
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
View file @
d474f4a1
...
@@ -204,8 +204,8 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
...
@@ -204,8 +204,8 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch
[
1
]
=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
ch
[
1
]
=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
#ifdef DEBUG_PUSCH
#ifdef DEBUG_PUSCH
printf
(
"pilot %
d
: rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
,
rxF
[
0
],
rxF
[
1
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"pilot %
u
: rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
,
rxF
[
0
],
rxF
[
1
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"data %
d
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
,
rxF
[
2
],
rxF
[
3
]);
printf
(
"data %
u
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
,
rxF
[
2
],
rxF
[
3
]);
#endif
#endif
multadd_real_vector_complex_scalar
(
fml
,
multadd_real_vector_complex_scalar
(
fml
,
ch
,
ch
,
...
@@ -221,7 +221,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
...
@@ -221,7 +221,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#ifdef DEBUG_PUSCH
#ifdef DEBUG_PUSCH
printf
(
"pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
+
1
,
rxF
[
0
],
rxF
[
1
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
+
1
,
rxF
[
0
],
rxF
[
1
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"data %
d
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
+
1
,
rxF
[
2
],
rxF
[
3
]);
printf
(
"data %
u
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
+
1
,
rxF
[
2
],
rxF
[
3
]);
#endif
#endif
multadd_real_vector_complex_scalar
(
fmm
,
multadd_real_vector_complex_scalar
(
fmm
,
ch
,
ch
,
...
@@ -243,7 +243,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
...
@@ -243,7 +243,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch
[
1
]
=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
ch
[
1
]
=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
#ifdef DEBUG_PUSCH
#ifdef DEBUG_PUSCH
printf
(
"pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
,
rxF
[
0
],
rxF
[
1
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
,
rxF
[
0
],
rxF
[
1
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"data %
d
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
,
rxF
[
2
],
rxF
[
3
]);
printf
(
"data %
u
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
,
rxF
[
2
],
rxF
[
3
]);
#endif
#endif
multadd_real_vector_complex_scalar
(
fm
,
multadd_real_vector_complex_scalar
(
fm
,
ch
,
ch
,
...
@@ -262,7 +262,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
...
@@ -262,7 +262,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#ifdef DEBUG_PUSCH
#ifdef DEBUG_PUSCH
printf
(
"ch 0 %d
\n
"
,((
int32_t
)
pil
[
0
]
*
rxF
[
0
]
-
(
int32_t
)
pil
[
1
]
*
rxF
[
1
]));
printf
(
"ch 0 %d
\n
"
,((
int32_t
)
pil
[
0
]
*
rxF
[
0
]
-
(
int32_t
)
pil
[
1
]
*
rxF
[
1
]));
printf
(
"pilot %u: rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
+
1
,
rxF
[
0
],
rxF
[
1
],
&
rxF
[
0
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"pilot %u: rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
+
1
,
rxF
[
0
],
rxF
[
1
],
&
rxF
[
0
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"data %
d
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
+
1
,
rxF
[
2
],
rxF
[
3
]);
printf
(
"data %
u
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
+
1
,
rxF
[
2
],
rxF
[
3
]);
#endif
#endif
multadd_real_vector_complex_scalar
(
fmr
,
multadd_real_vector_complex_scalar
(
fmr
,
ch
,
ch
,
...
@@ -278,7 +278,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
...
@@ -278,7 +278,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch
[
1
]
=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
ch
[
1
]
=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
#ifdef DEBUG_PUSCH
#ifdef DEBUG_PUSCH
printf
(
"pilot %u: rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
+
2
,
rxF
[
0
],
rxF
[
1
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"pilot %u: rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d)
\n
"
,
pilot_cnt
+
2
,
rxF
[
0
],
rxF
[
1
],
ch
[
0
],
ch
[
1
],
pil
[
0
],
pil
[
1
]);
printf
(
"data %
d
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
+
2
,
rxF
[
2
],
rxF
[
3
]);
printf
(
"data %
u
: rxF - > (%d,%d)
\n
"
,
pilot_cnt
+
2
,
rxF
[
2
],
rxF
[
3
]);
#endif
#endif
multadd_real_vector_complex_scalar
(
fr
,
multadd_real_vector_complex_scalar
(
fr
,
ch
,
ch
,
...
...
openair1/PHY/NR_TRANSPORT/nr_prach.c
View file @
d474f4a1
...
@@ -791,7 +791,7 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
...
@@ -791,7 +791,7 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
if
(
LOG_DUMPFLAG
(
PRACH
))
{
if
(
LOG_DUMPFLAG
(
PRACH
))
{
int
en
=
dB_fixed
(
signal_energy
((
int32_t
*
)
&
rxsigF
[
0
][
0
],
840
));
//int en = dB_fixed(signal_energy((int32_t*)&rxsigF[0][0],840));
// if (en>60) {
// if (en>60) {
int
k
=
(
12
*
n_ra_prb
)
-
6
*
fp
->
N_RB_UL
;
int
k
=
(
12
*
n_ra_prb
)
-
6
*
fp
->
N_RB_UL
;
...
...
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @
d474f4a1
...
@@ -57,7 +57,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
...
@@ -57,7 +57,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
NR_UE_PDCCH
*
pdcch_vars
=
PHY_vars_UE_g
[
module_id
][
cc_id
]
->
pdcch_vars
[
thread_id
][
0
];
NR_UE_PDCCH
*
pdcch_vars
=
PHY_vars_UE_g
[
module_id
][
cc_id
]
->
pdcch_vars
[
thread_id
][
0
];
NR_UE_ULSCH_t
*
ulsch0
=
PHY_vars_UE_g
[
module_id
][
cc_id
]
->
ulsch
[
thread_id
][
0
][
0
];
NR_UE_ULSCH_t
*
ulsch0
=
PHY_vars_UE_g
[
module_id
][
cc_id
]
->
ulsch
[
thread_id
][
0
][
0
];
NR_DL_FRAME_PARMS
frame_parms
=
PHY_vars_UE_g
[
module_id
][
cc_id
]
->
frame_parms
;
NR_DL_FRAME_PARMS
frame_parms
=
PHY_vars_UE_g
[
module_id
][
cc_id
]
->
frame_parms
;
PRACH_RESOURCES_t
*
prach_resources
=
PHY_vars_UE_g
[
module_id
][
cc_id
]
->
prach_resources
[
0
];
//
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
...
...
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
d474f4a1
...
@@ -3284,15 +3284,14 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
...
@@ -3284,15 +3284,14 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
int
*
dlsch_errors
,
int
*
dlsch_errors
,
runmode_t
mode
)
{
runmode_t
mode
)
{
int
harq_pid
;
int
harq_pid
=
dlsch0
->
current_harq_pid
;
int
frame_rx
=
proc
->
frame_rx
;
int
frame_rx
=
proc
->
frame_rx
;
int
nr_tti_rx
=
proc
->
nr_tti_rx
;
int
nr_tti_rx
=
proc
->
nr_tti_rx
;
int
ret
=
0
,
ret1
=
0
;
int
ret
=
0
,
ret1
=
0
;
NR_UE_PDSCH
*
pdsch_vars
;
NR_UE_PDSCH
*
pdsch_vars
;
uint8_t
is_cw0_active
=
0
;
uint8_t
is_cw0_active
=
0
;
uint8_t
is_cw1_active
=
0
;
uint8_t
is_cw1_active
=
0
;
nfapi_nr_config_request_t
*
cfg
=
&
ue
->
nrUE_config
;
uint8_t
dmrs_type
=
dlsch0
->
harq_processes
[
harq_pid
]
->
dmrsConfigType
;
uint8_t
dmrs_type
=
cfg
->
pdsch_config
.
PDSCHTimeDomainResourceAllocation_mappingType
[
0
].
value
;
// TODO: HARDCODED pdsch index
uint8_t
nb_re_dmrs
=
(
dmrs_type
==
NFAPI_NR_DMRS_TYPE1
)
?
6
:
4
;
// TODO: should changed my mac
uint8_t
nb_re_dmrs
=
(
dmrs_type
==
NFAPI_NR_DMRS_TYPE1
)
?
6
:
4
;
// TODO: should changed my mac
uint16_t
length_dmrs
=
1
;
//cfg->pdsch_config.dmrs_max_length.value;
uint16_t
length_dmrs
=
1
;
//cfg->pdsch_config.dmrs_max_length.value;
uint16_t
nb_symb_sch
=
9
;
uint16_t
nb_symb_sch
=
9
;
...
@@ -3316,7 +3315,6 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
...
@@ -3316,7 +3315,6 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
if
(
dlsch0
==
NULL
)
if
(
dlsch0
==
NULL
)
AssertFatal
(
0
,
"dlsch0 should be defined at this level
\n
"
);
AssertFatal
(
0
,
"dlsch0 should be defined at this level
\n
"
);
harq_pid
=
dlsch0
->
current_harq_pid
;
is_cw0_active
=
dlsch0
->
harq_processes
[
harq_pid
]
->
status
;
is_cw0_active
=
dlsch0
->
harq_processes
[
harq_pid
]
->
status
;
nb_symb_sch
=
dlsch0
->
harq_processes
[
harq_pid
]
->
nb_symbols
;
nb_symb_sch
=
dlsch0
->
harq_processes
[
harq_pid
]
->
nb_symbols
;
start_symbol
=
dlsch0
->
harq_processes
[
harq_pid
]
->
start_symbol
;
start_symbol
=
dlsch0
->
harq_processes
[
harq_pid
]
->
start_symbol
;
...
@@ -3376,13 +3374,13 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
...
@@ -3376,13 +3374,13 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}
}
// start ldpc decode for CW 0
// start ldpc decode for CW 0
dlsch0
->
harq_processes
[
harq_pid
]
->
G
=
nr_get_G
(
dlsch0
->
harq_processes
[
harq_pid
]
->
nb_rb
,
dlsch0
->
harq_processes
[
harq_pid
]
->
G
=
nr_get_G
(
dlsch0
->
harq_processes
[
harq_pid
]
->
nb_rb
,
nb_symb_sch
,
nb_symb_sch
,
nb_re_dmrs
,
nb_re_dmrs
,
length_dmrs
,
length_dmrs
,
dlsch0
->
harq_processes
[
harq_pid
]
->
Qm
,
dlsch0
->
harq_processes
[
harq_pid
]
->
Qm
,
dlsch0
->
harq_processes
[
harq_pid
]
->
Nl
);
dlsch0
->
harq_processes
[
harq_pid
]
->
Nl
);
#if UE_TIMING_TRACE
#if UE_TIMING_TRACE
start_meas
(
&
ue
->
dlsch_unscrambling_stats
);
start_meas
(
&
ue
->
dlsch_unscrambling_stats
);
#endif
#endif
...
...
openair1/SIMULATION/NR_PHY/dlsim.c
View file @
d474f4a1
...
@@ -139,7 +139,7 @@ int main(int argc, char **argv)
...
@@ -139,7 +139,7 @@ int main(int argc, char **argv)
uint8_t
snr1set
=
0
;
uint8_t
snr1set
=
0
;
float
roundStats
[
50
];
float
roundStats
[
50
];
float
effRate
;
float
effRate
;
float
psnr
;
//
float psnr;
float
eff_tp_check
=
0
.
7
;
float
eff_tp_check
=
0
.
7
;
uint8_t
snrRun
;
uint8_t
snrRun
;
uint32_t
TBS
;
uint32_t
TBS
;
...
@@ -696,7 +696,7 @@ int main(int argc, char **argv)
...
@@ -696,7 +696,7 @@ int main(int argc, char **argv)
nr_ue_phy_config_request
(
&
UE_mac
->
phy_config
);
nr_ue_phy_config_request
(
&
UE_mac
->
phy_config
);
NR_UE_list_t
*
UE_list
=
&
RC
.
nrmac
[
0
]
->
UE_list
;
NR_UE_list_t
*
UE_list
=
&
RC
.
nrmac
[
0
]
->
UE_list
;
NR_COMMON_channels_t
*
cc
=
RC
.
nrmac
[
0
]
->
common_channels
;
//
NR_COMMON_channels_t *cc = RC.nrmac[0]->common_channels;
snrRun
=
0
;
snrRun
=
0
;
for
(
SNR
=
snr0
;
SNR
<
snr1
;
SNR
+=
.
2
)
{
for
(
SNR
=
snr0
;
SNR
<
snr1
;
SNR
+=
.
2
)
{
...
@@ -924,7 +924,7 @@ int main(int argc, char **argv)
...
@@ -924,7 +924,7 @@ int main(int argc, char **argv)
(
float
)
n_errors
/
(
float
)
n_trials
);
(
float
)
n_errors
/
(
float
)
n_trials
);
printf
(
"*****************************************
\n
"
);
printf
(
"*****************************************
\n
"
);
printf
(
"
\n
"
);
printf
(
"
\n
"
);
printf
(
"SNR %f : n_errors (negative CRC) = %d/%d, Avg round %.2f, Channel BER %e, Eff Rate %.4f bits/slot, Eff Throughput %.2f
\%
, TBS %d bits/slot
\n
"
,
SNR
,
n_errors
,
n_trials
,
roundStats
[
snrRun
],(
double
)
errors_scrambling
/
available_bits
/
n_trials
,
effRate
,
effRate
/
TBS
*
100
,
TBS
);
printf
(
"SNR %f : n_errors (negative CRC) = %d/%d, Avg round %.2f, Channel BER %e, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %d bits/slot
\n
"
,
SNR
,
n_errors
,
n_trials
,
roundStats
[
snrRun
],(
double
)
errors_scrambling
/
available_bits
/
n_trials
,
effRate
,
effRate
/
TBS
*
100
,
TBS
);
printf
(
"
\n
"
);
printf
(
"
\n
"
);
if
(
n_trials
==
1
)
{
if
(
n_trials
==
1
)
{
...
...
openair1/SIMULATION/NR_PHY/ulsim.c
View file @
d474f4a1
...
@@ -150,7 +150,7 @@ int main(int argc, char **argv)
...
@@ -150,7 +150,7 @@ int main(int argc, char **argv)
UE_nr_rxtx_proc_t
UE_proc
;
UE_nr_rxtx_proc_t
UE_proc
;
FILE
*
scg_fd
=
NULL
;
FILE
*
scg_fd
=
NULL
;
int
ibwp
_size
=
24
;
int
ibwp
s
=
24
;
int
ibwp_rboffset
=
41
;
int
ibwp_rboffset
=
41
;
if
(
load_configmodule
(
argc
,
argv
,
CONFIG_ENABLECMDLINEONLY
)
==
0
)
{
if
(
load_configmodule
(
argc
,
argv
,
CONFIG_ENABLECMDLINEONLY
)
==
0
)
{
exit_fun
(
"[NR_ULSIM] Error, configuration module init failed
\n
"
);
exit_fun
(
"[NR_ULSIM] Error, configuration module init failed
\n
"
);
...
@@ -618,7 +618,7 @@ int main(int argc, char **argv)
...
@@ -618,7 +618,7 @@ int main(int argc, char **argv)
int
abwp_size
=
NRRIV2BW
(
ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
int
abwp_size
=
NRRIV2BW
(
ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
int
abwp_start
=
NRRIV2PRBOFFSET
(
ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
int
abwp_start
=
NRRIV2PRBOFFSET
(
ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
int
ibwp_size
=
ibwp
_size
;
int
ibwp_size
=
ibwp
s
;
int
ibwp_start
=
ibwp_rboffset
;
int
ibwp_start
=
ibwp_rboffset
;
if
(
msg3_flag
==
1
)
{
if
(
msg3_flag
==
1
)
{
if
((
ibwp_start
<
abwp_start
)
||
(
ibwp_size
>
abwp_size
))
if
((
ibwp_start
<
abwp_start
)
||
(
ibwp_size
>
abwp_size
))
...
@@ -880,11 +880,10 @@ int main(int argc, char **argv)
...
@@ -880,11 +880,10 @@ int main(int argc, char **argv)
if
(
n_trials
==
1
)
if
(
n_trials
==
1
)
printf
(
"
\x1B
[31m""[frame %d][trial %d]
\t
number of errors in decoding = %u
\n
"
"
\x1B
[0m"
,
frame
,
trial
,
errors_decoding
);
printf
(
"
\x1B
[31m""[frame %d][trial %d]
\t
number of errors in decoding = %u
\n
"
"
\x1B
[0m"
,
frame
,
trial
,
errors_decoding
);
}
}
}
// trial loop
}
// trial loop
printf
(
"*****************************************
\n
"
);
printf
(
"*****************************************
\n
"
);
printf
(
"SNR %f: n_errors (negative CRC) = %d/%d, false_positive %d/%d, errors_scrambling %u/%
d
\n
"
,
SNR
,
n_errors
,
n_trials
,
n_false_positive
,
n_trials
,
errors_scrambling
,
available_bits
*
n_trials
);
printf
(
"SNR %f: n_errors (negative CRC) = %d/%d, false_positive %d/%d, errors_scrambling %u/%
u
\n
"
,
SNR
,
n_errors
,
n_trials
,
n_false_positive
,
n_trials
,
errors_scrambling
,
available_bits
*
n_trials
);
printf
(
"
\n
"
);
printf
(
"
\n
"
);
printf
(
"SNR %f: Channel BLER %e, Channel BER %e
\n
"
,
SNR
,(
double
)
n_errors
/
n_trials
,(
double
)
errors_scrambling
/
available_bits
/
n_trials
);
printf
(
"SNR %f: Channel BLER %e, Channel BER %e
\n
"
,
SNR
,(
double
)
n_errors
/
n_trials
,(
double
)
errors_scrambling
/
available_bits
/
n_trials
);
printf
(
"*****************************************
\n
"
);
printf
(
"*****************************************
\n
"
);
...
@@ -915,7 +914,6 @@ int main(int argc, char **argv)
...
@@ -915,7 +914,6 @@ int main(int argc, char **argv)
}
}
}
// SNR loop
}
// SNR loop
printf
(
"
\n
"
);
printf
(
"
\n
"
);
free
(
test_input_bit
);
free
(
test_input_bit
);
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
d474f4a1
...
@@ -1739,7 +1739,7 @@ uint8_t getRBGSize(uint16_t bwp_size, long rbg_size_config) {
...
@@ -1739,7 +1739,7 @@ uint8_t getRBGSize(uint16_t bwp_size, long rbg_size_config) {
if
(
bwp_size
<
37
)
return
(
rbg_size_config
?
4
:
2
);
if
(
bwp_size
<
37
)
return
(
rbg_size_config
?
4
:
2
);
if
(
bwp_size
<
73
)
return
(
rbg_size_config
?
8
:
4
);
if
(
bwp_size
<
73
)
return
(
rbg_size_config
?
8
:
4
);
if
(
bwp_size
<
145
)
return
(
rbg_size_config
?
16
:
8
);
if
(
bwp_size
<
145
)
return
(
rbg_size_config
?
16
:
8
);
if
(
bwp_size
<
276
)
return
16
;
else
return
16
;
}
}
uint8_t
getNRBG
(
uint16_t
bwp_size
,
uint16_t
bwp_start
,
long
rbg_size_config
)
{
uint8_t
getNRBG
(
uint16_t
bwp_size
,
uint16_t
bwp_start
,
long
rbg_size_config
)
{
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
d474f4a1
...
@@ -423,6 +423,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
...
@@ -423,6 +423,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
bwp
);
bwp
);
if
(
ret
<
0
)
{
if
(
ret
<
0
)
{
LOG_I
(
MAC
,
"CCE list not empty, couldn't schedule PDSCH
\n
"
);
LOG_I
(
MAC
,
"CCE list not empty, couldn't schedule PDSCH
\n
"
);
free
(
dci_pdu_rel15
);
return
(
0
);
return
(
0
);
}
}
...
@@ -463,6 +464,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
...
@@ -463,6 +464,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
pdsch_pdu_rel15
->
mcsIndex
[
0
],
pdsch_pdu_rel15
->
mcsIndex
[
0
],
TBS
);
TBS
);
free
(
dci_pdu_rel15
);
return
TBS
;
//Return TBS in bytes
return
TBS
;
//Return TBS in bytes
}
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
d474f4a1
...
@@ -800,7 +800,6 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
...
@@ -800,7 +800,6 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
int
bwp_id
)
{
int
bwp_id
)
{
uint8_t
fsize
=
0
,
pos
=
0
;
uint8_t
fsize
=
0
,
pos
=
0
;
uint8_t
nbits
=
0
;
for
(
int
d
=
0
;
d
<
pdcch_pdu_rel15
->
numDlDci
;
d
++
)
{
for
(
int
d
=
0
;
d
<
pdcch_pdu_rel15
->
numDlDci
;
d
++
)
{
...
...
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