Commit 0473074a authored by Robert Schmidt's avatar Robert Schmidt

fill_dci_pdu_rel15(): handle one DCI at a time

parent 0d90ecfd
...@@ -943,7 +943,15 @@ void nr_generate_Msg2(module_id_t module_idP, ...@@ -943,7 +943,15 @@ void nr_generate_Msg2(module_id_t module_idP,
pdcch_pdu_rel15->StartSymbolIndex, pdcch_pdu_rel15->StartSymbolIndex,
pdcch_pdu_rel15->DurationSymbols); pdcch_pdu_rel15->DurationSymbols);
fill_dci_pdu_rel15(scc,ra->secondaryCellGroup,pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types,dci10_bw,ra->bwp_id); // nr_configure_pdcch() increased numDlDci, so we use numDlDci - 1
fill_dci_pdu_rel15(scc,
ra->secondaryCellGroup,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
&dci_pdu_rel15[0],
dci_formats[0],
rnti_types[0],
dci10_bw,
ra->bwp_id);
dl_req->nPDUs+=2; dl_req->nPDUs+=2;
......
...@@ -418,13 +418,17 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -418,13 +418,17 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
gNB_mac->sched_ctrlCommon->aggregation_level, gNB_mac->sched_ctrlCommon->aggregation_level,
gNB_mac->sched_ctrlCommon->cce_index); gNB_mac->sched_ctrlCommon->cce_index);
int dci_formats[2]; int dci_format = NR_DL_DCI_FORMAT_1_0;
int rnti_types[2]; int rnti_type = NR_RNTI_SI;
dci_formats[0] = NR_DL_DCI_FORMAT_1_0; fill_dci_pdu_rel15(scc,
rnti_types[0] = NR_RNTI_SI; secondaryCellGroup,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pdsch_pdu_rel15->BWPSize,gNB_mac->sched_ctrlCommon->active_bwp->bwp_Id); dci_pdu_rel15,
dci_format,
rnti_type,
pdsch_pdu_rel15->BWPSize,
gNB_mac->sched_ctrlCommon->active_bwp->bwp_Id);
dl_req->nPDUs += 2; dl_req->nPDUs += 2;
...@@ -504,4 +508,4 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -504,4 +508,4 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
gNB_mac->TX_req[CC_id].SFN = frameP; gNB_mac->TX_req[CC_id].SFN = frameP;
gNB_mac->TX_req[CC_id].Slot = slotP; gNB_mac->TX_req[CC_id].Slot = slotP;
} }
} }
\ No newline at end of file
...@@ -769,15 +769,16 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -769,15 +769,16 @@ void nr_schedule_ue_spec(module_id_t module_id,
sched_ctrl->cce_index); sched_ctrl->cce_index);
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
/*const*/ int dci_format = f ? NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0; const int dci_format = f ? NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
int rnti_types[2] = { NR_RNTI_C, 0 }; const int rnti_type = NR_RNTI_C;
// nr_configure_pdcch() increased numDlDci, so we use numDlDci - 1
fill_dci_pdu_rel15(scc, fill_dci_pdu_rel15(scc,
UE_info->secondaryCellGroup[UE_id], UE_info->secondaryCellGroup[UE_id],
pdcch_pdu, &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci - 1],
dci_pdu, dci_pdu,
&dci_format, dci_format,
rnti_types, rnti_type,
pdsch_pdu->BWPSize, pdsch_pdu->BWPSize,
bwp->bwp_Id); bwp->bwp_Id);
......
...@@ -953,31 +953,35 @@ void prepare_dci(const NR_CellGroupConfig_t *secondaryCellGroup, ...@@ -953,31 +953,35 @@ void prepare_dci(const NR_CellGroupConfig_t *secondaryCellGroup,
} }
void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc, void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
NR_CellGroupConfig_t *secondaryCellGroup, const NR_CellGroupConfig_t *secondaryCellGroup,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, nfapi_nr_dl_dci_pdu_t *pdcch_dci_pdu,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
int *dci_formats, int dci_format,
int *rnti_types, int rnti_type,
int N_RB, int N_RB,
int bwp_id) { int bwp_id) {
uint8_t fsize=0, pos=0; uint8_t fsize=0, pos=0;
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) { uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
int dci_size = nr_dci_size(scc,
secondaryCellGroup,
dci_pdu_rel15,
dci_format,
rnti_type,
N_RB,
bwp_id);
pdcch_dci_pdu->PayloadSizeBits = dci_size;
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
uint64_t *dci_pdu = (uint64_t *)pdcch_pdu_rel15->dci_pdu[d].Payload; if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
int dci_size = nr_dci_size(scc,secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],rnti_types[d],N_RB,bwp_id); prepare_dci(secondaryCellGroup, dci_pdu_rel15, dci_format, bwp_id);
pdcch_pdu_rel15->dci_pdu[d].PayloadSizeBits = dci_size;
AssertFatal(pdcch_pdu_rel15->dci_pdu[d].PayloadSizeBits<=64, "DCI sizes above 64 bits not yet supported");
if(dci_formats[d]==NR_DL_DCI_FORMAT_1_1 || dci_formats[d]==NR_UL_DCI_FORMAT_0_1)
prepare_dci(secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],bwp_id);
/// Payload generation /// Payload generation
switch(dci_formats[d]) { switch(dci_format) {
case NR_DL_DCI_FORMAT_1_0: case NR_DL_DCI_FORMAT_1_0:
switch(rnti_types[d]) { switch(rnti_type) {
case NR_RNTI_RA: case NR_RNTI_RA:
// Freq domain assignment // Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
...@@ -1216,7 +1220,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc, ...@@ -1216,7 +1220,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
break; break;
case NR_UL_DCI_FORMAT_0_0: case NR_UL_DCI_FORMAT_0_0:
switch(rnti_types[d]) switch(rnti_type)
{ {
case NR_RNTI_C: case NR_RNTI_C:
// indicating a DL DCI format 1bit // indicating a DL DCI format 1bit
...@@ -1302,7 +1306,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc, ...@@ -1302,7 +1306,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
break; break;
case NR_UL_DCI_FORMAT_0_1: case NR_UL_DCI_FORMAT_0_1:
switch(rnti_types[d]) switch(rnti_type)
{ {
case NR_RNTI_C: case NR_RNTI_C:
// Indicating a DL DCI format 1bit // Indicating a DL DCI format 1bit
...@@ -1512,8 +1516,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc, ...@@ -1512,8 +1516,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
pos+=1; pos+=1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization.val&0x1)<<(dci_size-pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization.val&0x1)<<(dci_size-pos);
} }
LOG_D(MAC, "DCI index %d has %d bits and the payload is %lx\n", d, dci_size, *dci_pdu); LOG_D(MAC, "DCI has %d bits and the payload is %lx\n", dci_size, *dci_pdu);
}
} }
......
...@@ -821,10 +821,10 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -821,10 +821,10 @@ void nr_schedule_ulsch(module_id_t module_id,
sched_ctrl->active_bwp->bwp_Id); sched_ctrl->active_bwp->bwp_Id);
fill_dci_pdu_rel15(scc, fill_dci_pdu_rel15(scc,
secondaryCellGroup, secondaryCellGroup,
pdcch_pdu_rel15, &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
dci_pdu_rel15, dci_pdu_rel15,
&ps->dci_format, ps->dci_format,
rnti_types, rnti_types[0],
pusch_pdu->bwp_size, pusch_pdu->bwp_size,
sched_ctrl->active_bwp->bwp_Id); sched_ctrl->active_bwp->bwp_Id);
......
...@@ -251,12 +251,12 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac, ...@@ -251,12 +251,12 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
uint8_t aggregation_level, uint8_t aggregation_level,
int CCEIndex); int CCEIndex);
void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc, void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
NR_CellGroupConfig_t *secondaryCellGroup, const NR_CellGroupConfig_t *secondaryCellGroup,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, nfapi_nr_dl_dci_pdu_t *pdcch_dci_pdu,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
int *dci_formats, int dci_formats,
int *rnti_types, int rnti_types,
int N_RB, int N_RB,
int bwp_id); int bwp_id);
......
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