Commit 14364709 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/NR_Msg3_dcch_dtch_reworking' into integration_2023_w10b

parents 3e3dd40c 799d0b3a
...@@ -730,7 +730,7 @@ int main(int argc, char **argv) ...@@ -730,7 +730,7 @@ int main(int argc, char **argv)
N_RB_DL = gNB->frame_parms.N_RB_DL; N_RB_DL = gNB->frame_parms.N_RB_DL;
NR_UE_info_t *UE_info = RC.nrmac[0]->UE_info.list[0]; NR_UE_info_t *UE_info = RC.nrmac[0]->UE_info.list[0];
configure_UE_BWP(RC.nrmac[0], scc, &UE_info->UE_sched_ctrl, NULL, UE_info); configure_UE_BWP(RC.nrmac[0], scc, &UE_info->UE_sched_ctrl, NULL, UE_info, -1, -1);
// stub to configure frame_parms // stub to configure frame_parms
// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions); // nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
......
...@@ -540,7 +540,6 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac, ...@@ -540,7 +540,6 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac,
for (int n = 0; n < NR_NB_RA_PROC_MAX; n++) { for (int n = 0; n < NR_NB_RA_PROC_MAX; n++) {
NR_RA_t *ra = &cc->ra[n]; NR_RA_t *ra = &cc->ra[n];
ra->cfra = false; ra->cfra = false;
ra->msg3_dcch_dtch = false;
ra->rnti = 0; ra->rnti = 0;
ra->preambles.num_preambles = MAX_NUM_NR_PRACH_PREAMBLES; ra->preambles.num_preambles = MAX_NUM_NR_PRACH_PREAMBLES;
ra->preambles.preamble_list = malloc(MAX_NUM_NR_PRACH_PREAMBLES * sizeof(*ra->preambles.preamble_list)); ra->preambles.preamble_list = malloc(MAX_NUM_NR_PRACH_PREAMBLES * sizeof(*ra->preambles.preamble_list));
...@@ -630,7 +629,6 @@ bool nr_mac_prepare_ra_nsa_ue(gNB_MAC_INST *nrmac, uint32_t rnti, NR_CellGroupCo ...@@ -630,7 +629,6 @@ bool nr_mac_prepare_ra_nsa_ue(gNB_MAC_INST *nrmac, uint32_t rnti, NR_CellGroupCo
} }
} }
} }
ra->msg3_dcch_dtch = false;
LOG_I(NR_MAC,"Added new RA process for UE RNTI %04x with initial CellGroup\n", rnti); LOG_I(NR_MAC,"Added new RA process for UE RNTI %04x with initial CellGroup\n", rnti);
return true; return true;
} }
......
...@@ -2021,8 +2021,10 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2021,8 +2021,10 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_UE_sched_ctrl_t *sched_ctrl, NR_UE_sched_ctrl_t *sched_ctrl,
NR_RA_t *ra, NR_RA_t *ra,
NR_UE_info_t *UE) { NR_UE_info_t *UE,
int dl_bwp_switch,
int ul_bwp_switch)
{
AssertFatal((ra != NULL && UE == NULL) || (ra == NULL && UE != NULL), "RA and UE structures are mutually exlusive in BWP configuration\n"); AssertFatal((ra != NULL && UE == NULL) || (ra == NULL && UE != NULL), "RA and UE structures are mutually exlusive in BWP configuration\n");
NR_CellGroupConfig_t *CellGroup; NR_CellGroupConfig_t *CellGroup;
...@@ -2067,23 +2069,10 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2067,23 +2069,10 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
if(UE && UE->Msg3_dcch_dtch) { if(dl_bwp_switch >= 0 && ul_bwp_switch >= 0) {
// switching to initial BWP AssertFatal(dl_bwp_switch == ul_bwp_switch, "Different UL and DL BWP not supported\n");
DL_BWP->bwp_id = 0; DL_BWP->bwp_id = dl_bwp_switch;
UL_BWP->bwp_id = 0; UL_BWP->bwp_id = ul_bwp_switch;
UE->Msg3_dcch_dtch = false;
// Schedule BWP switching to the first active BWP (previous active BWP before RA with Msg3 carrying DCCH or DTCH message)
if (servingCellConfig->firstActiveDownlinkBWP_Id) {
sched_ctrl->next_dl_bwp_id = *servingCellConfig->firstActiveDownlinkBWP_Id;
} else {
sched_ctrl->next_dl_bwp_id = 0;
}
if (servingCellConfig->uplinkConfig->firstActiveUplinkBWP_Id) {
sched_ctrl->next_ul_bwp_id = *servingCellConfig->uplinkConfig->firstActiveUplinkBWP_Id;
} else {
sched_ctrl->next_ul_bwp_id = 0;
}
} }
else { else {
// (re)configuring BWP // (re)configuring BWP
...@@ -2335,7 +2324,7 @@ NR_UE_info_t *add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConf ...@@ -2335,7 +2324,7 @@ NR_UE_info_t *add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConf
memset(dl_bwp, 0, sizeof(*dl_bwp)); memset(dl_bwp, 0, sizeof(*dl_bwp));
NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
memset(ul_bwp, 0, sizeof(*ul_bwp)); memset(ul_bwp, 0, sizeof(*ul_bwp));
configure_UE_BWP(nr_mac, scc, sched_ctrl, NULL, UE); configure_UE_BWP(nr_mac, scc, sched_ctrl, NULL, UE, -1, -1);
/* set illegal time domain allocation to force recomputation of all fields */ /* set illegal time domain allocation to force recomputation of all fields */
sched_ctrl->sched_pdsch.time_domain_allocation = -1; sched_ctrl->sched_pdsch.time_domain_allocation = -1;
...@@ -2811,7 +2800,7 @@ void nr_mac_update_timers(module_id_t module_id, ...@@ -2811,7 +2800,7 @@ void nr_mac_update_timers(module_id_t module_id,
process_CellGroup(cg,&UE->UE_sched_ctrl); process_CellGroup(cg,&UE->UE_sched_ctrl);
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
configure_UE_BWP(RC.nrmac[module_id], scc, sched_ctrl, NULL, UE); configure_UE_BWP(RC.nrmac[module_id], scc, sched_ctrl, NULL, UE, -1, -1);
if (get_softmodem_params()->sa) { if (get_softmodem_params()->sa) {
// add all available DL HARQ processes for this UE in SA // add all available DL HARQ processes for this UE in SA
......
...@@ -227,7 +227,7 @@ int nr_process_mac_pdu(instance_t module_idP, ...@@ -227,7 +227,7 @@ int nr_process_mac_pdu(instance_t module_idP,
NR_RA_t *ra = &RC.nrmac[module_idP]->common_channels[CC_id].ra[i]; NR_RA_t *ra = &RC.nrmac[module_idP]->common_channels[CC_id].ra[i];
if (ra->state >= WAIT_Msg3 && ra->rnti == UE->rnti) { if (ra->state >= WAIT_Msg3 && ra->rnti == UE->rnti) {
ra->crnti = ((pduP[1]&0xFF)<<8)|(pduP[2]&0xFF); ra->crnti = ((pduP[1]&0xFF)<<8)|(pduP[2]&0xFF);
ra->msg3_dcch_dtch = true; ra->state = Msg3_dcch_dtch;
LOG_I(NR_MAC, "Received UL_SCH_LCID_C_RNTI with C-RNTI 0x%04x\n", ra->crnti); LOG_I(NR_MAC, "Received UL_SCH_LCID_C_RNTI with C-RNTI 0x%04x\n", ra->crnti);
break; break;
} }
...@@ -755,9 +755,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -755,9 +755,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
// harq_pid set a non valid value because it is not used in this call // harq_pid set a non valid value because it is not used in this call
// the function is only called to decode the contention resolution sub-header // the function is only called to decode the contention resolution sub-header
if (nr_process_mac_pdu(gnb_mod_idP, UE, CC_idP, frameP, slotP, sduP, sdu_lenP, -1) == 0) { if (nr_process_mac_pdu(gnb_mod_idP, UE, CC_idP, frameP, slotP, sduP, sdu_lenP, -1) == 0) {
ra->state = Msg4;
if (ra->msg3_dcch_dtch) { if (ra->state == Msg3_dcch_dtch) {
// Check if the UE identified by C-RNTI still exists at the gNB // Check if the UE identified by C-RNTI still exists at the gNB
NR_UE_info_t * UE_C = find_nr_UE(&gNB_mac->UE_info, ra->crnti); NR_UE_info_t * UE_C = find_nr_UE(&gNB_mac->UE_info, ra->crnti);
if (!UE_C) { if (!UE_C) {
...@@ -775,13 +774,18 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -775,13 +774,18 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
reset_dl_harq_list(&UE_C->UE_sched_ctrl); reset_dl_harq_list(&UE_C->UE_sched_ctrl);
reset_ul_harq_list(&UE_C->UE_sched_ctrl); reset_ul_harq_list(&UE_C->UE_sched_ctrl);
} }
LOG_I(NR_MAC, "Activating scheduling response to MSG3 with DCCH/DTCCH and RNTI 0x%04x (state %d)\n",
ra->crnti, ra->state);
}
else {
LOG_I(NR_MAC, "Activating scheduling RA-Msg4 for TC_RNTI 0x%04x (state %d)\n",
ra->rnti, ra->state);
ra->state = Msg4;
} }
LOG_I(NR_MAC, "Activating scheduling RA-Msg4 for TC_RNTI 0x%04x (state %d)\n",
(ra->msg3_dcch_dtch?ra->crnti:ra->rnti), ra->state);
} }
else { else {
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti); nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra); nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
} }
} }
return; return;
......
...@@ -342,7 +342,9 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -342,7 +342,9 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_UE_sched_ctrl_t *sched_ctrl, NR_UE_sched_ctrl_t *sched_ctrl,
NR_RA_t *ra, NR_RA_t *ra,
NR_UE_info_t *UE); NR_UE_info_t *UE,
int dl_bwp_switch,
int ul_bwp_switch);
NR_UE_info_t* add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConfig_t *CellGroup); NR_UE_info_t* add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConfig_t *CellGroup);
...@@ -370,6 +372,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -370,6 +372,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra); void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra);
void nr_generate_Msg3_dcch_dtch_response(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra);
int binomial(int n, int k); int binomial(int n, int k);
bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot); bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot);
......
...@@ -96,8 +96,9 @@ typedef enum { ...@@ -96,8 +96,9 @@ typedef enum {
Msg2 = 1, Msg2 = 1,
WAIT_Msg3 = 2, WAIT_Msg3 = 2,
Msg3_retransmission = 3, Msg3_retransmission = 3,
Msg4 = 4, Msg3_dcch_dtch = 4,
WAIT_Msg4_ACK = 5 Msg4 = 5,
WAIT_Msg4_ACK = 6
} RA_gNB_state_t; } RA_gNB_state_t;
typedef struct NR_preamble_ue { typedef struct NR_preamble_ue {
...@@ -165,8 +166,6 @@ typedef struct { ...@@ -165,8 +166,6 @@ typedef struct {
uint8_t msg3_cqireq; uint8_t msg3_cqireq;
/// Round of Msg3 HARQ /// Round of Msg3 HARQ
uint8_t msg3_round; uint8_t msg3_round;
/// Flag to indicate if Msg3 carries a DCCH or DTCH message
bool msg3_dcch_dtch;
int msg3_startsymb; int msg3_startsymb;
int msg3_nrsymb; int msg3_nrsymb;
/// TBS used for Msg4 /// TBS used for Msg4
...@@ -661,7 +660,6 @@ typedef struct { ...@@ -661,7 +660,6 @@ typedef struct {
asn_enc_rval_t enc_rval; asn_enc_rval_t enc_rval;
// UE selected beam index // UE selected beam index
uint8_t UE_beam_index; uint8_t UE_beam_index;
bool Msg3_dcch_dtch;
bool Msg4_ACKed; bool Msg4_ACKed;
uint32_t ra_timer; uint32_t ra_timer;
float ul_thr_ue; float ul_thr_ue;
......
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