Commit 18d996eb authored by sharma's avatar sharma

addition of UL scheduler for eMTC

parent 3a2f4c79
......@@ -2583,6 +2583,155 @@ fill_dci0 (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, DCI_ALLOC_t * dci_alloc,
}
}
#ifdef Rel14
void
fill_mpdcch_dci0 (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t * dci_alloc, nfapi_hi_dci0_mpdcch_dci_pdu * pdu)
{
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
nfapi_hi_dci0_mpdcch_dci_pdu_rel13_t *rel13 = &pdu->mpdcch_dci_pdu_rel13;
uint32_t cqi_req = rel13->csi_request;
uint32_t dai = rel13->dl_assignment_index;
uint32_t TPC = rel13->tpc;
uint32_t mcs = rel13->mcs;
uint32_t hopping = rel13->frequency_hopping_flag;
uint32_t rballoc = computeRIV (6,
rel13->resource_block_start,
rel13->number_of_resource_blocks);
uint32_t ndi = rel13->new_data_indication;
#ifdef T_TRACER
T (T_ENB_PHY_ULSCH_UE_DCI, T_INT (eNB->Mod_id), T_INT (proc->frame_tx), T_INT (proc->subframe_tx),
T_INT (rel13->rnti), T_INT (((proc->frame_tx * 10 + proc->subframe_tx + 4) % 8) /* TODO: correct harq pid */ ),
T_INT (mcs), T_INT (-1 /* TODO: remove round? */ ),
T_INT (rel13->resource_block_start),
T_INT (rel13->number_of_resource_blocks),
T_INT (get_TBS_UL (mcs, rel13->number_of_resource_blocks) * 8), T_INT (rel13->aggregation_level), T_INT (rel13->cce_index));
#endif
void *dci_pdu = (void *) dci_alloc->dci_pdu;
AssertFatal(rel13->ce_mode == 1 && rel13->dci_format == 4, "dci format 5 (CE_modeB) not supported yet\n");
LOG_D (PHY, "Filling DCI6-0A with cqi %d, mcs %d, hopping %d, rballoc %x (%d,%d) ndi %d TPC %d\n", cqi_req,
mcs, hopping, rballoc, rel13->resource_block_start, rel13->number_of_resource_blocks, ndi, TPC);
dci_alloc->format = format6_0A;
dci_alloc->firstCCE = rel13->ecce_index;
dci_alloc->L = rel13->aggreagation_level;
dci_alloc->rnti = rel13->rnti;
dci_alloc->harq_pid = rel13->harq_process;
dci_alloc->narrowband = rel13->mpdcch_narrowband;
dci_alloc->number_of_prb_pairs = rel13->number_of_prb_pairs;
dci_alloc->resource_block_assignment = rel13->resource_block_assignment;
dci_alloc->transmission_type = rel13->mpdcch_transmission_type;
dci_alloc->start_symbol = rel13->start_symbol;
dci_alloc->ce_mode = rel13->ce_mode;
dci_alloc->dmrs_scrambling_init = rel13->drms_scrambling_init;
dci_alloc->i0 = rel13->initial_transmission_sf_io;
switch (frame_parms->N_RB_DL) {
case 6:
if (frame_parms->frame_type == TDD) {
AssertFatal(1==0,"TDD not supported for eMTC yet\n");
} else {
AssertFatal(1==0,"6 PRBS not supported for eMTC\n");
}
break;
case 25:
if (frame_parms->frame_type == TDD) {
AssertFatal(1==0,"TDD not supported for eMTC yet\n");
} else {
dci_alloc->dci_length = sizeof_DCI6_0A_5MHz_t;
((DCI6_0A_10MHz_t *) dci_pdu)->type = 0;
((DCI6_0A_10MHz_t *) dci_pdu)->hopping = hopping;
((DCI6_0A_10MHz_t *) dci_pdu)->rballoc = rballoc;
((DCI6_0A_10MHz_t *) dci_pdu)->mcs = mcs;
((DCI6_0A_10MHz_t *) dci_pdu)->rep = rel13->pusch_repetition_levels;
((DCI6_0A_10MHz_t *) dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_0A_10MHz_t *) dci_pdu)->ndi = ndi;
((DCI6_0A_10MHz_t *) dci_pdu)->rv_idx = rel13->redudency_version;
((DCI6_0A_10MHz_t *) dci_pdu)->TPC = TPC;
((DCI6_0A_10MHz_t *) dci_pdu)->csi_req = cqi_req;
((DCI6_0A_10MHz_t *) dci_pdu)->srs_req = rel13->srs_request;
((DCI6_0A_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number;
}
break;
case 50:
if (frame_parms->frame_type == TDD) {
AssertFatal(1==0,"TDD not supported for eMTC yet\n");
} else {
dci_alloc->dci_length = sizeof_DCI6_0A_10MHz_t;
((DCI6_0A_10MHz_t *) dci_pdu)->type = 0;
((DCI6_0A_10MHz_t *) dci_pdu)->hopping = hopping;
((DCI6_0A_10MHz_t *) dci_pdu)->rballoc = rballoc;
((DCI6_0A_10MHz_t *) dci_pdu)->mcs = mcs;
((DCI6_0A_10MHz_t *) dci_pdu)->rep = rel13->pusch_repetition_levels;
((DCI6_0A_10MHz_t *) dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_0A_10MHz_t *) dci_pdu)->ndi = ndi;
((DCI6_0A_10MHz_t *) dci_pdu)->rv_idx = rel13->redudency_version;
((DCI6_0A_10MHz_t *) dci_pdu)->TPC = TPC;
((DCI6_0A_10MHz_t *) dci_pdu)->csi_req = cqi_req;
((DCI6_0A_10MHz_t *) dci_pdu)->srs_req = rel13->srs_request;
((DCI6_0A_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number;
LOG_I(PHY,"Frame %d, Subframe %d : Programming Format 6-0A DCI, type %d, hopping %d, narrowband %d, rballoc %x, mcs %d, rep %d, harq_pid %d, ndi %d, rv %d, TPC %d, csi_req %d, srs_req %d, dci_rep r%d => %x\n",
proc->frame_tx,proc->subframe_tx,
((DCI6_0A_10MHz_t *) dci_pdu)->type,
((DCI6_0A_10MHz_t *) dci_pdu)->hopping,
((DCI6_0A_10MHz_t *) dci_pdu)->narrowband,
((DCI6_0A_10MHz_t *) dci_pdu)->rballoc,
((DCI6_0A_10MHz_t *) dci_pdu)->mcs,
((DCI6_0A_10MHz_t *) dci_pdu)->rep,
((DCI6_0A_10MHz_t *) dci_pdu)->harq_pid,
((DCI6_0A_10MHz_t *) dci_pdu)->ndi,
((DCI6_0A_10MHz_t *) dci_pdu)->rv_idx,
((DCI6_0A_10MHz_t *) dci_pdu)->TPC,
((DCI6_0A_10MHz_t *) dci_pdu)->csi_req,
((DCI6_0A_10MHz_t *) dci_pdu)->srs_req,
((DCI6_0A_10MHz_t *) dci_pdu)->dci_rep,
((uint32_t*)dci_pdu)[0]);
}
break;
case 100:
if (frame_parms->frame_type == TDD) {
AssertFatal(1==0,"TDD not supported for eMTC yet\n");
} else {
dci_alloc->dci_length = sizeof_DCI6_0A_20MHz_t;
((DCI6_0A_20MHz_t *) dci_pdu)->type = 0;
((DCI6_0A_20MHz_t *) dci_pdu)->hopping = hopping;
((DCI6_0A_20MHz_t *) dci_pdu)->rballoc = rballoc;
((DCI6_0A_20MHz_t *) dci_pdu)->mcs = rel13->mcs;
((DCI6_0A_20MHz_t *) dci_pdu)->rep = rel13->pusch_repetition_levels;
((DCI6_0A_20MHz_t *) dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_0A_20MHz_t *) dci_pdu)->ndi = ndi;
((DCI6_0A_20MHz_t *) dci_pdu)->rv_idx = rel13->redudency_version;
((DCI6_0A_20MHz_t *) dci_pdu)->TPC = TPC;
((DCI6_0A_20MHz_t *) dci_pdu)->csi_req = cqi_req;
((DCI6_0A_20MHz_t *) dci_pdu)->srs_req = rel13->srs_request;
((DCI6_0A_20MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number;
}
//printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc);
break;
default:
LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
}
#endif
void
fill_ulsch (PHY_VARS_eNB * eNB, nfapi_ul_config_ulsch_pdu * ulsch_pdu, int frame, int subframe)
{
......
......@@ -339,7 +339,7 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
AssertFatal(absSF < 10240, "Absolute subframe %d = %d*10 + %d > 10239\n", absSF, frame, subframe);
mpdcch_scrambling(fp, mdci, absSF, mpdcch->e, coded_bits);
// Modulation for PDCCH
if (fp->nb_antenna_ports_eNB == 1)
gain_lin_QPSK = (int16_t) ((amp * ONE_OVER_SQRT2_Q15) >> 15);
......@@ -388,15 +388,14 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
((int16_t *) & yIQ)[1] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
e_ptr++;
txF[mpdcchtab[i]] = yIQ;
/*
LOG_D(PHY,"Frame %d, subframe %d: mpdcch pos %d (%d,%d) => (%d,%d)\n",
/*
LOG_I(PHY,"Frame %d, subframe %d: mpdcch pos %d (%d,%d) => (%d,%d)\n",
frame,subframe,i,mpdcchtab[i]+re_offset,mpdcchtab[i]/fp->ofdm_symbol_size,
((int16_t *) & yIQ)[0],((int16_t *) & yIQ)[1]);*/
}
if (mdci->transmission_type == 1) w=0; // distributed
else w = wp[a_index&1];
// pilot scrambling initiatlization (note: this is for a single repetition)
// x1 is set in lte_gold_generic
......
......@@ -89,7 +89,9 @@ struct DCI6_1A_5MHz {
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:4;
/// Resource block assignment (assignment flag = 0 for 5 MHz, ceil(log2(floor(N_RB_DL/6)))+5)
uint32_t rballoc:7;
uint32_t rballoc:5;
/// narroband index log2(floor(N_RB_DL/6))) bits
uint32_t narrowband:2;
/// Frequency hopping flag
uint32_t hopping:1;
/// 0/1A differentiator
......@@ -122,7 +124,9 @@ struct DCI6_0A_10MHz {
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:4;
/// RB Assignment (ceil(log2(floor(N_RB_UL/6))) + 5 bits)
uint32_t rballoc:8;
uint32_t rballoc:5;
/// narroband index log2(floor(N_RB_DL/6))) bits
uint32_t narrowband:3;
/// Hopping flag
uint32_t hopping:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
......@@ -190,7 +194,9 @@ struct DCI6_0A_20MHz {
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:4;
/// RB Assignment (ceil(log2(floor(N_RB_UL/6))) + 5 bits)
uint32_t rballoc:9;
uint32_t rballoc:5;
/// narroband index log2(floor(N_RB_DL/6))) bits
uint32_t narrowband:4;
/// Hopping flag
uint32_t hopping:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
......@@ -223,7 +229,9 @@ struct DCI6_1A_20MHz {
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:4;
/// Resource block assignment (assignment flag = 0 for 20 MHz, ceil(log2(floor(N_RB_DL/6)))+5)
uint32_t rballoc:9;
uint32_t rballoc:5;
/// narroband index log2(floor(N_RB_DL/6))) bits
uint32_t narrowband:4;
/// Frequency hopping flag
uint32_t hopping:1;
/// 0/1A differentiator
......
......@@ -2103,7 +2103,11 @@ uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
uint8_t *payload,
int frame,
uint8_t subframe,
uint8_t pucch1_thres);
uint8_t pucch1_thres
#ifdef Rel14
,uint8_t br_flag
);
#endif
int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB,
eNB_rxtx_proc_t *proc,
......
......@@ -1793,7 +1793,11 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
uint8_t *payload,
int frame,
uint8_t subframe,
uint8_t pucch1_thres)
uint8_t pucch1_thres
#ifdef Rel14
,uint8_t br_flag
#endif
)
{
......@@ -2057,14 +2061,25 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
//for (j=0,l=0;l<(nsymb-1);l++) {
for (j=0,l=0; l<nsymb; l++) {
if ((l<(nsymb>>1)) && ((m&1) == 0))
re_offset = (m*6) + frame_parms->first_carrier_offset;
else if ((l<(nsymb>>1)) && ((m&1) == 1))
re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
else if ((m&1) == 0)
re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
#ifdef Rel14
if (br_flag > 0 ) {
if ((m&1) == 0)
re_offset = (m*6) + frame_parms->first_carrier_offset;
else
re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
}
else
re_offset = ((m-1)*6) + frame_parms->first_carrier_offset;
#endif
{
if ((l<(nsymb>>1)) && ((m&1) == 0))
re_offset = (m*6) + frame_parms->first_carrier_offset;
else if ((l<(nsymb>>1)) && ((m&1) == 1))
re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
else if ((m&1) == 0)
re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
else
re_offset = ((m-1)*6) + frame_parms->first_carrier_offset;
}
if (re_offset > frame_parms->ofdm_symbol_size)
re_offset -= (frame_parms->ofdm_symbol_size);
......@@ -2159,9 +2174,9 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
printf("[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max);
#endif
#ifdef DEBUG_PUCCH_RX
LOG_D(PHY,"[eNB] PUCCH fmt1: stat_max : %d, sigma2_dB %d (%d, %d), phase_max : %d\n",dB_fixed(stat_max),sigma2_dB,eNB->measurements.n0_subband_power_tot_dBm[6],pucch1_thres,phase_max);
#endif
//#ifdef DEBUG_PUCCH_RX
LOG_I(PHY,"[eNB] PUCCH fmt1: stat_max : %d, sigma2_dB %d (%d, %d), phase_max : %d\n",dB_fixed(stat_max),sigma2_dB,eNB->measurements.n0_subband_power_tot_dBm[6],pucch1_thres,phase_max);
//#endif
eNB->pucch1_stats[UE_id][(subframe<<10)+eNB->pucch1_stats_cnt[UE_id][subframe]] = stat_max;
......@@ -2368,7 +2383,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
#endif
}
#ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH subframe %d chest1[%d][%d] => (%d,%d)\n",subframe,aa,re,
......@@ -2416,9 +2431,10 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
} // aa
LOG_D(PHY,"PUCCH 1a/b: subframe %d : stat %d,%d (pos %d)\n",subframe,stat_re,stat_im,
LOG_I(PHY,"PUCCH 1a/b: SFN.SF %d.%d : stat %d,%d (pos %d)\n",
frame,subframe,stat_re,stat_im,
(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe]));
LOG_D(PHY,"PUCCH 1a/b: subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
LOG_D(PHY,"PUCCH 1a/b: SFN.SF %d.%d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",frame,subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
eNB->pucch1ab_stats[UE_id][(subframe<<11) + 2*(eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_re);
eNB->pucch1ab_stats[UE_id][(subframe<<11) + 1+2*(eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_im);
......@@ -2432,7 +2448,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
if (fmt==pucch_format1b)
*(1+payload) = (stat_im<0) ? 1 : 2;
} else { // insufficient energy on PUCCH so NAK
LOG_I(PHY,"PUCCH 1a/b: subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
LOG_D(PHY,"PUCCH 1a/b: subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
*payload = 4; // DTX
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re);
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im);
......
......@@ -74,6 +74,15 @@ void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
fill_dci0(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci], &hi_dci0_config_pdu->dci_pdu);
}
void handle_nfapi_hi_dci0_mpdcch_dci_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu)
{
int idx = proc->subframe_tx&1;
LTE_eNB_PDCCH *pdcch_vars = &eNB->mpdcch_vars[idx];
// copy dci configuration in to eNB structure
fill_mpdcch_dci0(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci], &hi_dci0_config_pdu->dci_pdu);
}
void handle_nfapi_hi_dci0_hi_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu)
{
......@@ -244,13 +253,13 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
AssertFatal(sdu!=NULL,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d\n",
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index);
if (rel8->rnti != 0xFFFF) LOG_I(PHY,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d\n",
if (rel8->rnti != 0xFFFF) LOG_D(PHY,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d\n",
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid);
if (codeword_index == 0) dlsch0_harq->pdu = sdu;
else dlsch1_harq->pdu = sdu;
}
else {
if (rel8->rnti != 0xFFFF) LOG_I(PHY,"NFAPI: frame %d, subframe %d: programming dlsch for round %d, rnti %x, UE_id %d, harq_pid %d\n",
if (rel8->rnti != 0xFFFF) LOG_D(PHY,"NFAPI: frame %d, subframe %d: programming dlsch for round %d, rnti %x, UE_id %d, harq_pid %d\n",
proc->frame_tx,proc->subframe_tx,dlsch0_harq->round,
rel8->rnti,UE_id,harq_pid);
}
......@@ -436,7 +445,11 @@ void handle_uci_sr_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_pdu_t
uci->n_pucch_1_0_sr[0] = ul_config_pdu->uci_sr_pdu.sr_information.sr_information_rel8.pucch_index;
uci->srs_active = srs_active;
uci->active = 1;
#ifdef Rel14
uci->ue_type = ul_config_pdu->uci_sr_pdu.ue_information.ue_information_rel13.ue_type;
uci->empty_symbols = ul_config_pdu->uci_sr_pdu.ue_information.ue_information_rel13.empty_symbols;
uci->total_repetitions = ul_config_pdu->uci_sr_pdu.ue_information.ue_information_rel13.total_number_of_repetitions;
#endif
LOG_D(PHY,"Programming UCI SR rnti %x, pucch1_0 %d for (%d,%d)\n",
uci->rnti,uci->n_pucch_1_0_sr[0],frame,subframe);
}
......@@ -454,7 +467,11 @@ void handle_uci_sr_harq_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_
uci->n_pucch_1_0_sr[0] = ul_config_pdu->uci_sr_harq_pdu.sr_information.sr_information_rel8.pucch_index;
uci->srs_active = srs_active;
uci->active = 1;
#ifdef Rel14
uci->ue_type = ul_config_pdu->uci_sr_harq_pdu.ue_information.ue_information_rel13.ue_type;
uci->empty_symbols = ul_config_pdu->uci_sr_harq_pdu.ue_information.ue_information_rel13.empty_symbols;
uci->total_repetitions = ul_config_pdu->uci_sr_harq_pdu.ue_information.ue_information_rel13.total_number_of_repetitions;
#endif
handle_uci_harq_information(eNB,uci,&ul_config_pdu->uci_sr_harq_pdu.harq_information);
}
......@@ -469,7 +486,11 @@ void handle_uci_harq_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_pdu
uci->type = HARQ;
uci->srs_active = srs_active;
uci->num_antenna_ports = ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel11.num_ant_ports;
#ifdef Rel14
uci->ue_type = ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.ue_type;
uci->empty_symbols = ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.empty_symbols;
uci->total_repetitions = ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.total_number_of_repetitions;
#endif
handle_uci_harq_information(eNB,uci,&ul_config_pdu->uci_harq_pdu.harq_information);
uci->active=1;
......@@ -511,7 +532,7 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
if (ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE) {
AssertFatal((UE_id = find_ulsch(ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
"No existing UE ULSCH for rnti %x\n",rel8->rnti);
LOG_D(PHY,"Applying UL config for UE %d, rnti %x for frame %d, subframe %d\n",
LOG_I(PHY,"Applying UL config for UE %d, rnti %x for frame %d, subframe %d\n",
UE_id,rel8->rnti,frame,subframe);
fill_ulsch(eNB,&ul_config_pdu->ulsch_pdu,frame,subframe);
......@@ -547,6 +568,9 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
AssertFatal((UE_id = find_uci(ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.rnti,
proc->frame_tx,proc->subframe_tx,eNB,SEARCH_EXIST_OR_FREE))>=0,
"No available UE UCI for rnti %x\n",ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.rnti);
LOG_I(PHY,"Applying UL UCI_HARQ config for UE %d, rnti %x for frame %d, subframe %d\n",
UE_id,ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.rnti,frame,subframe);
handle_uci_harq_pdu(eNB,UE_id,ul_config_pdu,frame,subframe,srs_present);
}
else if (ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE) {
......@@ -720,6 +744,11 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
eNB->pdcch_vars[subframe&1].num_dci++;
break;
case NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE:
handle_nfapi_hi_dci0_mpdcch_dci_pdu(eNB,proc,hi_dci0_req_pdu);
eNB->mpdcch_vars[subframe&1].num_dci++;
break;
case NFAPI_HI_DCI0_HI_PDU_TYPE:
handle_nfapi_hi_dci0_hi_pdu(eNB,proc,hi_dci0_req_pdu);
......
......@@ -688,8 +688,12 @@ uci_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
metric_SR = rx_pucch (eNB, uci->pucch_fmt, i, uci->n_pucch_1_0_sr[0], 0, // n2_pucch
uci->srs_active, // shortened format
&SR_payload, frame, subframe, PUCCH1_THRES);
LOG_D (PHY, "[eNB %d][SR %x] Frame %d subframe %d Checking SR is %d (SR n1pucch is %d)\n", eNB->Mod_id, uci->rnti, frame, subframe, SR_payload, uci->n_pucch_1_0_sr[0]);
&SR_payload, frame, subframe, PUCCH1_THRES
#ifdef Rel14
,uci->ue_type
#endif
);
LOG_I (PHY, "[eNB %d][SR %x] Frame %d subframe %d Checking SR is %d (SR n1pucch is %d)\n", eNB->Mod_id, uci->rnti, frame, subframe, SR_payload, uci->n_pucch_1_0_sr[0]);
if (uci->type == SR) {
if (SR_payload == 1) {
fill_sr_indication (eNB, uci->rnti, frame, subframe, metric_SR);
......@@ -705,8 +709,12 @@ uci_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
metric[0] = rx_pucch (eNB, uci->pucch_fmt, i, uci->n_pucch_1[0][0], 0, //n2_pucch
uci->srs_active, // shortened format
pucch_b0b1[0], frame, subframe, PUCCH1a_THRES);
pucch_b0b1[0], frame, subframe, PUCCH1a_THRES
#ifdef Rel14
,uci->ue_type
#endif
);
/* cancel SR detection if reception on n1_pucch0 is better than on SR PUCCH resource index, otherwise send it up to MAC */
if (uci->type == HARQ_SR && metric[0] > metric_SR)
......@@ -717,10 +725,14 @@ uci_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
if (uci->type == HARQ_SR && metric[0] <= metric_SR) {
/* when transmitting ACK/NACK on SR PUCCH resource index, SR payload is always 1 */
SR_payload = 1;
metric[0] = rx_pucch (eNB, uci->pucch_fmt, i, uci->n_pucch_1_0_sr[0], 0, //n2_pucch
uci->srs_active, // shortened format
pucch_b0b1[0], frame, subframe, PUCCH1a_THRES);
metric[0] = rx_pucch(eNB, uci->pucch_fmt, i, uci->n_pucch_1_0_sr[0], 0, //n2_pucch
uci->srs_active, // shortened format
pucch_b0b1[0], frame, subframe, PUCCH1a_THRES
#ifdef Rel14
,uci->ue_type
#endif
);
}
......@@ -741,7 +753,11 @@ uci_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
metric[0] = rx_pucch (eNB, pucch_format1b, i, uci->n_pucch_1_0_sr[0], 0, //n2_pucch
uci->srs_active, // shortened format
pucch_b0b1[0], frame, subframe, PUCCH1a_THRES);
pucch_b0b1[0], frame, subframe, PUCCH1a_THRES
#ifdef Rel14
,uci->ue_type
#endif
);
} else { //using assigned pucch resources
#ifdef DEBUG_PHY_PROC
LOG_D (PHY, "[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK M=%d (%d,%d,%d,%d) format %d\n", eNB->Mod_id,
......@@ -751,7 +767,11 @@ uci_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
for (res = 0; res < uci->num_pucch_resources; res++)
metric[res] = rx_pucch (eNB, uci->pucch_fmt, i, uci->n_pucch_1[res][0], 0, // n2_pucch
uci->srs_active, // shortened format
pucch_b0b1[res], frame, subframe, PUCCH1a_THRES);
pucch_b0b1[res], frame, subframe, PUCCH1a_THRES
#ifdef Rel14
,uci->ue_type
#endif
);
......
......@@ -916,6 +916,8 @@ typedef struct {
int msg4_mcs;
/// size off piggybacked RRC SDU
uint8_t msg4_rrc_sdu_length;
uint32_t msg4_delay;
#ifdef Rel14
uint8_t rach_resource_type;
uint8_t msg2_mpdcch_repetition_cnt;
......
......@@ -246,7 +246,7 @@ void schedule_SR(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated != NULL, "physicalConfigDedicated is null for UE %d\n",UE_id);
// drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet
if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP,UE_id)) < RRC_CONNECTED) continue;
// if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP,UE_id)) < RRC_CONNECTED) continue;
if ((SRconfig = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig)!=NULL) {
if (SRconfig->present == SchedulingRequestConfig_PR_setup) {
......@@ -294,7 +294,7 @@ void schedule_SR(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
// drop the allocation because ULSCH with handle it with BSR
if (skip_ue==1) continue;
LOG_D(MAC,"Frame %d, Subframe %d : Scheduling SR for UE %d/%x\n",frameP,subframeP,UE_id,UE_list->UE_template[CC_id][UE_id].rnti);
LOG_I(MAC,"Frame %d, Subframe %d : Scheduling SR for UE %d/%x\n",frameP,subframeP,UE_id,UE_list->UE_template[CC_id][UE_id].rnti);
// check Rel10 or Rel8 SR
#if defined(Rel10) || defined(Rel14)
......
......@@ -165,7 +165,7 @@ add_msg3 (module_id_t module_idP, int CC_id, RA_TEMPLATE * RA_template, frame_t
for (j = 0; j < RA_template->msg3_nb_rb; j++)
cc->vrb_map_UL[RA_template->msg3_first_rb + j] = 1;
LOG_D (MAC, "[eNB %d][PUSCH-RA %x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) RA (mcs %d, first rb %d, nb_rb %d,round %d)\n",
LOG_I (MAC, "[eNB %d][PUSCH-RA %x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) RA (mcs %d, first rb %d, nb_rb %d,round %d)\n",
module_idP, RA_template->rnti, CC_id, frameP, subframeP, 10, 1, 1, RA_template->msg3_round - 1);
} // if (RA_template->msg3_round != 0) { // program HI too
} // non-BL/CE UE case
......@@ -560,6 +560,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_req = &eNB->DL_req[CC_idP].dl_config_request_body;
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
N_RB_DL = to_prb (cc[CC_idP].mib->message.dl_Bandwidth);
UE_id = find_UE_id (module_idP, RA_template->rnti);
......@@ -573,7 +574,10 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
RA_template->harq_pid = ((frameP * 10) + subframeP) & 7;
if (RA_template->msg4_delay < 8) {
RA_template->msg4_delay++;
return;
}
#ifdef Rel14
if (RA_template->rach_resource_type > 0) {
......@@ -606,7 +610,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
AssertFatal (RA_template->msg4_rrc_sdu_length > 0, "[MAC][eNB Scheduler] CCCH not allocated\n");
LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: UE_id %d, rrc_sdu_length %d\n", module_idP, CC_idP, frameP, subframeP, UE_id, RA_template->msg4_rrc_sdu_length);
LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: UE_id %d, rrc_sdu_length %d, dl_req->num_pdu %d\n", module_idP, CC_idP, frameP, subframeP, UE_id, RA_template->msg4_rrc_sdu_length,dl_req->number_pdu);
// MPDCCH configuration for Msg4
RA_template->msg4_mpdcch_done=0;
......@@ -614,33 +618,33 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_mpdcch_pdu));
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_format = (RA_template->rach_resource_type > 1) ? 11 : 10;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_narrow_band = RA_template->msg34_narrowband;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_narrow_band = RA_template->msg2_narrowband;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_prb_pairs = 6;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_tansmission_type = 1;
AssertFatal (cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 != NULL, "cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 is null\n");
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_tansmission_type = 1; // imposed (9.1.5 in 213) for Type 2 Common search space
AssertFatal (cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 != NULL, "cc[CC_id].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 is null\n");
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.start_symbol = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ecce_index = 0; // Note: this should be dynamic
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.aggregation_level = 24; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti_type = 0; // t-C-RNTI
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti_type = 0; // t-CRNTI
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti = RA_template->rnti;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ce_mode = (RA_template->rach_resource_type < 3) ? 1 : 2;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId; /// Check this is still N_id_cell for type2 common
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6); // check if not getRIV(N_RB_DL,first_rb,6);
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of Msg4
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 0; // fix to 0 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6);
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of RAR, 208 bits with N1A_PRB=3
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 0; // fix to 4 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = RA_template->harq_pid;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi_length = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi_flag = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 3;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 3; // N1A_PRB=3 (36.212) => 56 bits
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0;
......@@ -655,6 +659,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.direct_indication = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.total_dci_length_including_padding = 0; // this is not needed by OAI L1, but should be filled in
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_tx_antenna_ports = 1;
RA_template->msg4_mpdcch_repetition_cnt++;
dl_req->number_pdu++;
RA_template->msg4_TBsize = get_TBS_DL(dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs,
......@@ -662,7 +667,9 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
} //repetition_count==0 && SF condition met
if ((RA_template->msg4_mpdcch_repetition_cnt > 0)&&
(RA_template->msg4_mpdcch_done==0)) { // we're in a stream of repetitions
(RA_template->msg4_mpdcch_done==0)) { // we're in a stream of repetitions
LOG_I(MAC,"SFN.SF %d.%d : msg4 mpdcch repetition number %d/%d\n",
frameP,subframeP,RA_template->msg4_mpdcch_repetition_cnt,reps);
if (RA_template->msg4_mpdcch_repetition_cnt == reps) { // this is the last mpdcch repetition
RA_template->msg4_mpdcch_done = 1;
if (cc[CC_idP].tdd_Config == NULL) { // FDD case
......@@ -768,9 +775,9 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
eNB->TX_req[CC_idP].tx_request_body.number_of_pdus++;
// Program ACK/NAK for Msg4 PDSCH
int absSF = (RA_template->Msg3_frame * 10) + RA_template->Msg3_subframe;
int absSF = (frameP * 10) + subframeP;
// see Section 10.2 from 36.213
int ackNAK_absSF = absSF + reps + 4;
int ackNAK_absSF = absSF + reps + 3;
AssertFatal (reps == 1, "Have to handle programming of ACK when PDSCH repetitions is > 1\n");
ul_req = &eNB->UL_req_tmp[CC_idP][ackNAK_absSF % 10].ul_config_request_body;
ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
......@@ -1015,7 +1022,7 @@ check_Msg4_retransmission (module_id_t module_idP, int CC_idP, frame_t frameP, s
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
N_RB_DL = to_prb (cc[CC_idP].mib->message.dl_Bandwidth);
LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 for harq_pid %d was acknowledged (round %d)\n", module_idP, CC_idP, frameP, subframeP, RA_template->harq_pid, round);
LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 for harq_pid %d was acknowledged (round %d)\n", module_idP, CC_idP, frameP, subframeP, RA_template->harq_pid, round);
if (round != 8) {
......@@ -1096,7 +1103,7 @@ check_Msg4_retransmission (module_id_t module_idP, int CC_idP, frame_t frameP, s
} // Msg4 frame/subframe
} // regular LTE case
} else {
LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n", module_idP, CC_idP, frameP, subframeP);
LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n", module_idP, CC_idP, frameP, subframeP);
RA_template->wait_ack_Msg4 = 0;
RA_template->RA_active = FALSE;
UE_id = find_UE_id (module_idP, RA_template->rnti);
......
......@@ -400,7 +400,8 @@ schedule_SI_BR(
vrb_map[first_rb+4] = 1;
vrb_map[first_rb+5] = 1;
if ((frameP&1023) < 200) LOG_D(MAC,"[eNB %d] Frame %d Subframe %d: SI_BR->DLSCH CC_id %d, Narrowband %d rvidx %d (sf_mod_period %d : si_WindowLength_BR_r13 %d : si_RepetitionPattern_r13 %d) bcch_sdu_length %d\n",
//if ((frameP&1023) < 200)
LOG_D(MAC,"[eNB %d] Frame %d Subframe %d: SI_BR->DLSCH CC_id %d, Narrowband %d rvidx %d (sf_mod_period %d : si_WindowLength_BR_r13 %d : si_RepetitionPattern_r13 %d) bcch_sdu_length %d\n",
module_idP,frameP,subframeP,CC_id,(int)si_Narrowband_r13-1,rvidx,
sf_mod_period,(int)si_WindowLength_BR_r13,(int)si_RepetitionPattern_r13,
bcch_sdu_length);
......
......@@ -3602,7 +3602,7 @@ void SR_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, sub_frame_t
if (UE_id != -1) {
if (mac_eNB_get_rrc_status(mod_idP,UE_RNTI(mod_idP,UE_id)) < RRC_CONNECTED)
LOG_D(MAC,"[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d\n",mod_idP,rntiP,frameP,subframeP, UE_id,cc_idP);
LOG_I(MAC,"[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d\n",mod_idP,rntiP,frameP,subframeP, UE_id,cc_idP);
#if 0
UE_sched_ctrl *sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
......
This diff is collapsed.
......@@ -1131,6 +1131,8 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
for (i=UE_list->head_ul; i>=0; i=UE_list->next_ul[i]) {
if (UE_list->UE_template[CC_id][UE_id].rach_resource_type > 0) continue;
rnti = UE_RNTI(module_idP,i);
if (rnti==NOT_A_RNTI)
......
......@@ -2560,7 +2560,9 @@ do_RRCConnectionSetup_BR(
epdcch_setconfig_r11->re_MappingQCL_ConfigId_r11 = NULL;
epdcch_setconfig_r11->ext2 = calloc(1, sizeof(struct EPDCCH_SetConfig_r11__ext2));
epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310 = NULL;
epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310 = calloc(1,sizeof(struct EPDCCH_SetConfig_r11__ext2__numberPRB_Pairs_v1310));
epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present = EPDCCH_SetConfig_r11__ext2__numberPRB_Pairs_v1310_PR_setup;
epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->choice.setup = EPDCCH_SetConfig_r11__ext2__numberPRB_Pairs_v1310__setup_n6;
epdcch_setconfig_r11->ext2->mpdcch_config_r13 = calloc(1, sizeof(struct EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13));
epdcch_setconfig_r11->ext2->mpdcch_config_r13->present = EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13_PR_setup;
epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.csi_NumRepetitionCE_r13 = EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13__setup__csi_NumRepetitionCE_r13_sf1;
......@@ -2571,6 +2573,7 @@ do_RRCConnectionSetup_BR(
epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13 = 2;
ASN_SEQUENCE_ADD(physicalConfigDedicated2->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11, epdcch_setconfig_r11);
// FIXME allocate physicalConfigDedicated2->ext7
physicalConfigDedicated2->ext7 = CALLOC(1, sizeof(struct PhysicalConfigDedicated__ext7));
......
......@@ -329,8 +329,11 @@ rrc_rx_tx(
check_handovers(ctxt_pP);
// counetr, and get the value and aggregate
// check for UL failure
RB_FOREACH(ue_context_p, rrc_ue_tree_s, &(RC.rrc[ctxt_pP->module_id]->rrc_ue_head)) {
LOG_I(RRC,"SFN.SN %d.%d => release timer %d/%d\n",ctxt_pP->frame,ctxt_pP->subframe,
ue_context_p->ue_context.ue_release_timer,ue_context_p->ue_context.ue_release_timer_thres);
if ((ctxt_pP->frame == 0) && (ctxt_pP->subframe==0)) {
if (ue_context_p->ue_context.Initialue_identity_s_TMSI.presence == TRUE) {
LOG_I(RRC,"UE rnti %x:S-TMSI %x failure timer %d/20000\n",
......@@ -348,7 +351,7 @@ rrc_rx_tx(
ue_context_p->ue_context.ul_failure_timer++;
if (ue_context_p->ue_context.ul_failure_timer >= 20000) {
// remove UE after 20 seconds after MAC has indicated UL failure
LOG_I(RRC,"Removing UE %x instance\n",ue_context_p->ue_context.rnti);
LOG_I(RRC,"Removing UE %x instance (failure)\n",ue_context_p->ue_context.rnti);
ue_to_be_removed = ue_context_p;
break;
}
......@@ -357,8 +360,9 @@ rrc_rx_tx(
ue_context_p->ue_context.ue_release_timer++;
if (ue_context_p->ue_context.ue_release_timer >=
ue_context_p->ue_context.ue_release_timer_thres) {
LOG_I(RRC,"Removing UE %x instance\n",ue_context_p->ue_context.rnti);
LOG_I(RRC,"Removing UE %x instance (release timer %d)\n",ue_context_p->ue_context.rnti,ue_context_p->ue_context.ue_release_timer);
ue_to_be_removed = ue_context_p;
exit(-1);
break;
}
}
......
......@@ -873,6 +873,7 @@ rrc_eNB_free_UE(const module_id_t enb_mod_idP,const struct rrc_eNB_ue_context_s*
#endif
#endif
LOG_I(RRC,"Removing ue %x (rrc_eNB_free_UE)\n",rnti);
rrc_mac_remove_ue(enb_mod_idP,rnti);
rrc_rlc_remove_ue(&ctxt);
pdcp_remove_UE(&ctxt);
......
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