Commit 52afb72d authored by Raymond Knopp's avatar Raymond Knopp

Merge branch 'RU-RAU-split' of https://gitlab.eurecom.fr/oai/openairinterface5g into RU-RAU-split

Conflicts:
	openair1/PHY/LTE_TRANSPORT/defs.h
	openair1/PHY/LTE_TRANSPORT/dlsch_scrambling.c
	openair1/SCHED/phy_procedures_lte_eNb.c
parents 1ca5c8c4 5c0ea2b4
...@@ -989,6 +989,7 @@ set(PHY_SRC ...@@ -989,6 +989,7 @@ set(PHY_SRC
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pbch.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pbch.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/edci.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pcfich.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pcfich.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pucch.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pucch.c
......
...@@ -145,6 +145,13 @@ void phy_config_request(PHY_Config_t *phy_config) { ...@@ -145,6 +145,13 @@ void phy_config_request(PHY_Config_t *phy_config) {
LOG_I(PHY,"prach_config_common.prach_ConfigInfo.prach_FreqOffset = %d\n",cfg->prach_config.frequency_offset.value); LOG_I(PHY,"prach_config_common.prach_ConfigInfo.prach_FreqOffset = %d\n",cfg->prach_config.frequency_offset.value);
init_prach_tables(839); init_prach_tables(839);
compute_prach_seq(fp->prach_config_common.rootSequenceIndex,
fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u);
#ifdef Rel14 #ifdef Rel14
fp->prach_emtc_config_common.prach_Config_enabled=1; fp->prach_emtc_config_common.prach_Config_enabled=1;
...@@ -160,10 +167,18 @@ void phy_config_request(PHY_Config_t *phy_config) { ...@@ -160,10 +167,18 @@ void phy_config_request(PHY_Config_t *phy_config) {
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3], AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3],
"prach_starting_subframe_periodicity[3] < prach_numPetitionPerPreambleAttempt[3]\n"); "prach_starting_subframe_periodicity[3] < prach_numPetitionPerPreambleAttempt[3]\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3] = cfg->emtc_config.prach_ce_level_3_configuration_index.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3] = cfg->emtc_config.prach_ce_level_3_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[3] = cfg->emtc_config.prach_ce_level_3_frequency_offset.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[3] = cfg->emtc_config.prach_ce_level_3_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[3] = cfg->emtc_config.prach_ce_level_3_hopping_enable.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[3] = cfg->emtc_config.prach_ce_level_3_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[3] = cfg->emtc_config.prach_ce_level_3_hopping_offset.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[3] = cfg->emtc_config.prach_ce_level_3_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[3]);
// CE Level 2 parameters // CE Level 2 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] = cfg->emtc_config.prach_ce_level_2_enable.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] = cfg->emtc_config.prach_ce_level_2_enable.value;
...@@ -175,6 +190,13 @@ void phy_config_request(PHY_Config_t *phy_config) { ...@@ -175,6 +190,13 @@ void phy_config_request(PHY_Config_t *phy_config) {
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[2] = cfg->emtc_config.prach_ce_level_2_frequency_offset.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[2] = cfg->emtc_config.prach_ce_level_2_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[2] = cfg->emtc_config.prach_ce_level_2_hopping_enable.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[2] = cfg->emtc_config.prach_ce_level_2_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[2] = cfg->emtc_config.prach_ce_level_2_hopping_offset.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[2] = cfg->emtc_config.prach_ce_level_2_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[2]);
// CE Level 1 parameters // CE Level 1 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] = cfg->emtc_config.prach_ce_level_1_enable.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] = cfg->emtc_config.prach_ce_level_1_enable.value;
...@@ -182,11 +204,19 @@ void phy_config_request(PHY_Config_t *phy_config) { ...@@ -182,11 +204,19 @@ void phy_config_request(PHY_Config_t *phy_config) {
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1] = cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1] = cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1], AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1],
"prach_starting_subframe_periodicity[1] < prach_numPetitionPerPreambleAttempt[1]\n"); "prach_starting_subframe_periodicity[1] < prach_numPetitionPerPreambleAttempt[1]\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[1] = cfg->emtc_config.prach_ce_level_1_configuration_index.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[1] = cfg->emtc_config.prach_ce_level_1_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[1] = cfg->emtc_config.prach_ce_level_1_frequency_offset.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[1] = cfg->emtc_config.prach_ce_level_1_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[1] = cfg->emtc_config.prach_ce_level_1_hopping_enable.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[1] = cfg->emtc_config.prach_ce_level_1_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[1] = cfg->emtc_config.prach_ce_level_1_hopping_offset.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[1] = cfg->emtc_config.prach_ce_level_1_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[1]);
// CE Level 0 parameters // CE Level 0 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] = cfg->emtc_config.prach_ce_level_0_enable.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] = cfg->emtc_config.prach_ce_level_0_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0] = cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0] = cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value;
...@@ -201,11 +231,16 @@ void phy_config_request(PHY_Config_t *phy_config) { ...@@ -201,11 +231,16 @@ void phy_config_request(PHY_Config_t *phy_config) {
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[0] = cfg->emtc_config.prach_ce_level_0_hopping_enable.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[0] = cfg->emtc_config.prach_ce_level_0_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[0] = cfg->emtc_config.prach_ce_level_0_hopping_offset.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[0] = cfg->emtc_config.prach_ce_level_0_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[0]);
#endif #endif
compute_prach_seq(&fp->prach_config_common,fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u);
fp->pucch_config_common.deltaPUCCH_Shift = 1+cfg->pucch_config.delta_pucch_shift.value; fp->pucch_config_common.deltaPUCCH_Shift = 1+cfg->pucch_config.delta_pucch_shift.value;
fp->pucch_config_common.nRB_CQI = cfg->pucch_config.n_cqi_rb.value; fp->pucch_config_common.nRB_CQI = cfg->pucch_config.n_cqi_rb.value;
...@@ -445,7 +480,11 @@ void phy_config_sib2_ue(uint8_t Mod_id,int CC_id, ...@@ -445,7 +480,11 @@ void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig; fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig;
fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_FreqOffset; fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_FreqOffset;
compute_prach_seq(&fp->prach_config_common,fp->frame_type,ue->X_u); compute_prach_seq(fp->prach_config_common.rootSequenceIndex,
fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,ue->X_u);
...@@ -733,7 +772,10 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility ...@@ -733,7 +772,10 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility
// prach_root_sequence_map4[fp->prach_config_common.rootSequenceIndex]; // prach_root_sequence_map4[fp->prach_config_common.rootSequenceIndex];
//compute_prach_seq(u,N_ZC, PHY_vars_UE_g[Mod_id]->X_u); //compute_prach_seq(u,N_ZC, PHY_vars_UE_g[Mod_id]->X_u);
compute_prach_seq(&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common, compute_prach_seq(PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.rootSequenceIndex,
PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type, fp->frame_type,
PHY_vars_UE_g[Mod_id][CC_id]->X_u); PHY_vars_UE_g[Mod_id][CC_id]->X_u);
......
...@@ -219,7 +219,14 @@ uint8_t *generate_dci0(uint8_t *dci, ...@@ -219,7 +219,14 @@ uint8_t *generate_dci0(uint8_t *dci,
AssertFatal((aggregation_level==1) || AssertFatal((aggregation_level==1) ||
(aggregation_level==2) || (aggregation_level==2) ||
(aggregation_level==4) || (aggregation_level==4) ||
(aggregation_level==8), (aggregation_level==8)
#ifdef Rel14 // Added for EPDCCH/MPDCCH
||
(aggregation_level==16) ||
(aggregation_level==24) ||
(aggregation_level==32)
#endif
,
"generate_dci FATAL, illegal aggregation_level %d\n",aggregation_level); "generate_dci FATAL, illegal aggregation_level %d\n",aggregation_level);
......
...@@ -2005,7 +2005,7 @@ int fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dc ...@@ -2005,7 +2005,7 @@ int fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dc
dci_alloc->start_symbol = rel13->start_symbol; dci_alloc->start_symbol = rel13->start_symbol;
dci_alloc->ce_mode = rel13->ce_mode; dci_alloc->ce_mode = rel13->ce_mode;
dci_alloc->dmrs_scrambling_init = rel13->drms_scrambling_init; dci_alloc->dmrs_scrambling_init = rel13->drms_scrambling_init;
dci_alloc->initial_transmission_sf_io = rel13->initial_transmission_sf_io; dci_alloc->i0 = rel13->initial_transmission_sf_io;
dci_alloc->ra_flag = 0; dci_alloc->ra_flag = 0;
if (rel13->rnti_type == 2 ) dci_alloc->ra_flag = 1; if (rel13->rnti_type == 2 ) dci_alloc->ra_flag = 1;
......
...@@ -175,7 +175,7 @@ typedef struct { ...@@ -175,7 +175,7 @@ typedef struct {
/// First layer for this PSCH transmission /// First layer for this PSCH transmission
uint8_t first_layer; uint8_t first_layer;
/// codeword this transport block is mapped to /// codeword this transport block is mapped to
uint8_t codeword; uint8_t codeword;
} LTE_DL_eNB_HARQ_t; } LTE_DL_eNB_HARQ_t;
typedef struct { typedef struct {
......
...@@ -104,6 +104,26 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -104,6 +104,26 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
#endif #endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_SCRAMBLING, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_SCRAMBLING, VCD_FUNCTION_IN);
#ifdef Rel14
// Rule for accumulation of subframes for BL/CE UEs
uint8_t Nacc=4;
uint16_t j0,j,idelta;
uint16_t i = (Ns>>1) + (10*frame);
uint16_t i0 = dlsch->i0;
if (dlsch->sib1_br_flag==1) Nacc=1;
else if (dlsch->rnti == 0xFFFF || dlsch->rnti == 0xFFFE) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
// Note: above SC-RNTI will also have to be added when/if implemented
else if (dlsch->CEmode == CEmodeA) Nacc=1;
else if (dlsch->CEmode == CEmodeB) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
if (frame_parms->frame_type == FDD || Nacc == 1) idelta = 0;
else idelta = Nacc-2;
j0 = (i0+idelta)/Nacc;
j = (i - i0)/Nacc;
#endif
// reset = 1; // reset = 1;
// x1 is set in lte_gold_generic // x1 is set in lte_gold_generic
if (mbsfn_flag == 0) { if (mbsfn_flag == 0) {
......
...@@ -1612,16 +1612,17 @@ void rx_prach0(PHY_VARS_eNB *eNB, ...@@ -1612,16 +1612,17 @@ void rx_prach0(PHY_VARS_eNB *eNB,
if (new_dft == 1) { if (new_dft == 1) {
new_dft = 0; new_dft = 0;
Xu=(int16_t*)eNB->X_u[preamble_offset-first_nonzero_root_idx];
#ifdef Rel14 #ifdef Rel14
if (br_flag == 1) { if (br_flag == 1) {
Xu=(int16_t*)eNB->X_u_br[ce_level][preamble_offset-first_nonzero_root_idx];
prach_ifft = prach_ifftp[prach_ifft_cnt++]; prach_ifft = prach_ifftp[prach_ifft_cnt++];
if (eNB->prach_vars_br.repetition_number[ce_level]==1) memset(prach_ifft,0,((N_ZC==839)?2048:256)*sizeof(int32_t)); if (eNB->prach_vars_br.repetition_number[ce_level]==1) memset(prach_ifft,0,((N_ZC==839)?2048:256)*sizeof(int32_t));
} }
else else
#endif #endif
{ {
Xu=(int16_t*)eNB->X_u[preamble_offset-first_nonzero_root_idx];
prach_ifft = prach_ifftp[0]; prach_ifft = prach_ifftp[0];
memset(prach_ifft,0,((N_ZC==839) ? 2048 : 256)*sizeof(int32_t)); memset(prach_ifft,0,((N_ZC==839) ? 2048 : 256)*sizeof(int32_t));
} }
...@@ -1801,15 +1802,18 @@ void init_prach_tables(int N_ZC) ...@@ -1801,15 +1802,18 @@ void init_prach_tables(int N_ZC)
} }
} }
void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common, void compute_prach_seq(uint16_t rootSequenceIndex,
lte_frame_type_t frame_type, uint8_t prach_ConfigIndex,
uint32_t X_u[64][839]) uint8_t zeroCorrelationZoneConfig,
uint8_t highSpeedFlag,
lte_frame_type_t frame_type,
uint32_t X_u[64][839])
{ {
// Compute DFT of x_u => X_u[k] = x_u(inv(u)*k)^* X_u[k] = exp(j\pi u*inv(u)*k*(inv(u)*k+1)/N_ZC) // Compute DFT of x_u => X_u[k] = x_u(inv(u)*k)^* X_u[k] = exp(j\pi u*inv(u)*k*(inv(u)*k+1)/N_ZC)
unsigned int k,inv_u,i,NCS=0,num_preambles; unsigned int k,inv_u,i,NCS=0,num_preambles;
int N_ZC; int N_ZC;
uint8_t prach_fmt = get_prach_fmt(prach_config_common->prach_ConfigInfo.prach_ConfigIndex,frame_type); uint8_t prach_fmt = get_prach_fmt(prach_ConfigIndex,frame_type);
uint16_t *prach_root_sequence_map; uint16_t *prach_root_sequence_map;
uint16_t u, preamble_offset; uint16_t u, preamble_offset;
uint16_t n_shift_ra,n_shift_ra_bar, d_start,numshift; uint16_t n_shift_ra,n_shift_ra_bar, d_start,numshift;
...@@ -1818,7 +1822,7 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common, ...@@ -1818,7 +1822,7 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_COMPUTE_PRACH, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_COMPUTE_PRACH, VCD_FUNCTION_IN);
#ifdef PRACH_DEBUG #ifdef PRACH_DEBUG
LOG_I(PHY,"compute_prach_seq: NCS_config %d, prach_fmt %d\n",prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig, prach_fmt); LOG_I(PHY,"compute_prach_seq: NCS_config %d, prach_fmt %d\n",zeroCorrelationZoneConfig, prach_fmt);
#endif #endif
AssertFatal(prach_fmt<4, AssertFatal(prach_fmt<4,
...@@ -1838,15 +1842,15 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common, ...@@ -1838,15 +1842,15 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
LOG_I( PHY, "compute_prach_seq: done init prach_tables\n" ); LOG_I( PHY, "compute_prach_seq: done init prach_tables\n" );
#endif #endif
if (prach_config_common->prach_ConfigInfo.highSpeedFlag== 0) { if (highSpeedFlag== 0) {
#ifdef PRACH_DEBUG #ifdef PRACH_DEBUG
LOG_I(PHY,"Low speed prach : NCS_config %d\n",prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig); LOG_I(PHY,"Low speed prach : NCS_config %d\n",zeroCorrelationZoneConfig);
#endif #endif
AssertFatal(prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig<=15, AssertFatal(zeroCorrelationZoneConfig<=15,
"FATAL, Illegal Ncs_config for unrestricted format %"PRIu8"\n", prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig ); "FATAL, Illegal Ncs_config for unrestricted format %"PRIu8"\n", zeroCorrelationZoneConfig );
NCS = NCS_unrestricted[prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig]; NCS = NCS_unrestricted[zeroCorrelationZoneConfig];
num_preambles = (NCS==0) ? 64 : ((64*NCS)/N_ZC); num_preambles = (NCS==0) ? 64 : ((64*NCS)/N_ZC);
...@@ -1856,12 +1860,12 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common, ...@@ -1856,12 +1860,12 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
} else { } else {
#ifdef PRACH_DEBUG #ifdef PRACH_DEBUG
LOG_I( PHY, "high speed prach : NCS_config %"PRIu8"\n", prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig ); LOG_I( PHY, "high speed prach : NCS_config %"PRIu8"\n", zeroCorrelationZoneConfig );
#endif #endif
AssertFatal(prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig<=14, AssertFatal(zeroCorrelationZoneConfig<=14,
"FATAL, Illegal Ncs_config for restricted format %"PRIu8"\n", prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig ); "FATAL, Illegal Ncs_config for restricted format %"PRIu8"\n", zeroCorrelationZoneConfig );
NCS = NCS_restricted[prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig]; NCS = NCS_restricted[zeroCorrelationZoneConfig];
fill_du(prach_fmt); fill_du(prach_fmt);
num_preambles = 64; // compute ZC sequence for 64 possible roots num_preambles = 64; // compute ZC sequence for 64 possible roots
...@@ -1871,7 +1875,7 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common, ...@@ -1871,7 +1875,7 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
while (not_found == 1) { while (not_found == 1) {
// current root depending on rootSequenceIndex // current root depending on rootSequenceIndex
int index = (prach_config_common->rootSequenceIndex + preamble_offset) % N_ZC; int index = (rootSequenceIndex + preamble_offset) % N_ZC;
if (prach_fmt<4) { if (prach_fmt<4) {
// prach_root_sequence_map points to prach_root_sequence_map0_3 // prach_root_sequence_map points to prach_root_sequence_map0_3
...@@ -1915,12 +1919,12 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common, ...@@ -1915,12 +1919,12 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
if (NCS>0) if (NCS>0)
LOG_I( PHY, "Initializing %u preambles for PRACH (NCS_config %"PRIu8", NCS %u, N_ZC/NCS %u)\n", LOG_I( PHY, "Initializing %u preambles for PRACH (NCS_config %"PRIu8", NCS %u, N_ZC/NCS %u)\n",
num_preambles, prach_config_common->prach_ConfigInfo.zeroCorrelationZoneConfig, NCS, N_ZC/NCS ); num_preambles, zeroCorrelationZoneConfig, NCS, N_ZC/NCS );
#endif #endif
for (i=0; i<num_preambles; i++) { for (i=0; i<num_preambles; i++) {
int index = (prach_config_common->rootSequenceIndex+i+preamble_offset) % N_ZC; int index = (rootSequenceIndex+i+preamble_offset) % N_ZC;
if (prach_fmt<4) { if (prach_fmt<4) {
// prach_root_sequence_map points to prach_root_sequence_map0_3 // prach_root_sequence_map points to prach_root_sequence_map0_3
...@@ -1941,7 +1945,6 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common, ...@@ -1941,7 +1945,6 @@ void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common,
for (k=0; k<N_ZC; k++) { for (k=0; k<N_ZC; k++) {
// 420 is the multiplicative inverse of 2 (required since ru is exp[j 2\pi n]) // 420 is the multiplicative inverse of 2 (required since ru is exp[j 2\pi n])
X_u[i][k] = ((uint32_t*)ru)[(((k*(1+(inv_u*k)))%N_ZC)*420)%N_ZC]; X_u[i][k] = ((uint32_t*)ru)[(((k*(1+(inv_u*k)))%N_ZC)*420)%N_ZC];
//printf("X_u[%d][%d] (%d)(%d)(%d) : %d,%d\n",i,k,u*inv_u*k*(1+(inv_u*k)),u*inv_u*k*(1+(inv_u*k))/2,(u*inv_u*k*(1+(inv_u*k))/2)%N_ZC,((int16_t*)&X_u[i][k])[0],((int16_t*)&X_u[i][k])[1]);
} }
} }
......
...@@ -2115,12 +2115,20 @@ uint8_t get_fid_prach_tdd(module_id_t Mod_id,uint8_t tdd_map_index); ...@@ -2115,12 +2115,20 @@ uint8_t get_fid_prach_tdd(module_id_t Mod_id,uint8_t tdd_map_index);
/*! /*!
\brief Comp ute DFT of PRACH ZC sequences. Used for generation of prach in UE and reception of PRACH in eNB. \brief Comp ute DFT of PRACH ZC sequences. Used for generation of prach in UE and reception of PRACH in eNB.
@param prach_config_common Pointer to prachConfigCommon structure @param rootSequenceIndex PRACH root sequence
#param prach_ConfigIndex PRACH Configuration Index
@param zeroCorrelationZoneConfig PRACH ncs_config
@param highSpeedFlat PRACH High-Speed Flag
@param frame_type TDD/FDD flag
@param Xu DFT output @param Xu DFT output
*/ */
void compute_prach_seq(PRACH_CONFIG_COMMON *prach_config_common, void compute_prach_seq(uint16_t rootSequenceIndex,
lte_frame_type_t frame_type, uint8_t prach_ConfigIndex,
uint32_t X_u[64][839]); uint8_t zeroCorrelationZoneConfig,
uint8_t highSpeedFlag,
lte_frame_type_t frame_type,
uint32_t X_u[64][839]);
void init_prach_tables(int N_ZC); void init_prach_tables(int N_ZC);
......
...@@ -940,7 +940,9 @@ typedef struct PHY_VARS_eNB_s { ...@@ -940,7 +940,9 @@ typedef struct PHY_VARS_eNB_s {
uint32_t lte_gold_mbsfn_table[10][3][42]; uint32_t lte_gold_mbsfn_table[10][3][42];
uint32_t X_u[64][839]; uint32_t X_u[64][839];
#ifdef Rel14
uint32_t X_u_br[4][64][839];
#endif
uint8_t pbch_configured; uint8_t pbch_configured;
uint8_t pbch_pdu[4]; //PBCH_PDU_SIZE uint8_t pbch_pdu[4]; //PBCH_PDU_SIZE
char eNB_generate_rar; char eNB_generate_rar;
......
...@@ -817,7 +817,11 @@ typedef struct { ...@@ -817,7 +817,11 @@ typedef struct {
/// 0-503 n_EPDCCHid_i /// 0-503 n_EPDCCHid_i
uint16_t dmrs_scrambling_init; uint16_t dmrs_scrambling_init;
/// Absolute subframe of the initial transmission (0-10239) /// Absolute subframe of the initial transmission (0-10239)
uint16_t initial_transmission_sf_io; uint16_t i0;
/// number of mdpcch repetitions
uint16_t reps;
/// current absolute subframe number
uint16_t absSF;
/// DCI pdu /// DCI pdu
uint8_t dci_pdu[8]; uint8_t dci_pdu[8];
} mDCI_ALLOC_t; } mDCI_ALLOC_t;
...@@ -836,8 +840,12 @@ typedef struct { ...@@ -836,8 +840,12 @@ typedef struct {
} LTE_eNB_EPDCCH; } LTE_eNB_EPDCCH;
typedef struct { typedef struct {
/// number of active MPDCCH allocations
uint8_t num_dci; uint8_t num_dci;
/// MPDCCH DCI allocations from MAC
mDCI_ALLOC_t mdci_alloc[32]; mDCI_ALLOC_t mdci_alloc[32];
// MAX SIZE of an EPDCCH set is 16EREGs * 9REs/EREG * 8 PRB pairs = 2304 bits
uint8_t e[2304];
} LTE_eNB_MPDCCH; } LTE_eNB_MPDCCH;
......
...@@ -715,6 +715,7 @@ void pdsch_procedures(PHY_VARS_eNB *eNB, ...@@ -715,6 +715,7 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
int i; int i;
if (frame < 20) { if (frame < 20) {
LOG_D(PHY, LOG_D(PHY,
"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", pdsch_start %d, G %d, nb_rb %"PRIu16", rb0 %x, rb1 %x, TBS %"PRIu16", pmi_alloc %"PRIx64", rv %"PRIu8" (round %"PRIu8")\n", "[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", pdsch_start %d, G %d, nb_rb %"PRIu16", rb0 %x, rb1 %x, TBS %"PRIu16", pmi_alloc %"PRIx64", rv %"PRIu8" (round %"PRIu8")\n",
eNB->Mod_id, dlsch->rnti,harq_pid, eNB->Mod_id, dlsch->rnti,harq_pid,
...@@ -734,8 +735,8 @@ void pdsch_procedures(PHY_VARS_eNB *eNB, ...@@ -734,8 +735,8 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
dlsch_harq->TBS, dlsch_harq->TBS,
pmi2hex_2Ar1(dlsch_harq->pmi_alloc), pmi2hex_2Ar1(dlsch_harq->pmi_alloc),
dlsch_harq->rvidx, dlsch_harq->rvidx,
dlsch_harq->round); dlsch_harq->round);
} }
#if defined(MESSAGE_CHART_GENERATOR_PHY) #if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_TX_MESSAGE( MSC_LOG_TX_MESSAGE(
MSC_PHY_ENB,MSC_PHY_UE, MSC_PHY_ENB,MSC_PHY_UE,
...@@ -758,87 +759,13 @@ void pdsch_procedures(PHY_VARS_eNB *eNB, ...@@ -758,87 +759,13 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
dlsch_harq->rvidx, dlsch_harq->rvidx,
dlsch_harq->round); dlsch_harq->round);
#endif #endif
if (ue_stats) ue_stats->dlsch_sliding_cnt++; if (ue_stats) ue_stats->dlsch_sliding_cnt++;
if (dlsch_harq->round == 0) { if (dlsch_harq->round == 0) {
if (ue_stats) if (ue_stats)
ue_stats->dlsch_trials[harq_pid][0]++; ue_stats->dlsch_trials[harq_pid][0]++;
if (eNB->mac_enabled==1) {
/*
// if (ra_flag == 0) {
DLSCH_pdu = get_dlsch_pdu(eNB->Mod_id,
eNB->CC_id,
dlsch->rnti);
}
else {
int16_t crnti = mac_xface->fill_rar(eNB->Mod_id,
eNB->CC_id,
frame,
DLSCH_pdu_rar,
fp->N_RB_UL,
input_buffer_length);
DLSCH_pdu = DLSCH_pdu_rar;
int UE_id;
if (crnti!=0)
UE_id = add_ue(crnti,eNB);
else
UE_id = -1;
if (UE_id==-1) {
LOG_W(PHY,"[eNB] Max user count reached.\n");
mac_xface->cancel_ra_proc(eNB->Mod_id,
eNB->CC_id,
frame,
crnti);
} else {
eNB->UE_stats[(uint32_t)UE_id].mode = RA_RESPONSE;
// Initialize indicator for first SR (to be cleared after ConnectionSetup is acknowledged)
eNB->first_sr[(uint32_t)UE_id] = 1;
generate_eNB_ulsch_params_from_rar(DLSCH_pdu,
frame,
subframe,
eNB->ulsch[(uint32_t)UE_id],
fp);
LOG_D(PHY,"[eNB][RAPROC] Frame %d subframe %d, Activated Msg3 demodulation for UE %"PRId8" in frame %"PRIu32", subframe %"PRIu8"\n",
frame,
subframe,
UE_id,
eNB->ulsch[(uint32_t)UE_id]->Msg3_frame,
eNB->ulsch[(uint32_t)UE_id]->Msg3_subframe);
LOG_D(PHY, "hack: set phich_active to 0 for UE %d fsf %d %d all HARQs\n", UE_id, frame, subframe);
for (i = 0; i < 8; i++)
eNB->ulsch[(uint32_t)UE_id]->harq_processes[i]->phich_active = 0;
mac_xface->set_msg3_subframe(eNB->Mod_id, eNB->CC_id, frame, subframe, (uint16_t)crnti,
eNB->ulsch[UE_id]->Msg3_frame, eNB->ulsch[UE_id]->Msg3_subframe);
T(T_ENB_PHY_MSG3_ALLOCATION, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe),
T_INT(UE_id), T_INT((uint16_t)crnti), T_INT(1 // 1 is for initial transmission
),
T_INT(eNB->ulsch[UE_id]->Msg3_frame), T_INT(eNB->ulsch[UE_id]->Msg3_subframe));
}
if (ue_stats) ue_stats->total_TBS_MAC += dlsch_harq->TBS;
*/
}
else {
for (i=0; i<input_buffer_length; i++)
dlsch_harq->pdu[i] = (unsigned char)(taus()&0xff);
}
} else { } else {
ue_stats->dlsch_trials[harq_pid][dlsch_harq->round]++; ue_stats->dlsch_trials[harq_pid][dlsch_harq->round]++;
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
...@@ -999,12 +926,12 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -999,12 +926,12 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL; LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
int UE_id; int UE_id;
int harq_pid; int harq_pid;
UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE); UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE);
AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n"); AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX); AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
dlsch0 = eNB->dlsch[UE_id][0]; dlsch0 = eNB->dlsch[UE_id][0];
dlsch1 = eNB->dlsch[UE_id][1]; dlsch1 = eNB->dlsch[UE_id][1];
...@@ -1018,19 +945,16 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -1018,19 +945,16 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
dlsch1_harq = dlsch1->harq_processes[harq_pid]; dlsch1_harq = dlsch1->harq_processes[harq_pid];
AssertFatal(dlsch0_harq!=NULL,"dlsch_harq is null\n"); AssertFatal(dlsch0_harq!=NULL,"dlsch_harq is null\n");
dlsch0_harq->pdsch_start = eNB->pdcch_vars[proc->subframe_tx & 1].num_pdcch_symbols; dlsch0_harq->pdsch_start = eNB->pdcch_vars[proc->subframe_tx & 1].num_pdcch_symbols;
LOG_D(PHY,"NFAPI: frame %d, subframe %d: programming dlsch, rnti %x, UE_id %d, harq_pid %d\n", LOG_D(PHY,"NFAPI: frame %d, subframe %d: programming dlsch, rnti %x, UE_id %d, harq_pid %d\n",
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid); proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid);
if (codeword_index == 0) dlsch0_harq->pdu = sdu; if (codeword_index == 0) dlsch0_harq->pdu = sdu;
else dlsch1_harq->pdu = sdu; else dlsch1_harq->pdu = sdu;
#ifdef Rel14 #ifdef Rel14
dlsch0->sib1_br_flag=0; dlsch0->sib1_br_flag=0;
if ((rel13->pdsch_payload_type <2) && (rel13->ue_type>0)) { // this is a BR/CE UE and SIB1-BR/SI-BR if ((rel13->pdsch_payload_type <2) && (rel13->ue_type>0)) { // this is a BR/CE UE and SIB1-BR/SI-BR
dlsch0->rnti = 0xFFFF; dlsch0->rnti = 0xFFFF;
dlsch0->Kmimo = 1; dlsch0->Kmimo = 1;
...@@ -1079,8 +1003,6 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -1079,8 +1003,6 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
dlsch0_harq->TBS = rel8->length<<3; dlsch0_harq->TBS = rel8->length<<3;
dlsch0_harq->Qm = rel8->modulation; dlsch0_harq->Qm = rel8->modulation;
dlsch0_harq->codeword = 0; dlsch0_harq->codeword = 0;
} }
else { else {
...@@ -1361,27 +1283,6 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB, ...@@ -1361,27 +1283,6 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
common_signal_procedures(eNB,proc); common_signal_procedures(eNB,proc);
} }
/*
if (eNB->mac_enabled==1) {
// Parse DCI received from MAC
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
DCI_pdu = mac_xface->get_dci_sdu(eNB->Mod_id,
eNB->CC_id,
frame,
subframe);
}
else {
DCI_pdu = &DCI_pdu_tmp;
fill_dci(DCI_pdu,eNB,proc);
// clear previous allocation information for all UEs
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
if (eNB->dlsch[i][0]){
for (j=0; j<8; j++)
eNB->dlsch[i][0]->harq_processes[j]->round = 0;
}
}
}
*/
// clear existing ulsch dci allocations before applying info from MAC (this is table // clear existing ulsch dci allocations before applying info from MAC (this is table
ul_subframe = pdcch_alloc2ul_subframe(fp,subframe); ul_subframe = pdcch_alloc2ul_subframe(fp,subframe);
ul_frame = pdcch_alloc2ul_frame(fp,frame,subframe); ul_frame = pdcch_alloc2ul_frame(fp,frame,subframe);
...@@ -1465,6 +1366,7 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB, ...@@ -1465,6 +1366,7 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
{ {
dlsch0 = eNB->dlsch[(uint8_t)UE_id][0]; dlsch0 = eNB->dlsch[(uint8_t)UE_id][0];
dlsch1 = eNB->dlsch[(uint8_t)UE_id][1]; dlsch1 = eNB->dlsch[(uint8_t)UE_id][1];
if ((dlsch0)&& if ((dlsch0)&&
(dlsch0->rnti>0)&& (dlsch0->rnti>0)&&
(dlsch0->active == 1)) { (dlsch0->active == 1)) {
......
...@@ -290,7 +290,7 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -290,7 +290,7 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu)); dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu));
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP]; dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP];
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->RA_rnti; dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->RA_rnti;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,6); dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,6);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK
...@@ -541,7 +541,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -541,7 +541,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
if (RA_template->rach_resource_type>0) { if (RA_template->rach_resource_type>0) {
// Generate DCI + repetitions first // Generate DCI + repetitions first
// This uses an MPDCCH Type 2 allocation according to Section 9.1.5 36-213 : Note: Assumption that this is still Type 2 Common Search // This uses an MPDCCH Type 2 allocation according to Section 9.1.5 36-213, Type2 common allocation according to Table 7.1-8 (36-213)
// Parameters: // Parameters:
// p=2+4 PRB set (number of PRB pairs 6) // p=2+4 PRB set (number of PRB pairs 6)
// rmax = mpdcch-NumRepetition-RA-r13 => Table 9.1.5-3 // rmax = mpdcch-NumRepetition-RA-r13 => Table 9.1.5-3
......
...@@ -1504,10 +1504,6 @@ int main( int argc, char **argv ) ...@@ -1504,10 +1504,6 @@ int main( int argc, char **argv )
UE[CC_id]->mode = mode; UE[CC_id]->mode = mode;
printf("UE[%d]->mode = %d\n",CC_id,mode); printf("UE[%d]->mode = %d\n",CC_id,mode);
compute_prach_seq(&UE[CC_id]->frame_parms.prach_config_common,
UE[CC_id]->frame_parms.frame_type,
UE[CC_id]->X_u);
if (UE[CC_id]->mac_enabled == 1) { if (UE[CC_id]->mac_enabled == 1) {
UE[CC_id]->pdcch_vars[0][0]->crnti = 0x1234; UE[CC_id]->pdcch_vars[0][0]->crnti = 0x1234;
UE[CC_id]->pdcch_vars[1][0]->crnti = 0x1234; UE[CC_id]->pdcch_vars[1][0]->crnti = 0x1234;
......
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